[deliverable/linux.git] / arch / sparc / kernel / setup_64.c

/*
 *  linux/arch/sparc64/kernel/setup.c
 *
 *  Copyright (C) 1995,1996  David S. Miller (davem@caip.rutgers.edu)
 *  Copyright (C) 1997       Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <asm/smp.h>
#include <linux/user.h>
#include <linux/screen_info.h>
#include <linux/delay.h>
#include <linux/fs.h>
#include <linux/seq_file.h>
#include <linux/syscalls.h>
#include <linux/kdev_t.h>
#include <linux/major.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/inet.h>
#include <linux/console.h>
#include <linux/root_dev.h>
#include <linux/interrupt.h>
#include <linux/cpu.h>
#include <linux/initrd.h>

#include <asm/system.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/oplib.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/idprom.h>
#include <asm/head.h>
#include <asm/starfire.h>
#include <asm/mmu_context.h>
#include <asm/timer.h>
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/mmu.h>
#include <asm/ns87303.h>

#ifdef CONFIG_IP_PNP
#include <net/ipconfig.h>
#endif

#include "entry.h"
#include "kernel.h"

/* Used to synchronize accesses to NatSemi SUPER I/O chip configure
 * operations in asm/ns87303.h
 */
DEFINE_SPINLOCK(ns87303_lock);

struct screen_info screen_info = {
	0, 0,			/* orig-x, orig-y */
	0,			/* unused */
	0,			/* orig-video-page */
	0,			/* orig-video-mode */
	128,			/* orig-video-cols */
	0, 0, 0,		/* unused, ega_bx, unused */
	54,			/* orig-video-lines */
	0,                      /* orig-video-isVGA */
	16                      /* orig-video-points */
};

static void
prom_console_write(struct console *con, const char *s, unsigned n)
{
	prom_write(s, n);
}

/* Exported for mm/init.c:paging_init. */
unsigned long cmdline_memory_size = 0;

static struct console prom_early_console = {
	.name =		"earlyprom",
	.write =	prom_console_write,
	.flags =	CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME,
	.index =	-1,
};

/* 
 * Process kernel command line switches that are specific to the
 * SPARC or that require special low-level processing.
 */
static void __init process_switch(char c)
{
	switch (c) {
	case 'd':
	case 's':
		break;
	case 'h':
		prom_printf("boot_flags_init: Halt!\n");
		prom_halt();
		break;
	case 'p':
		/* Just ignore, this behavior is now the default.  */
		break;
	case 'P':
		/* Force UltraSPARC-III P-Cache on. */
		if (tlb_type != cheetah) {
			printk("BOOT: Ignoring P-Cache force option.\n");
			break;
		}
		cheetah_pcache_forced_on = 1;
		add_taint(TAINT_MACHINE_CHECK);
		cheetah_enable_pcache();
		break;

	default:
		printk("Unknown boot switch (-%c)\n", c);
		break;
	}
}

static void __init boot_flags_init(char *commands)
{
	while (*commands) {
		/* Move to the start of the next "argument". */
		while (*commands && *commands == ' ')
			commands++;

		/* Process any command switches, otherwise skip it. */
		if (*commands == '\0')
			break;
		if (*commands == '-') {
			commands++;
			while (*commands && *commands != ' ')
				process_switch(*commands++);
			continue;
		}
		if (!strncmp(commands, "mem=", 4)) {
			/*
			 * "mem=XXX[kKmM]" overrides the PROM-reported
			 * memory size.
			 */
			cmdline_memory_size = simple_strtoul(commands + 4,
							     &commands, 0);
			if (*commands == 'K' || *commands == 'k') {
				cmdline_memory_size <<= 10;
				commands++;
			} else if (*commands=='M' || *commands=='m') {
				cmdline_memory_size <<= 20;
				commands++;
			}
		}
		while (*commands && *commands != ' ')
			commands++;
	}
}

extern unsigned short root_flags;
extern unsigned short root_dev;
extern unsigned short ram_flags;
#define RAMDISK_IMAGE_START_MASK	0x07FF
#define RAMDISK_PROMPT_FLAG		0x8000
#define RAMDISK_LOAD_FLAG		0x4000

extern int root_mountflags;

char reboot_command[COMMAND_LINE_SIZE];

static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };

void __init per_cpu_patch(void)
{
	struct cpuid_patch_entry *p;
	unsigned long ver;
	int is_jbus;

	if (tlb_type == spitfire && !this_is_starfire)
		return;

	is_jbus = 0;
	if (tlb_type != hypervisor) {
		__asm__ ("rdpr %%ver, %0" : "=r" (ver));
		is_jbus = ((ver >> 32UL) == __JALAPENO_ID ||
			   (ver >> 32UL) == __SERRANO_ID);
	}

	p = &__cpuid_patch;
	while (p < &__cpuid_patch_end) {
		unsigned long addr = p->addr;
		unsigned int *insns;

		switch (tlb_type) {
		case spitfire:
			insns = &p->starfire[0];
			break;
		case cheetah:
		case cheetah_plus:
			if (is_jbus)
				insns = &p->cheetah_jbus[0];
			else
				insns = &p->cheetah_safari[0];
			break;
		case hypervisor:
			insns = &p->sun4v[0];
			break;
		default:
			prom_printf("Unknown cpu type, halting.\n");
			prom_halt();
		};

		*(unsigned int *) (addr +  0) = insns[0];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  0));

		*(unsigned int *) (addr +  4) = insns[1];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  4));

		*(unsigned int *) (addr +  8) = insns[2];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  8));

		*(unsigned int *) (addr + 12) = insns[3];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr + 12));

		p++;
	}
}

void __init sun4v_patch(void)
{
	extern void sun4v_hvapi_init(void);
	struct sun4v_1insn_patch_entry *p1;
	struct sun4v_2insn_patch_entry *p2;

	if (tlb_type != hypervisor)
		return;

	p1 = &__sun4v_1insn_patch;
	while (p1 < &__sun4v_1insn_patch_end) {
		unsigned long addr = p1->addr;

		*(unsigned int *) (addr +  0) = p1->insn;
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  0));

		p1++;
	}

	p2 = &__sun4v_2insn_patch;
	while (p2 < &__sun4v_2insn_patch_end) {
		unsigned long addr = p2->addr;

		*(unsigned int *) (addr +  0) = p2->insns[0];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  0));

		*(unsigned int *) (addr +  4) = p2->insns[1];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  4));

		p2++;
	}

	sun4v_hvapi_init();
}

#ifdef CONFIG_SMP
void __init boot_cpu_id_too_large(int cpu)
{
	prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
		    cpu, NR_CPUS);
	prom_halt();
}
#endif

void __init setup_arch(char **cmdline_p)
{
	/* Initialize PROM console and command line. */
	*cmdline_p = prom_getbootargs();
	strcpy(boot_command_line, *cmdline_p);
	parse_early_param();

	boot_flags_init(*cmdline_p);
	register_console(&prom_early_console);

	if (tlb_type == hypervisor)
		printk("ARCH: SUN4V\n");
	else
		printk("ARCH: SUN4U\n");

#ifdef CONFIG_DUMMY_CONSOLE
	conswitchp = &dummy_con;
#elif defined(CONFIG_PROM_CONSOLE)
	conswitchp = &prom_con;
#endif

	idprom_init();

	if (!root_flags)
		root_mountflags &= ~MS_RDONLY;
	ROOT_DEV = old_decode_dev(root_dev);
#ifdef CONFIG_BLK_DEV_RAM
	rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
	rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
	rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);	
#endif

	task_thread_info(&init_task)->kregs = &fake_swapper_regs;

#ifdef CONFIG_IP_PNP
	if (!ic_set_manually) {
		int chosen = prom_finddevice ("/chosen");
		u32 cl, sv, gw;
		
		cl = prom_getintdefault (chosen, "client-ip", 0);
		sv = prom_getintdefault (chosen, "server-ip", 0);
		gw = prom_getintdefault (chosen, "gateway-ip", 0);
		if (cl && sv) {
			ic_myaddr = cl;
			ic_servaddr = sv;
			if (gw)
				ic_gateway = gw;
#if defined(CONFIG_IP_PNP_BOOTP) || defined(CONFIG_IP_PNP_RARP)
			ic_proto_enabled = 0;
#endif
		}
	}
#endif

	/* Get boot processor trap_block[] setup.  */
	init_cur_cpu_trap(current_thread_info());

	paging_init();
}

/* BUFFER is PAGE_SIZE bytes long. */

extern void smp_info(struct seq_file *);
extern void smp_bogo(struct seq_file *);
extern void mmu_info(struct seq_file *);

unsigned int dcache_parity_tl1_occurred;
unsigned int icache_parity_tl1_occurred;

int ncpus_probed;

static int show_cpuinfo(struct seq_file *m, void *__unused)
{
	seq_printf(m, 
		   "cpu\t\t: %s\n"
		   "fpu\t\t: %s\n"
		   "prom\t\t: %s\n"
		   "type\t\t: %s\n"
		   "ncpus probed\t: %d\n"
		   "ncpus active\t: %d\n"
		   "D$ parity tl1\t: %u\n"
		   "I$ parity tl1\t: %u\n"
#ifndef CONFIG_SMP
		   "Cpu0ClkTck\t: %016lx\n"
#endif
		   ,
		   sparc_cpu_type,
		   sparc_fpu_type,
		   prom_version,
		   ((tlb_type == hypervisor) ?
		    "sun4v" :
		    "sun4u"),
		   ncpus_probed,
		   num_online_cpus(),
		   dcache_parity_tl1_occurred,
		   icache_parity_tl1_occurred
#ifndef CONFIG_SMP
		   , cpu_data(0).clock_tick
#endif
		);
#ifdef CONFIG_SMP
	smp_bogo(m);
#endif
	mmu_info(m);
#ifdef CONFIG_SMP
	smp_info(m);
#endif
	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	/* The pointer we are returning is arbitrary,
	 * it just has to be non-NULL and not IS_ERR
	 * in the success case.
	 */
	return *pos == 0 ? &c_start : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_start(m, pos);
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start =c_start,
	.next =	c_next,
	.stop =	c_stop,
	.show =	show_cpuinfo,
};

extern int stop_a_enabled;

void sun_do_break(void)
{
	if (!stop_a_enabled)
		return;

	prom_printf("\n");
	flush_user_windows();

	prom_cmdline();
}

int stop_a_enabled = 1;
Commit	Line	Data
b00dc837	1	/*
1da177e4 LT	2	* linux/arch/sparc64/kernel/setup.c
	3	*
	4	* Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
	5	* Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
	6	*/
	7
	8	#include <linux/errno.h>
	9	#include <linux/sched.h>
	10	#include <linux/kernel.h>
	11	#include <linux/mm.h>
	12	#include <linux/stddef.h>
	13	#include <linux/unistd.h>
	14	#include <linux/ptrace.h>
	15	#include <linux/slab.h>
	16	#include <asm/smp.h>
	17	#include <linux/user.h>
894673ee	18	#include <linux/screen_info.h>
1da177e4	19	#include <linux/delay.h>
1da177e4 LT	20	#include <linux/fs.h>
	21	#include <linux/seq_file.h>
	22	#include <linux/syscalls.h>
	23	#include <linux/kdev_t.h>
	24	#include <linux/major.h>
	25	#include <linux/string.h>
	26	#include <linux/init.h>
	27	#include <linux/inet.h>
	28	#include <linux/console.h>
	29	#include <linux/root_dev.h>
	30	#include <linux/interrupt.h>
	31	#include <linux/cpu.h>
	32	#include <linux/initrd.h>
	33
1da177e4 LT	34	#include <asm/system.h>
	35	#include <asm/io.h>
	36	#include <asm/processor.h>
	37	#include <asm/oplib.h>
	38	#include <asm/page.h>
	39	#include <asm/pgtable.h>
	40	#include <asm/idprom.h>
	41	#include <asm/head.h>
	42	#include <asm/starfire.h>
	43	#include <asm/mmu_context.h>
	44	#include <asm/timer.h>
	45	#include <asm/sections.h>
	46	#include <asm/setup.h>
	47	#include <asm/mmu.h>
5cbc3073	48	#include <asm/ns87303.h>
1da177e4 LT	49
	50	#ifdef CONFIG_IP_PNP
	51	#include <net/ipconfig.h>
	52	#endif
	53
3d5ae6b6	54	#include "entry.h"
53ae3419	55	#include "kernel.h"
3d5ae6b6	56
5cbc3073 DM	57	/* Used to synchronize accesses to NatSemi SUPER I/O chip configure
	58	* operations in asm/ns87303.h
	59	*/
	60	DEFINE_SPINLOCK(ns87303_lock);
	61
1da177e4 LT	62	struct screen_info screen_info = {
	63	0, 0, /* orig-x, orig-y */
	64	0, /* unused */
	65	0, /* orig-video-page */
	66	0, /* orig-video-mode */
	67	128, /* orig-video-cols */
	68	0, 0, 0, /* unused, ega_bx, unused */
	69	54, /* orig-video-lines */
	70	0, /* orig-video-isVGA */
	71	16 /* orig-video-points */
	72	};
	73
1da177e4 LT	74	static void
	75	prom_console_write(struct console con, const char s, unsigned n)
	76	{
	77	prom_write(s, n);
	78	}
	79
1da177e4 LT	80	/* Exported for mm/init.c:paging_init. */
	81	unsigned long cmdline_memory_size = 0;
	82
3c62a2d3 DM	83	static struct console prom_early_console = {
3c62a2d3 DM	84	.name = "earlyprom",
1da177e4	85	.write = prom_console_write,
db9a7fb1	86	.flags = CON_PRINTBUFFER \| CON_BOOT \| CON_ANYTIME,
1da177e4 LT	87	.index = -1,
	88	};
	89
1da177e4 LT	90	/*
	91	* Process kernel command line switches that are specific to the
	92	* SPARC or that require special low-level processing.
	93	*/
	94	static void __init process_switch(char c)
	95	{
	96	switch (c) {
	97	case 'd':
1da177e4	98	case 's':
1da177e4 LT	99	break;
	100	case 'h':
	101	prom_printf("boot_flags_init: Halt!\n");
	102	prom_halt();
	103	break;
	104	case 'p':
3c62a2d3	105	/* Just ignore, this behavior is now the default. */
1da177e4	106	break;
816242da DM	107	case 'P':
	108	/* Force UltraSPARC-III P-Cache on. */
	109	if (tlb_type != cheetah) {
	110	printk("BOOT: Ignoring P-Cache force option.\n");
	111	break;
	112	}
	113	cheetah_pcache_forced_on = 1;
	114	add_taint(TAINT_MACHINE_CHECK);
	115	cheetah_enable_pcache();
	116	break;
	117
1da177e4 LT	118	default:
	119	printk("Unknown boot switch (-%c)\n", c);
	120	break;
	121	}
	122	}
	123
1da177e4 LT	124	static void __init boot_flags_init(char *commands)
	125	{
	126	while (*commands) {
	127	/* Move to the start of the next "argument". */
	128	while (commands && commands == ' ')
	129	commands++;
	130
	131	/* Process any command switches, otherwise skip it. */
	132	if (*commands == '\0')
	133	break;
	134	if (*commands == '-') {
	135	commands++;
	136	while (commands && commands != ' ')
	137	process_switch(*commands++);
	138	continue;
	139	}
c73fcc84	140	if (!strncmp(commands, "mem=", 4)) {
1da177e4 LT	141	/*
	142	* "mem=XXX[kKmM]" overrides the PROM-reported
	143	* memory size.
	144	*/
	145	cmdline_memory_size = simple_strtoul(commands + 4,
	146	&commands, 0);
	147	if (commands == 'K' \|\| commands == 'k') {
	148	cmdline_memory_size <<= 10;
	149	commands++;
	150	} else if (commands=='M' \|\| commands=='m') {
	151	cmdline_memory_size <<= 20;
	152	commands++;
	153	}
	154	}
	155	while (commands && commands != ' ')
	156	commands++;
	157	}
	158	}
	159
1da177e4 LT	160	extern unsigned short root_flags;
	161	extern unsigned short root_dev;
	162	extern unsigned short ram_flags;
	163	#define RAMDISK_IMAGE_START_MASK 0x07FF
	164	#define RAMDISK_PROMPT_FLAG 0x8000
	165	#define RAMDISK_LOAD_FLAG 0x4000
	166
	167	extern int root_mountflags;
	168
	169	char reboot_command[COMMAND_LINE_SIZE];
	170
	171	static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
	172
951bc82c	173	void __init per_cpu_patch(void)
92704a1c	174	{
92704a1c DM	175	struct cpuid_patch_entry *p;
	176	unsigned long ver;
	177	int is_jbus;
	178
	179	if (tlb_type == spitfire && !this_is_starfire)
	180	return;
	181
d82ace7d DM	182	is_jbus = 0;
	183	if (tlb_type != hypervisor) {
	184	__asm__ ("rdpr %%ver, %0" : "=r" (ver));
ebd8c56c DM	185	is_jbus = ((ver >> 32UL) == __JALAPENO_ID \|\|
ebd8c56c DM	186	(ver >> 32UL) == __SERRANO_ID);
d82ace7d	187	}
92704a1c DM	188
	189	p = &__cpuid_patch;
	190	while (p < &__cpuid_patch_end) {
	191	unsigned long addr = p->addr;
	192	unsigned int *insns;
	193
	194	switch (tlb_type) {
	195	case spitfire:
	196	insns = &p->starfire[0];
	197	break;
	198	case cheetah:
	199	case cheetah_plus:
	200	if (is_jbus)
	201	insns = &p->cheetah_jbus[0];
	202	else
	203	insns = &p->cheetah_safari[0];
	204	break;
d96b8153 DM	205	case hypervisor:
	206	insns = &p->sun4v[0];
	207	break;
92704a1c DM	208	default:
	209	prom_printf("Unknown cpu type, halting.\n");
	210	prom_halt();
	211	};
	212
	213	(unsigned int ) (addr + 0) = insns[0];
840aaef8	214	wmb();
92704a1c DM	215	__asm__ __volatile__("flush %0" : : "r" (addr + 0));
	216
	217	(unsigned int ) (addr + 4) = insns[1];
840aaef8	218	wmb();
92704a1c DM	219	__asm__ __volatile__("flush %0" : : "r" (addr + 4));
	220
	221	(unsigned int ) (addr + 8) = insns[2];
840aaef8	222	wmb();
92704a1c DM	223	__asm__ __volatile__("flush %0" : : "r" (addr + 8));
	224
	225	(unsigned int ) (addr + 12) = insns[3];
840aaef8	226	wmb();
92704a1c DM	227	__asm__ __volatile__("flush %0" : : "r" (addr + 12));
	228
	229	p++;
	230	}
92704a1c DM	231	}
92704a1c DM	232
951bc82c	233	void __init sun4v_patch(void)
936f482a	234	{
c7754d46	235	extern void sun4v_hvapi_init(void);
df7d6aec DM	236	struct sun4v_1insn_patch_entry *p1;
df7d6aec DM	237	struct sun4v_2insn_patch_entry *p2;
936f482a DM	238
	239	if (tlb_type != hypervisor)
	240	return;
	241
df7d6aec DM	242	p1 = &__sun4v_1insn_patch;
df7d6aec DM	243	while (p1 < &__sun4v_1insn_patch_end) {
45fec05f	244	unsigned long addr = p1->addr;
936f482a	245
45fec05f	246	(unsigned int ) (addr + 0) = p1->insn;
840aaef8	247	wmb();
936f482a DM	248	__asm__ __volatile__("flush %0" : : "r" (addr + 0));
936f482a DM	249
45fec05f DM	250	p1++;
	251	}
	252
df7d6aec DM	253	p2 = &__sun4v_2insn_patch;
df7d6aec DM	254	while (p2 < &__sun4v_2insn_patch_end) {
45fec05f DM	255	unsigned long addr = p2->addr;
	256
	257	(unsigned int ) (addr + 0) = p2->insns[0];
840aaef8	258	wmb();
45fec05f DM	259	__asm__ __volatile__("flush %0" : : "r" (addr + 0));
45fec05f DM	260
fd05068d	261	(unsigned int ) (addr + 4) = p2->insns[1];
840aaef8	262	wmb();
45fec05f DM	263	__asm__ __volatile__("flush %0" : : "r" (addr + 4));
	264
	265	p2++;
936f482a	266	}
c7754d46 DM	267
c7754d46 DM	268	sun4v_hvapi_init();
936f482a DM	269	}
936f482a DM	270
951bc82c DM	271	#ifdef CONFIG_SMP
	272	void __init boot_cpu_id_too_large(int cpu)
	273	{
	274	prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
	275	cpu, NR_CPUS);
	276	prom_halt();
	277	}
	278	#endif
	279
1da177e4 LT	280	void __init setup_arch(char **cmdline_p)
1da177e4 LT	281	{
1da177e4 LT	282	/* Initialize PROM console and command line. */
1da177e4 LT	283	*cmdline_p = prom_getbootargs();
383464c0	284	strcpy(boot_command_line, *cmdline_p);
ce3b1d47	285	parse_early_param();
1da177e4	286
3c62a2d3 DM	287	boot_flags_init(*cmdline_p);
	288	register_console(&prom_early_console);
	289
3a8c069d DM	290	if (tlb_type == hypervisor)
	291	printk("ARCH: SUN4V\n");
	292	else
	293	printk("ARCH: SUN4U\n");
1da177e4 LT	294
	295	#ifdef CONFIG_DUMMY_CONSOLE
	296	conswitchp = &dummy_con;
	297	#elif defined(CONFIG_PROM_CONSOLE)
	298	conswitchp = &prom_con;
	299	#endif
	300
1da177e4	301	idprom_init();
1da177e4 LT	302
	303	if (!root_flags)
	304	root_mountflags &= ~MS_RDONLY;
	305	ROOT_DEV = old_decode_dev(root_dev);
467418f3	306	#ifdef CONFIG_BLK_DEV_RAM
1da177e4 LT	307	rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
	308	rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
	309	rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);
	310	#endif
	311
f3169641	312	task_thread_info(&init_task)->kregs = &fake_swapper_regs;
1da177e4 LT	313
	314	#ifdef CONFIG_IP_PNP
	315	if (!ic_set_manually) {
	316	int chosen = prom_finddevice ("/chosen");
	317	u32 cl, sv, gw;
	318
	319	cl = prom_getintdefault (chosen, "client-ip", 0);
	320	sv = prom_getintdefault (chosen, "server-ip", 0);
	321	gw = prom_getintdefault (chosen, "gateway-ip", 0);
	322	if (cl && sv) {
	323	ic_myaddr = cl;
	324	ic_servaddr = sv;
	325	if (gw)
	326	ic_gateway = gw;
	327	#if defined(CONFIG_IP_PNP_BOOTP) \|\| defined(CONFIG_IP_PNP_RARP)
	328	ic_proto_enabled = 0;
	329	#endif
	330	}
	331	}
	332	#endif
	333
56fb4df6	334	/* Get boot processor trap_block[] setup. */
72aff53f	335	init_cur_cpu_trap(current_thread_info());
52845cdb DM	336
52845cdb DM	337	paging_init();
1da177e4 LT	338	}
1da177e4 LT	339
1da177e4 LT	340	/* BUFFER is PAGE_SIZE bytes long. */
1da177e4 LT	341
1da177e4 LT	342	extern void smp_info(struct seq_file *);
	343	extern void smp_bogo(struct seq_file *);
	344	extern void mmu_info(struct seq_file *);
	345
80dc0d6b DM	346	unsigned int dcache_parity_tl1_occurred;
	347	unsigned int icache_parity_tl1_occurred;
	348
5cbc3073	349	int ncpus_probed;
4d45cbac	350
1da177e4 LT	351	static int show_cpuinfo(struct seq_file m, void __unused)
	352	{
	353	seq_printf(m,
	354	"cpu\t\t: %s\n"
	355	"fpu\t\t: %s\n"
90a6646b DM	356	"prom\t\t: %s\n"
90a6646b DM	357	"type\t\t: %s\n"
4d45cbac DM	358	"ncpus probed\t: %d\n"
4d45cbac DM	359	"ncpus active\t: %d\n"
80dc0d6b DM	360	"D$ parity tl1\t: %u\n"
80dc0d6b DM	361	"I$ parity tl1\t: %u\n"
1da177e4	362	#ifndef CONFIG_SMP
1da177e4 LT	363	"Cpu0ClkTck\t: %016lx\n"
	364	#endif
	365	,
	366	sparc_cpu_type,
	367	sparc_fpu_type,
90a6646b DM	368	prom_version,
	369	((tlb_type == hypervisor) ?
	370	"sun4v" :
	371	"sun4u"),
4d45cbac DM	372	ncpus_probed,
4d45cbac DM	373	num_online_cpus(),
80dc0d6b	374	dcache_parity_tl1_occurred,
3ac66e33	375	icache_parity_tl1_occurred
1da177e4	376	#ifndef CONFIG_SMP
3ac66e33	377	, cpu_data(0).clock_tick
1da177e4 LT	378	#endif
	379	);
	380	#ifdef CONFIG_SMP
	381	smp_bogo(m);
	382	#endif
	383	mmu_info(m);
	384	#ifdef CONFIG_SMP
	385	smp_info(m);
	386	#endif
	387	return 0;
	388	}
	389
	390	static void c_start(struct seq_file m, loff_t *pos)
	391	{
	392	/* The pointer we are returning is arbitrary,
	393	* it just has to be non-NULL and not IS_ERR
	394	* in the success case.
	395	*/
	396	return *pos == 0 ? &c_start : NULL;
	397	}
	398
	399	static void c_next(struct seq_file m, void v, loff_t pos)
	400	{
	401	++*pos;
	402	return c_start(m, pos);
	403	}
	404
	405	static void c_stop(struct seq_file m, void v)
	406	{
	407	}
	408
872e2be7	409	const struct seq_operations cpuinfo_op = {
1da177e4 LT	410	.start =c_start,
	411	.next = c_next,
	412	.stop = c_stop,
	413	.show = show_cpuinfo,
	414	};
	415
	416	extern int stop_a_enabled;
	417
	418	void sun_do_break(void)
	419	{
	420	if (!stop_a_enabled)
	421	return;
	422
	423	prom_printf("\n");
	424	flush_user_windows();
	425
	426	prom_cmdline();
	427	}
	428
1da177e4	429	int stop_a_enabled = 1;