[deliverable/linux.git] / arch / sparc / kernel / setup_64.c

/*
 *  linux/arch/sparc64/kernel/setup.c
 *
 *  Copyright (C) 1995,1996  David S. Miller (davem@caip.rutgers.edu)
 *  Copyright (C) 1997       Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <asm/smp.h>
#include <linux/user.h>
#include <linux/screen_info.h>
#include <linux/delay.h>
#include <linux/fs.h>
#include <linux/seq_file.h>
#include <linux/syscalls.h>
#include <linux/kdev_t.h>
#include <linux/major.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/inet.h>
#include <linux/console.h>
#include <linux/root_dev.h>
#include <linux/interrupt.h>
#include <linux/cpu.h>
#include <linux/initrd.h>

#include <asm/system.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/oplib.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/idprom.h>
#include <asm/head.h>
#include <asm/starfire.h>
#include <asm/mmu_context.h>
#include <asm/timer.h>
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/mmu.h>
#include <asm/ns87303.h>

#ifdef CONFIG_IP_PNP
#include <net/ipconfig.h>
#endif

#include "entry.h"
#include "kernel.h"

/* Used to synchronize accesses to NatSemi SUPER I/O chip configure
 * operations in asm/ns87303.h
 */
DEFINE_SPINLOCK(ns87303_lock);
EXPORT_SYMBOL(ns87303_lock);

struct screen_info screen_info = {
	0, 0,			/* orig-x, orig-y */
	0,			/* unused */
	0,			/* orig-video-page */
	0,			/* orig-video-mode */
	128,			/* orig-video-cols */
	0, 0, 0,		/* unused, ega_bx, unused */
	54,			/* orig-video-lines */
	0,                      /* orig-video-isVGA */
	16                      /* orig-video-points */
};

static void
prom_console_write(struct console *con, const char *s, unsigned n)
{
	prom_write(s, n);
}

/* Exported for mm/init.c:paging_init. */
unsigned long cmdline_memory_size = 0;

static struct console prom_early_console = {
	.name =		"earlyprom",
	.write =	prom_console_write,
	.flags =	CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME,
	.index =	-1,
};

/* 
 * Process kernel command line switches that are specific to the
 * SPARC or that require special low-level processing.
 */
static void __init process_switch(char c)
{
	switch (c) {
	case 'd':
	case 's':
		break;
	case 'h':
		prom_printf("boot_flags_init: Halt!\n");
		prom_halt();
		break;
	case 'p':
		/* Just ignore, this behavior is now the default.  */
		break;
	case 'P':
		/* Force UltraSPARC-III P-Cache on. */
		if (tlb_type != cheetah) {
			printk("BOOT: Ignoring P-Cache force option.\n");
			break;
		}
		cheetah_pcache_forced_on = 1;
		add_taint(TAINT_MACHINE_CHECK);
		cheetah_enable_pcache();
		break;

	default:
		printk("Unknown boot switch (-%c)\n", c);
		break;
	}
}

static void __init boot_flags_init(char *commands)
{
	while (*commands) {
		/* Move to the start of the next "argument". */
		while (*commands && *commands == ' ')
			commands++;

		/* Process any command switches, otherwise skip it. */
		if (*commands == '\0')
			break;
		if (*commands == '-') {
			commands++;
			while (*commands && *commands != ' ')
				process_switch(*commands++);
			continue;
		}
		if (!strncmp(commands, "mem=", 4)) {
			/*
			 * "mem=XXX[kKmM]" overrides the PROM-reported
			 * memory size.
			 */
			cmdline_memory_size = simple_strtoul(commands + 4,
							     &commands, 0);
			if (*commands == 'K' || *commands == 'k') {
				cmdline_memory_size <<= 10;
				commands++;
			} else if (*commands=='M' || *commands=='m') {
				cmdline_memory_size <<= 20;
				commands++;
			}
		}
		while (*commands && *commands != ' ')
			commands++;
	}
}

extern unsigned short root_flags;
extern unsigned short root_dev;
extern unsigned short ram_flags;
#define RAMDISK_IMAGE_START_MASK	0x07FF
#define RAMDISK_PROMPT_FLAG		0x8000
#define RAMDISK_LOAD_FLAG		0x4000

extern int root_mountflags;

char reboot_command[COMMAND_LINE_SIZE];

static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };

void __init per_cpu_patch(void)
{
	struct cpuid_patch_entry *p;
	unsigned long ver;
	int is_jbus;

	if (tlb_type == spitfire && !this_is_starfire)
		return;

	is_jbus = 0;
	if (tlb_type != hypervisor) {
		__asm__ ("rdpr %%ver, %0" : "=r" (ver));
		is_jbus = ((ver >> 32UL) == __JALAPENO_ID ||
			   (ver >> 32UL) == __SERRANO_ID);
	}

	p = &__cpuid_patch;
	while (p < &__cpuid_patch_end) {
		unsigned long addr = p->addr;
		unsigned int *insns;

		switch (tlb_type) {
		case spitfire:
			insns = &p->starfire[0];
			break;
		case cheetah:
		case cheetah_plus:
			if (is_jbus)
				insns = &p->cheetah_jbus[0];
			else
				insns = &p->cheetah_safari[0];
			break;
		case hypervisor:
			insns = &p->sun4v[0];
			break;
		default:
			prom_printf("Unknown cpu type, halting.\n");
			prom_halt();
		};

		*(unsigned int *) (addr +  0) = insns[0];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  0));

		*(unsigned int *) (addr +  4) = insns[1];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  4));

		*(unsigned int *) (addr +  8) = insns[2];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  8));

		*(unsigned int *) (addr + 12) = insns[3];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr + 12));

		p++;
	}
}

void __init sun4v_patch(void)
{
	extern void sun4v_hvapi_init(void);
	struct sun4v_1insn_patch_entry *p1;
	struct sun4v_2insn_patch_entry *p2;

	if (tlb_type != hypervisor)
		return;

	p1 = &__sun4v_1insn_patch;
	while (p1 < &__sun4v_1insn_patch_end) {
		unsigned long addr = p1->addr;

		*(unsigned int *) (addr +  0) = p1->insn;
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  0));

		p1++;
	}

	p2 = &__sun4v_2insn_patch;
	while (p2 < &__sun4v_2insn_patch_end) {
		unsigned long addr = p2->addr;

		*(unsigned int *) (addr +  0) = p2->insns[0];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  0));

		*(unsigned int *) (addr +  4) = p2->insns[1];
		wmb();
		__asm__ __volatile__("flush	%0" : : "r" (addr +  4));

		p2++;
	}

	sun4v_hvapi_init();
}

#ifdef CONFIG_SMP
void __init boot_cpu_id_too_large(int cpu)
{
	prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
		    cpu, NR_CPUS);
	prom_halt();
}
#endif

void __init setup_arch(char **cmdline_p)
{
	/* Initialize PROM console and command line. */
	*cmdline_p = prom_getbootargs();
	strcpy(boot_command_line, *cmdline_p);
	parse_early_param();

	boot_flags_init(*cmdline_p);
	register_console(&prom_early_console);

	if (tlb_type == hypervisor)
		printk("ARCH: SUN4V\n");
	else
		printk("ARCH: SUN4U\n");

#ifdef CONFIG_DUMMY_CONSOLE
	conswitchp = &dummy_con;
#endif

	idprom_init();

	if (!root_flags)
		root_mountflags &= ~MS_RDONLY;
	ROOT_DEV = old_decode_dev(root_dev);
#ifdef CONFIG_BLK_DEV_RAM
	rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
	rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
	rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);	
#endif

	task_thread_info(&init_task)->kregs = &fake_swapper_regs;

#ifdef CONFIG_IP_PNP
	if (!ic_set_manually) {
		int chosen = prom_finddevice ("/chosen");
		u32 cl, sv, gw;
		
		cl = prom_getintdefault (chosen, "client-ip", 0);
		sv = prom_getintdefault (chosen, "server-ip", 0);
		gw = prom_getintdefault (chosen, "gateway-ip", 0);
		if (cl && sv) {
			ic_myaddr = cl;
			ic_servaddr = sv;
			if (gw)
				ic_gateway = gw;
#if defined(CONFIG_IP_PNP_BOOTP) || defined(CONFIG_IP_PNP_RARP)
			ic_proto_enabled = 0;
#endif
		}
	}
#endif

	/* Get boot processor trap_block[] setup.  */
	init_cur_cpu_trap(current_thread_info());

	paging_init();
}

/* BUFFER is PAGE_SIZE bytes long. */

extern void smp_info(struct seq_file *);
extern void smp_bogo(struct seq_file *);
extern void mmu_info(struct seq_file *);

unsigned int dcache_parity_tl1_occurred;
unsigned int icache_parity_tl1_occurred;

int ncpus_probed;

static int show_cpuinfo(struct seq_file *m, void *__unused)
{
	seq_printf(m, 
		   "cpu\t\t: %s\n"
		   "fpu\t\t: %s\n"
		   "pmu\t\t: %s\n"
		   "prom\t\t: %s\n"
		   "type\t\t: %s\n"
		   "ncpus probed\t: %d\n"
		   "ncpus active\t: %d\n"
		   "D$ parity tl1\t: %u\n"
		   "I$ parity tl1\t: %u\n"
#ifndef CONFIG_SMP
		   "Cpu0ClkTck\t: %016lx\n"
#endif
		   ,
		   sparc_cpu_type,
		   sparc_fpu_type,
		   sparc_pmu_type,
		   prom_version,
		   ((tlb_type == hypervisor) ?
		    "sun4v" :
		    "sun4u"),
		   ncpus_probed,
		   num_online_cpus(),
		   dcache_parity_tl1_occurred,
		   icache_parity_tl1_occurred
#ifndef CONFIG_SMP
		   , cpu_data(0).clock_tick
#endif
		);
#ifdef CONFIG_SMP
	smp_bogo(m);
#endif
	mmu_info(m);
#ifdef CONFIG_SMP
	smp_info(m);
#endif
	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	/* The pointer we are returning is arbitrary,
	 * it just has to be non-NULL and not IS_ERR
	 * in the success case.
	 */
	return *pos == 0 ? &c_start : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_start(m, pos);
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start =c_start,
	.next =	c_next,
	.stop =	c_stop,
	.show =	show_cpuinfo,
};

extern int stop_a_enabled;

void sun_do_break(void)
{
	if (!stop_a_enabled)
		return;

	prom_printf("\n");
	flush_user_windows();

	prom_cmdline();
}
EXPORT_SYMBOL(sun_do_break);

int stop_a_enabled = 1;
EXPORT_SYMBOL(stop_a_enabled);
Commit	Line	Data
b00dc837	1	/*
1da177e4 LT	2	* linux/arch/sparc64/kernel/setup.c
	3	*
	4	* Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
	5	* Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
	6	*/
	7
	8	#include <linux/errno.h>
	9	#include <linux/sched.h>
	10	#include <linux/kernel.h>
	11	#include <linux/mm.h>
	12	#include <linux/stddef.h>
	13	#include <linux/unistd.h>
	14	#include <linux/ptrace.h>
	15	#include <linux/slab.h>
	16	#include <asm/smp.h>
	17	#include <linux/user.h>
894673ee	18	#include <linux/screen_info.h>
1da177e4	19	#include <linux/delay.h>
1da177e4 LT	20	#include <linux/fs.h>
	21	#include <linux/seq_file.h>
	22	#include <linux/syscalls.h>
	23	#include <linux/kdev_t.h>
	24	#include <linux/major.h>
	25	#include <linux/string.h>
	26	#include <linux/init.h>
	27	#include <linux/inet.h>
	28	#include <linux/console.h>
	29	#include <linux/root_dev.h>
	30	#include <linux/interrupt.h>
	31	#include <linux/cpu.h>
	32	#include <linux/initrd.h>
	33
1da177e4 LT	34	#include <asm/system.h>
	35	#include <asm/io.h>
	36	#include <asm/processor.h>
	37	#include <asm/oplib.h>
	38	#include <asm/page.h>
	39	#include <asm/pgtable.h>
	40	#include <asm/idprom.h>
	41	#include <asm/head.h>
	42	#include <asm/starfire.h>
	43	#include <asm/mmu_context.h>
	44	#include <asm/timer.h>
	45	#include <asm/sections.h>
	46	#include <asm/setup.h>
	47	#include <asm/mmu.h>
5cbc3073	48	#include <asm/ns87303.h>
1da177e4 LT	49
	50	#ifdef CONFIG_IP_PNP
	51	#include <net/ipconfig.h>
	52	#endif
	53
3d5ae6b6	54	#include "entry.h"
53ae3419	55	#include "kernel.h"
3d5ae6b6	56
5cbc3073 DM	57	/* Used to synchronize accesses to NatSemi SUPER I/O chip configure
	58	* operations in asm/ns87303.h
	59	*/
	60	DEFINE_SPINLOCK(ns87303_lock);
917c3660	61	EXPORT_SYMBOL(ns87303_lock);
5cbc3073	62
1da177e4 LT	63	struct screen_info screen_info = {
	64	0, 0, /* orig-x, orig-y */
	65	0, /* unused */
	66	0, /* orig-video-page */
	67	0, /* orig-video-mode */
	68	128, /* orig-video-cols */
	69	0, 0, 0, /* unused, ega_bx, unused */
	70	54, /* orig-video-lines */
	71	0, /* orig-video-isVGA */
	72	16 /* orig-video-points */
	73	};
	74
1da177e4 LT	75	static void
	76	prom_console_write(struct console con, const char s, unsigned n)
	77	{
	78	prom_write(s, n);
	79	}
	80
1da177e4 LT	81	/* Exported for mm/init.c:paging_init. */
	82	unsigned long cmdline_memory_size = 0;
	83
3c62a2d3 DM	84	static struct console prom_early_console = {
3c62a2d3 DM	85	.name = "earlyprom",
1da177e4	86	.write = prom_console_write,
db9a7fb1	87	.flags = CON_PRINTBUFFER \| CON_BOOT \| CON_ANYTIME,
1da177e4 LT	88	.index = -1,
	89	};
	90
1da177e4 LT	91	/*
	92	* Process kernel command line switches that are specific to the
	93	* SPARC or that require special low-level processing.
	94	*/
	95	static void __init process_switch(char c)
	96	{
	97	switch (c) {
	98	case 'd':
1da177e4	99	case 's':
1da177e4 LT	100	break;
	101	case 'h':
	102	prom_printf("boot_flags_init: Halt!\n");
	103	prom_halt();
	104	break;
	105	case 'p':
3c62a2d3	106	/* Just ignore, this behavior is now the default. */
1da177e4	107	break;
816242da DM	108	case 'P':
	109	/* Force UltraSPARC-III P-Cache on. */
	110	if (tlb_type != cheetah) {
	111	printk("BOOT: Ignoring P-Cache force option.\n");
	112	break;
	113	}
	114	cheetah_pcache_forced_on = 1;
	115	add_taint(TAINT_MACHINE_CHECK);
	116	cheetah_enable_pcache();
	117	break;
	118
1da177e4 LT	119	default:
	120	printk("Unknown boot switch (-%c)\n", c);
	121	break;
	122	}
	123	}
	124
1da177e4 LT	125	static void __init boot_flags_init(char *commands)
	126	{
	127	while (*commands) {
	128	/* Move to the start of the next "argument". */
	129	while (commands && commands == ' ')
	130	commands++;
	131
	132	/* Process any command switches, otherwise skip it. */
	133	if (*commands == '\0')
	134	break;
	135	if (*commands == '-') {
	136	commands++;
	137	while (commands && commands != ' ')
	138	process_switch(*commands++);
	139	continue;
	140	}
c73fcc84	141	if (!strncmp(commands, "mem=", 4)) {
1da177e4 LT	142	/*
	143	* "mem=XXX[kKmM]" overrides the PROM-reported
	144	* memory size.
	145	*/
	146	cmdline_memory_size = simple_strtoul(commands + 4,
	147	&commands, 0);
	148	if (commands == 'K' \|\| commands == 'k') {
	149	cmdline_memory_size <<= 10;
	150	commands++;
	151	} else if (commands=='M' \|\| commands=='m') {
	152	cmdline_memory_size <<= 20;
	153	commands++;
	154	}
	155	}
	156	while (commands && commands != ' ')
	157	commands++;
	158	}
	159	}
	160
1da177e4 LT	161	extern unsigned short root_flags;
	162	extern unsigned short root_dev;
	163	extern unsigned short ram_flags;
	164	#define RAMDISK_IMAGE_START_MASK 0x07FF
	165	#define RAMDISK_PROMPT_FLAG 0x8000
	166	#define RAMDISK_LOAD_FLAG 0x4000
	167
	168	extern int root_mountflags;
	169
	170	char reboot_command[COMMAND_LINE_SIZE];
	171
	172	static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
	173
951bc82c	174	void __init per_cpu_patch(void)
92704a1c	175	{
92704a1c DM	176	struct cpuid_patch_entry *p;
	177	unsigned long ver;
	178	int is_jbus;
	179
	180	if (tlb_type == spitfire && !this_is_starfire)
	181	return;
	182
d82ace7d DM	183	is_jbus = 0;
	184	if (tlb_type != hypervisor) {
	185	__asm__ ("rdpr %%ver, %0" : "=r" (ver));
ebd8c56c DM	186	is_jbus = ((ver >> 32UL) == __JALAPENO_ID \|\|
ebd8c56c DM	187	(ver >> 32UL) == __SERRANO_ID);
d82ace7d	188	}
92704a1c DM	189
	190	p = &__cpuid_patch;
	191	while (p < &__cpuid_patch_end) {
	192	unsigned long addr = p->addr;
	193	unsigned int *insns;
	194
	195	switch (tlb_type) {
	196	case spitfire:
	197	insns = &p->starfire[0];
	198	break;
	199	case cheetah:
	200	case cheetah_plus:
	201	if (is_jbus)
	202	insns = &p->cheetah_jbus[0];
	203	else
	204	insns = &p->cheetah_safari[0];
	205	break;
d96b8153 DM	206	case hypervisor:
	207	insns = &p->sun4v[0];
	208	break;
92704a1c DM	209	default:
	210	prom_printf("Unknown cpu type, halting.\n");
	211	prom_halt();
	212	};
	213
	214	(unsigned int ) (addr + 0) = insns[0];
840aaef8	215	wmb();
92704a1c DM	216	__asm__ __volatile__("flush %0" : : "r" (addr + 0));
	217
	218	(unsigned int ) (addr + 4) = insns[1];
840aaef8	219	wmb();
92704a1c DM	220	__asm__ __volatile__("flush %0" : : "r" (addr + 4));
	221
	222	(unsigned int ) (addr + 8) = insns[2];
840aaef8	223	wmb();
92704a1c DM	224	__asm__ __volatile__("flush %0" : : "r" (addr + 8));
	225
	226	(unsigned int ) (addr + 12) = insns[3];
840aaef8	227	wmb();
92704a1c DM	228	__asm__ __volatile__("flush %0" : : "r" (addr + 12));
	229
	230	p++;
	231	}
92704a1c DM	232	}
92704a1c DM	233
951bc82c	234	void __init sun4v_patch(void)
936f482a	235	{
c7754d46	236	extern void sun4v_hvapi_init(void);
df7d6aec DM	237	struct sun4v_1insn_patch_entry *p1;
df7d6aec DM	238	struct sun4v_2insn_patch_entry *p2;
936f482a DM	239
	240	if (tlb_type != hypervisor)
	241	return;
	242
df7d6aec DM	243	p1 = &__sun4v_1insn_patch;
df7d6aec DM	244	while (p1 < &__sun4v_1insn_patch_end) {
45fec05f	245	unsigned long addr = p1->addr;
936f482a	246
45fec05f	247	(unsigned int ) (addr + 0) = p1->insn;
840aaef8	248	wmb();
936f482a DM	249	__asm__ __volatile__("flush %0" : : "r" (addr + 0));
936f482a DM	250
45fec05f DM	251	p1++;
	252	}
	253
df7d6aec DM	254	p2 = &__sun4v_2insn_patch;
df7d6aec DM	255	while (p2 < &__sun4v_2insn_patch_end) {
45fec05f DM	256	unsigned long addr = p2->addr;
	257
	258	(unsigned int ) (addr + 0) = p2->insns[0];
840aaef8	259	wmb();
45fec05f DM	260	__asm__ __volatile__("flush %0" : : "r" (addr + 0));
45fec05f DM	261
fd05068d	262	(unsigned int ) (addr + 4) = p2->insns[1];
840aaef8	263	wmb();
45fec05f DM	264	__asm__ __volatile__("flush %0" : : "r" (addr + 4));
	265
	266	p2++;
936f482a	267	}
c7754d46 DM	268
c7754d46 DM	269	sun4v_hvapi_init();
936f482a DM	270	}
936f482a DM	271
951bc82c DM	272	#ifdef CONFIG_SMP
	273	void __init boot_cpu_id_too_large(int cpu)
	274	{
	275	prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
	276	cpu, NR_CPUS);
	277	prom_halt();
	278	}
	279	#endif
	280
1da177e4 LT	281	void __init setup_arch(char **cmdline_p)
1da177e4 LT	282	{
1da177e4 LT	283	/* Initialize PROM console and command line. */
1da177e4 LT	284	*cmdline_p = prom_getbootargs();
383464c0	285	strcpy(boot_command_line, *cmdline_p);
ce3b1d47	286	parse_early_param();
1da177e4	287
3c62a2d3 DM	288	boot_flags_init(*cmdline_p);
	289	register_console(&prom_early_console);
	290
3a8c069d DM	291	if (tlb_type == hypervisor)
	292	printk("ARCH: SUN4V\n");
	293	else
	294	printk("ARCH: SUN4U\n");
1da177e4 LT	295
	296	#ifdef CONFIG_DUMMY_CONSOLE
	297	conswitchp = &dummy_con;
1da177e4 LT	298	#endif
1da177e4 LT	299
1da177e4	300	idprom_init();
1da177e4 LT	301
	302	if (!root_flags)
	303	root_mountflags &= ~MS_RDONLY;
	304	ROOT_DEV = old_decode_dev(root_dev);
467418f3	305	#ifdef CONFIG_BLK_DEV_RAM
1da177e4 LT	306	rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
	307	rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
	308	rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);
	309	#endif
	310
f3169641	311	task_thread_info(&init_task)->kregs = &fake_swapper_regs;
1da177e4 LT	312
	313	#ifdef CONFIG_IP_PNP
	314	if (!ic_set_manually) {
	315	int chosen = prom_finddevice ("/chosen");
	316	u32 cl, sv, gw;
	317
	318	cl = prom_getintdefault (chosen, "client-ip", 0);
	319	sv = prom_getintdefault (chosen, "server-ip", 0);
	320	gw = prom_getintdefault (chosen, "gateway-ip", 0);
	321	if (cl && sv) {
	322	ic_myaddr = cl;
	323	ic_servaddr = sv;
	324	if (gw)
	325	ic_gateway = gw;
	326	#if defined(CONFIG_IP_PNP_BOOTP) \|\| defined(CONFIG_IP_PNP_RARP)
	327	ic_proto_enabled = 0;
	328	#endif
	329	}
	330	}
	331	#endif
	332
56fb4df6	333	/* Get boot processor trap_block[] setup. */
72aff53f	334	init_cur_cpu_trap(current_thread_info());
52845cdb DM	335
52845cdb DM	336	paging_init();
1da177e4 LT	337	}
1da177e4 LT	338
1da177e4 LT	339	/* BUFFER is PAGE_SIZE bytes long. */
1da177e4 LT	340
1da177e4 LT	341	extern void smp_info(struct seq_file *);
	342	extern void smp_bogo(struct seq_file *);
	343	extern void mmu_info(struct seq_file *);
	344
80dc0d6b DM	345	unsigned int dcache_parity_tl1_occurred;
	346	unsigned int icache_parity_tl1_occurred;
	347
5cbc3073	348	int ncpus_probed;
4d45cbac	349
1da177e4 LT	350	static int show_cpuinfo(struct seq_file m, void __unused)
	351	{
	352	seq_printf(m,
	353	"cpu\t\t: %s\n"
	354	"fpu\t\t: %s\n"
c3cf5e8c	355	"pmu\t\t: %s\n"
90a6646b DM	356	"prom\t\t: %s\n"
90a6646b DM	357	"type\t\t: %s\n"
4d45cbac DM	358	"ncpus probed\t: %d\n"
4d45cbac DM	359	"ncpus active\t: %d\n"
80dc0d6b DM	360	"D$ parity tl1\t: %u\n"
80dc0d6b DM	361	"I$ parity tl1\t: %u\n"
1da177e4	362	#ifndef CONFIG_SMP
1da177e4 LT	363	"Cpu0ClkTck\t: %016lx\n"
	364	#endif
	365	,
	366	sparc_cpu_type,
	367	sparc_fpu_type,
c3cf5e8c	368	sparc_pmu_type,
90a6646b DM	369	prom_version,
	370	((tlb_type == hypervisor) ?
	371	"sun4v" :
	372	"sun4u"),
4d45cbac DM	373	ncpus_probed,
4d45cbac DM	374	num_online_cpus(),
80dc0d6b	375	dcache_parity_tl1_occurred,
3ac66e33	376	icache_parity_tl1_occurred
1da177e4	377	#ifndef CONFIG_SMP
3ac66e33	378	, cpu_data(0).clock_tick
1da177e4 LT	379	#endif
	380	);
	381	#ifdef CONFIG_SMP
	382	smp_bogo(m);
	383	#endif
	384	mmu_info(m);
	385	#ifdef CONFIG_SMP
	386	smp_info(m);
	387	#endif
	388	return 0;
	389	}
	390
	391	static void c_start(struct seq_file m, loff_t *pos)
	392	{
	393	/* The pointer we are returning is arbitrary,
	394	* it just has to be non-NULL and not IS_ERR
	395	* in the success case.
	396	*/
	397	return *pos == 0 ? &c_start : NULL;
	398	}
	399
	400	static void c_next(struct seq_file m, void v, loff_t pos)
	401	{
	402	++*pos;
	403	return c_start(m, pos);
	404	}
	405
	406	static void c_stop(struct seq_file m, void v)
	407	{
	408	}
	409
872e2be7	410	const struct seq_operations cpuinfo_op = {
1da177e4 LT	411	.start =c_start,
	412	.next = c_next,
	413	.stop = c_stop,
	414	.show = show_cpuinfo,
	415	};
	416
	417	extern int stop_a_enabled;
	418
	419	void sun_do_break(void)
	420	{
	421	if (!stop_a_enabled)
	422	return;
	423
	424	prom_printf("\n");
	425	flush_user_windows();
	426
	427	prom_cmdline();
	428	}
917c3660	429	EXPORT_SYMBOL(sun_do_break);
1da177e4	430
1da177e4	431	int stop_a_enabled = 1;
917c3660	432	EXPORT_SYMBOL(stop_a_enabled);