Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* smp.c: Sparc SMP support. |
2 | * | |
3 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | |
4 | * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | |
5 | * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org) | |
6 | */ | |
7 | ||
8 | #include <asm/head.h> | |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/sched.h> | |
12 | #include <linux/threads.h> | |
13 | #include <linux/smp.h> | |
1da177e4 LT |
14 | #include <linux/interrupt.h> |
15 | #include <linux/kernel_stat.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/spinlock.h> | |
18 | #include <linux/mm.h> | |
19 | #include <linux/fs.h> | |
20 | #include <linux/seq_file.h> | |
21 | #include <linux/cache.h> | |
22 | #include <linux/delay.h> | |
23 | ||
24 | #include <asm/ptrace.h> | |
25 | #include <asm/atomic.h> | |
26 | ||
27 | #include <asm/irq.h> | |
28 | #include <asm/page.h> | |
29 | #include <asm/pgalloc.h> | |
30 | #include <asm/pgtable.h> | |
31 | #include <asm/oplib.h> | |
32 | #include <asm/cacheflush.h> | |
33 | #include <asm/tlbflush.h> | |
34 | #include <asm/cpudata.h> | |
8401707f | 35 | #include <asm/leon.h> |
1da177e4 | 36 | |
32231a66 AV |
37 | #include "irq.h" |
38 | ||
409832f5 | 39 | volatile unsigned long cpu_callin_map[NR_CPUS] __cpuinitdata = {0,}; |
1da177e4 | 40 | |
a54123e2 | 41 | cpumask_t smp_commenced_mask = CPU_MASK_NONE; |
1da177e4 LT |
42 | |
43 | /* The only guaranteed locking primitive available on all Sparc | |
44 | * processors is 'ldstub [%reg + immediate], %dest_reg' which atomically | |
45 | * places the current byte at the effective address into dest_reg and | |
46 | * places 0xff there afterwards. Pretty lame locking primitive | |
47 | * compared to the Alpha and the Intel no? Most Sparcs have 'swap' | |
48 | * instruction which is much better... | |
49 | */ | |
50 | ||
92d452f0 | 51 | void __cpuinit smp_store_cpu_info(int id) |
1da177e4 LT |
52 | { |
53 | int cpu_node; | |
54 | ||
55 | cpu_data(id).udelay_val = loops_per_jiffy; | |
56 | ||
57 | cpu_find_by_mid(id, &cpu_node); | |
58 | cpu_data(id).clock_tick = prom_getintdefault(cpu_node, | |
59 | "clock-frequency", 0); | |
60 | cpu_data(id).prom_node = cpu_node; | |
61 | cpu_data(id).mid = cpu_get_hwmid(cpu_node); | |
650fb838 | 62 | |
1da177e4 LT |
63 | if (cpu_data(id).mid < 0) |
64 | panic("No MID found for CPU%d at node 0x%08d", id, cpu_node); | |
65 | } | |
66 | ||
67 | void __init smp_cpus_done(unsigned int max_cpus) | |
68 | { | |
a54123e2 | 69 | extern void smp4m_smp_done(void); |
8b3c848c | 70 | extern void smp4d_smp_done(void); |
a54123e2 | 71 | unsigned long bogosum = 0; |
ec7c14bd | 72 | int cpu, num = 0; |
a54123e2 | 73 | |
ec7c14bd RR |
74 | for_each_online_cpu(cpu) { |
75 | num++; | |
76 | bogosum += cpu_data(cpu).udelay_val; | |
77 | } | |
a54123e2 BB |
78 | |
79 | printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n", | |
80 | num, bogosum/(500000/HZ), | |
81 | (bogosum/(5000/HZ))%100); | |
82 | ||
8b3c848c RB |
83 | switch(sparc_cpu_model) { |
84 | case sun4: | |
85 | printk("SUN4\n"); | |
86 | BUG(); | |
87 | break; | |
88 | case sun4c: | |
89 | printk("SUN4C\n"); | |
90 | BUG(); | |
91 | break; | |
92 | case sun4m: | |
93 | smp4m_smp_done(); | |
94 | break; | |
95 | case sun4d: | |
96 | smp4d_smp_done(); | |
97 | break; | |
8401707f KE |
98 | case sparc_leon: |
99 | leon_smp_done(); | |
100 | break; | |
8b3c848c RB |
101 | case sun4e: |
102 | printk("SUN4E\n"); | |
103 | BUG(); | |
104 | break; | |
105 | case sun4u: | |
106 | printk("SUN4U\n"); | |
107 | BUG(); | |
108 | break; | |
109 | default: | |
110 | printk("UNKNOWN!\n"); | |
111 | BUG(); | |
112 | break; | |
113 | }; | |
1da177e4 LT |
114 | } |
115 | ||
116 | void cpu_panic(void) | |
117 | { | |
118 | printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id()); | |
119 | panic("SMP bolixed\n"); | |
120 | } | |
121 | ||
409832f5 | 122 | struct linux_prom_registers smp_penguin_ctable __cpuinitdata = { 0 }; |
1da177e4 | 123 | |
1da177e4 LT |
124 | void smp_send_reschedule(int cpu) |
125 | { | |
126 | /* See sparc64 */ | |
127 | } | |
128 | ||
129 | void smp_send_stop(void) | |
130 | { | |
131 | } | |
132 | ||
133 | void smp_flush_cache_all(void) | |
134 | { | |
135 | xc0((smpfunc_t) BTFIXUP_CALL(local_flush_cache_all)); | |
136 | local_flush_cache_all(); | |
137 | } | |
138 | ||
139 | void smp_flush_tlb_all(void) | |
140 | { | |
141 | xc0((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_all)); | |
142 | local_flush_tlb_all(); | |
143 | } | |
144 | ||
145 | void smp_flush_cache_mm(struct mm_struct *mm) | |
146 | { | |
147 | if(mm->context != NO_CONTEXT) { | |
81f1adf0 | 148 | cpumask_t cpu_mask = *mm_cpumask(mm); |
1da177e4 LT |
149 | cpu_clear(smp_processor_id(), cpu_mask); |
150 | if (!cpus_empty(cpu_mask)) | |
151 | xc1((smpfunc_t) BTFIXUP_CALL(local_flush_cache_mm), (unsigned long) mm); | |
152 | local_flush_cache_mm(mm); | |
153 | } | |
154 | } | |
155 | ||
156 | void smp_flush_tlb_mm(struct mm_struct *mm) | |
157 | { | |
158 | if(mm->context != NO_CONTEXT) { | |
81f1adf0 | 159 | cpumask_t cpu_mask = *mm_cpumask(mm); |
1da177e4 LT |
160 | cpu_clear(smp_processor_id(), cpu_mask); |
161 | if (!cpus_empty(cpu_mask)) { | |
162 | xc1((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_mm), (unsigned long) mm); | |
163 | if(atomic_read(&mm->mm_users) == 1 && current->active_mm == mm) | |
81f1adf0 RR |
164 | cpumask_copy(mm_cpumask(mm), |
165 | cpumask_of(smp_processor_id())); | |
1da177e4 LT |
166 | } |
167 | local_flush_tlb_mm(mm); | |
168 | } | |
169 | } | |
170 | ||
171 | void smp_flush_cache_range(struct vm_area_struct *vma, unsigned long start, | |
172 | unsigned long end) | |
173 | { | |
174 | struct mm_struct *mm = vma->vm_mm; | |
175 | ||
176 | if (mm->context != NO_CONTEXT) { | |
81f1adf0 | 177 | cpumask_t cpu_mask = *mm_cpumask(mm); |
1da177e4 LT |
178 | cpu_clear(smp_processor_id(), cpu_mask); |
179 | if (!cpus_empty(cpu_mask)) | |
180 | xc3((smpfunc_t) BTFIXUP_CALL(local_flush_cache_range), (unsigned long) vma, start, end); | |
181 | local_flush_cache_range(vma, start, end); | |
182 | } | |
183 | } | |
184 | ||
185 | void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | |
186 | unsigned long end) | |
187 | { | |
188 | struct mm_struct *mm = vma->vm_mm; | |
189 | ||
190 | if (mm->context != NO_CONTEXT) { | |
81f1adf0 | 191 | cpumask_t cpu_mask = *mm_cpumask(mm); |
1da177e4 LT |
192 | cpu_clear(smp_processor_id(), cpu_mask); |
193 | if (!cpus_empty(cpu_mask)) | |
194 | xc3((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_range), (unsigned long) vma, start, end); | |
195 | local_flush_tlb_range(vma, start, end); | |
196 | } | |
197 | } | |
198 | ||
199 | void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page) | |
200 | { | |
201 | struct mm_struct *mm = vma->vm_mm; | |
202 | ||
203 | if(mm->context != NO_CONTEXT) { | |
81f1adf0 | 204 | cpumask_t cpu_mask = *mm_cpumask(mm); |
1da177e4 LT |
205 | cpu_clear(smp_processor_id(), cpu_mask); |
206 | if (!cpus_empty(cpu_mask)) | |
207 | xc2((smpfunc_t) BTFIXUP_CALL(local_flush_cache_page), (unsigned long) vma, page); | |
208 | local_flush_cache_page(vma, page); | |
209 | } | |
210 | } | |
211 | ||
212 | void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) | |
213 | { | |
214 | struct mm_struct *mm = vma->vm_mm; | |
215 | ||
216 | if(mm->context != NO_CONTEXT) { | |
81f1adf0 | 217 | cpumask_t cpu_mask = *mm_cpumask(mm); |
1da177e4 LT |
218 | cpu_clear(smp_processor_id(), cpu_mask); |
219 | if (!cpus_empty(cpu_mask)) | |
220 | xc2((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_page), (unsigned long) vma, page); | |
221 | local_flush_tlb_page(vma, page); | |
222 | } | |
223 | } | |
224 | ||
225 | void smp_reschedule_irq(void) | |
226 | { | |
227 | set_need_resched(); | |
228 | } | |
229 | ||
230 | void smp_flush_page_to_ram(unsigned long page) | |
231 | { | |
232 | /* Current theory is that those who call this are the one's | |
233 | * who have just dirtied their cache with the pages contents | |
234 | * in kernel space, therefore we only run this on local cpu. | |
235 | * | |
236 | * XXX This experiment failed, research further... -DaveM | |
237 | */ | |
238 | #if 1 | |
239 | xc1((smpfunc_t) BTFIXUP_CALL(local_flush_page_to_ram), page); | |
240 | #endif | |
241 | local_flush_page_to_ram(page); | |
242 | } | |
243 | ||
244 | void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr) | |
245 | { | |
81f1adf0 | 246 | cpumask_t cpu_mask = *mm_cpumask(mm); |
1da177e4 LT |
247 | cpu_clear(smp_processor_id(), cpu_mask); |
248 | if (!cpus_empty(cpu_mask)) | |
249 | xc2((smpfunc_t) BTFIXUP_CALL(local_flush_sig_insns), (unsigned long) mm, insn_addr); | |
250 | local_flush_sig_insns(mm, insn_addr); | |
251 | } | |
252 | ||
253 | extern unsigned int lvl14_resolution; | |
254 | ||
255 | /* /proc/profile writes can call this, don't __init it please. */ | |
256 | static DEFINE_SPINLOCK(prof_setup_lock); | |
257 | ||
258 | int setup_profiling_timer(unsigned int multiplier) | |
259 | { | |
260 | int i; | |
261 | unsigned long flags; | |
262 | ||
263 | /* Prevent level14 ticker IRQ flooding. */ | |
264 | if((!multiplier) || (lvl14_resolution / multiplier) < 500) | |
265 | return -EINVAL; | |
266 | ||
267 | spin_lock_irqsave(&prof_setup_lock, flags); | |
fff8efe7 | 268 | for_each_possible_cpu(i) { |
394e3902 | 269 | load_profile_irq(i, lvl14_resolution / multiplier); |
1da177e4 LT |
270 | prof_multiplier(i) = multiplier; |
271 | } | |
272 | spin_unlock_irqrestore(&prof_setup_lock, flags); | |
273 | ||
274 | return 0; | |
275 | } | |
276 | ||
a54123e2 | 277 | void __init smp_prepare_cpus(unsigned int max_cpus) |
1da177e4 | 278 | { |
b4cff846 AV |
279 | extern void __init smp4m_boot_cpus(void); |
280 | extern void __init smp4d_boot_cpus(void); | |
7202fb49 | 281 | int i, cpuid, extra; |
a54123e2 | 282 | |
a54123e2 BB |
283 | printk("Entering SMP Mode...\n"); |
284 | ||
a54123e2 BB |
285 | extra = 0; |
286 | for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) { | |
7202fb49 | 287 | if (cpuid >= NR_CPUS) |
a54123e2 BB |
288 | extra++; |
289 | } | |
7202fb49 BB |
290 | /* i = number of cpus */ |
291 | if (extra && max_cpus > i - extra) | |
a54123e2 BB |
292 | printk("Warning: NR_CPUS is too low to start all cpus\n"); |
293 | ||
294 | smp_store_cpu_info(boot_cpu_id); | |
295 | ||
8b3c848c RB |
296 | switch(sparc_cpu_model) { |
297 | case sun4: | |
298 | printk("SUN4\n"); | |
299 | BUG(); | |
300 | break; | |
301 | case sun4c: | |
302 | printk("SUN4C\n"); | |
303 | BUG(); | |
304 | break; | |
305 | case sun4m: | |
306 | smp4m_boot_cpus(); | |
307 | break; | |
308 | case sun4d: | |
309 | smp4d_boot_cpus(); | |
310 | break; | |
8401707f KE |
311 | case sparc_leon: |
312 | leon_boot_cpus(); | |
313 | break; | |
8b3c848c RB |
314 | case sun4e: |
315 | printk("SUN4E\n"); | |
316 | BUG(); | |
317 | break; | |
318 | case sun4u: | |
319 | printk("SUN4U\n"); | |
320 | BUG(); | |
321 | break; | |
322 | default: | |
323 | printk("UNKNOWN!\n"); | |
324 | BUG(); | |
325 | break; | |
326 | }; | |
1da177e4 LT |
327 | } |
328 | ||
7202fb49 BB |
329 | /* Set this up early so that things like the scheduler can init |
330 | * properly. We use the same cpu mask for both the present and | |
331 | * possible cpu map. | |
332 | */ | |
333 | void __init smp_setup_cpu_possible_map(void) | |
334 | { | |
335 | int instance, mid; | |
336 | ||
337 | instance = 0; | |
338 | while (!cpu_find_by_instance(instance, NULL, &mid)) { | |
339 | if (mid < NR_CPUS) { | |
fe73971c RR |
340 | set_cpu_possible(mid, true); |
341 | set_cpu_present(mid, true); | |
7202fb49 BB |
342 | } |
343 | instance++; | |
344 | } | |
345 | } | |
346 | ||
92d452f0 | 347 | void __init smp_prepare_boot_cpu(void) |
1da177e4 | 348 | { |
a54123e2 BB |
349 | int cpuid = hard_smp_processor_id(); |
350 | ||
351 | if (cpuid >= NR_CPUS) { | |
352 | prom_printf("Serious problem, boot cpu id >= NR_CPUS\n"); | |
353 | prom_halt(); | |
354 | } | |
355 | if (cpuid != 0) | |
356 | printk("boot cpu id != 0, this could work but is untested\n"); | |
357 | ||
358 | current_thread_info()->cpu = cpuid; | |
fe73971c RR |
359 | set_cpu_online(cpuid, true); |
360 | set_cpu_possible(cpuid, true); | |
1da177e4 LT |
361 | } |
362 | ||
92d452f0 | 363 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 | 364 | { |
b4cff846 AV |
365 | extern int __cpuinit smp4m_boot_one_cpu(int); |
366 | extern int __cpuinit smp4d_boot_one_cpu(int); | |
8b3c848c RB |
367 | int ret=0; |
368 | ||
369 | switch(sparc_cpu_model) { | |
370 | case sun4: | |
371 | printk("SUN4\n"); | |
372 | BUG(); | |
373 | break; | |
374 | case sun4c: | |
375 | printk("SUN4C\n"); | |
376 | BUG(); | |
377 | break; | |
378 | case sun4m: | |
379 | ret = smp4m_boot_one_cpu(cpu); | |
380 | break; | |
381 | case sun4d: | |
382 | ret = smp4d_boot_one_cpu(cpu); | |
383 | break; | |
8401707f KE |
384 | case sparc_leon: |
385 | ret = leon_boot_one_cpu(cpu); | |
386 | break; | |
8b3c848c RB |
387 | case sun4e: |
388 | printk("SUN4E\n"); | |
389 | BUG(); | |
390 | break; | |
391 | case sun4u: | |
392 | printk("SUN4U\n"); | |
393 | BUG(); | |
394 | break; | |
395 | default: | |
396 | printk("UNKNOWN!\n"); | |
397 | BUG(); | |
398 | break; | |
399 | }; | |
a54123e2 BB |
400 | |
401 | if (!ret) { | |
402 | cpu_set(cpu, smp_commenced_mask); | |
403 | while (!cpu_online(cpu)) | |
404 | mb(); | |
405 | } | |
406 | return ret; | |
1da177e4 LT |
407 | } |
408 | ||
409 | void smp_bogo(struct seq_file *m) | |
410 | { | |
411 | int i; | |
412 | ||
394e3902 AM |
413 | for_each_online_cpu(i) { |
414 | seq_printf(m, | |
415 | "Cpu%dBogo\t: %lu.%02lu\n", | |
416 | i, | |
417 | cpu_data(i).udelay_val/(500000/HZ), | |
418 | (cpu_data(i).udelay_val/(5000/HZ))%100); | |
1da177e4 LT |
419 | } |
420 | } | |
421 | ||
422 | void smp_info(struct seq_file *m) | |
423 | { | |
424 | int i; | |
425 | ||
426 | seq_printf(m, "State:\n"); | |
394e3902 AM |
427 | for_each_online_cpu(i) |
428 | seq_printf(m, "CPU%d\t\t: online\n", i); | |
1da177e4 | 429 | } |