Commit | Line | Data |
---|---|---|
88278ca2 | 1 | /* |
1da177e4 LT |
2 | * arch/sparc/kernel/sun4d_irq.c: |
3 | * SS1000/SC2000 interrupt handling. | |
4 | * | |
5 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | |
6 | * Heavily based on arch/sparc/kernel/irq.c. | |
7 | */ | |
8 | ||
1da177e4 LT |
9 | #include <linux/errno.h> |
10 | #include <linux/linkage.h> | |
11 | #include <linux/kernel_stat.h> | |
12 | #include <linux/signal.h> | |
13 | #include <linux/sched.h> | |
14 | #include <linux/ptrace.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/random.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/smp.h> | |
1da177e4 LT |
20 | #include <linux/spinlock.h> |
21 | #include <linux/seq_file.h> | |
454eeb2d DM |
22 | #include <linux/of.h> |
23 | #include <linux/of_device.h> | |
1da177e4 LT |
24 | |
25 | #include <asm/ptrace.h> | |
26 | #include <asm/processor.h> | |
27 | #include <asm/system.h> | |
28 | #include <asm/psr.h> | |
29 | #include <asm/smp.h> | |
30 | #include <asm/vaddrs.h> | |
31 | #include <asm/timer.h> | |
32 | #include <asm/openprom.h> | |
33 | #include <asm/oplib.h> | |
34 | #include <asm/traps.h> | |
35 | #include <asm/irq.h> | |
36 | #include <asm/io.h> | |
37 | #include <asm/pgalloc.h> | |
38 | #include <asm/pgtable.h> | |
1da177e4 LT |
39 | #include <asm/sbi.h> |
40 | #include <asm/cacheflush.h> | |
0d84438d | 41 | #include <asm/irq_regs.h> |
1da177e4 | 42 | |
32231a66 AV |
43 | #include "irq.h" |
44 | ||
1da177e4 LT |
45 | /* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */ |
46 | /* #define DISTRIBUTE_IRQS */ | |
47 | ||
f5f10857 DM |
48 | struct sun4d_timer_regs { |
49 | u32 l10_timer_limit; | |
50 | u32 l10_cur_countx; | |
51 | u32 l10_limit_noclear; | |
52 | u32 ctrl; | |
53 | u32 l10_cur_count; | |
54 | }; | |
55 | ||
56 | static struct sun4d_timer_regs __iomem *sun4d_timers; | |
57 | ||
1da177e4 LT |
58 | #define TIMER_IRQ 10 |
59 | ||
60 | #define MAX_STATIC_ALLOC 4 | |
61 | extern struct irqaction static_irqaction[MAX_STATIC_ALLOC]; | |
62 | extern int static_irq_count; | |
1da177e4 | 63 | #ifdef CONFIG_SMP |
c61c65cd | 64 | static unsigned char sbus_tid[32]; |
1da177e4 LT |
65 | #endif |
66 | ||
a54123e2 | 67 | static struct irqaction *irq_action[NR_IRQS]; |
1da177e4 LT |
68 | extern spinlock_t irq_action_lock; |
69 | ||
c61c65cd | 70 | static struct sbus_action { |
1da177e4 LT |
71 | struct irqaction *action; |
72 | /* For SMP this needs to be extended */ | |
73 | } *sbus_actions; | |
74 | ||
75 | static int pil_to_sbus[] = { | |
76 | 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0, | |
77 | }; | |
78 | ||
79 | static int sbus_to_pil[] = { | |
80 | 0, 2, 3, 5, 7, 9, 11, 13, | |
81 | }; | |
82 | ||
83 | static int nsbi; | |
84 | #ifdef CONFIG_SMP | |
85 | DEFINE_SPINLOCK(sun4d_imsk_lock); | |
86 | #endif | |
87 | ||
88 | int show_sun4d_interrupts(struct seq_file *p, void *v) | |
89 | { | |
90 | int i = *(loff_t *) v, j = 0, k = 0, sbusl; | |
91 | struct irqaction * action; | |
92 | unsigned long flags; | |
93 | #ifdef CONFIG_SMP | |
94 | int x; | |
95 | #endif | |
96 | ||
97 | spin_lock_irqsave(&irq_action_lock, flags); | |
98 | if (i < NR_IRQS) { | |
99 | sbusl = pil_to_sbus[i]; | |
100 | if (!sbusl) { | |
101 | action = *(i + irq_action); | |
102 | if (!action) | |
103 | goto out_unlock; | |
104 | } else { | |
105 | for (j = 0; j < nsbi; j++) { | |
106 | for (k = 0; k < 4; k++) | |
107 | if ((action = sbus_actions [(j << 5) + (sbusl << 2) + k].action)) | |
108 | goto found_it; | |
109 | } | |
110 | goto out_unlock; | |
111 | } | |
112 | found_it: seq_printf(p, "%3d: ", i); | |
113 | #ifndef CONFIG_SMP | |
114 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
115 | #else | |
394e3902 AM |
116 | for_each_online_cpu(x) |
117 | seq_printf(p, "%10u ", | |
118 | kstat_cpu(cpu_logical_map(x)).irqs[i]); | |
1da177e4 LT |
119 | #endif |
120 | seq_printf(p, "%c %s", | |
67413202 | 121 | (action->flags & IRQF_DISABLED) ? '+' : ' ', |
1da177e4 LT |
122 | action->name); |
123 | action = action->next; | |
124 | for (;;) { | |
125 | for (; action; action = action->next) { | |
126 | seq_printf(p, ",%s %s", | |
67413202 | 127 | (action->flags & IRQF_DISABLED) ? " +" : "", |
1da177e4 LT |
128 | action->name); |
129 | } | |
130 | if (!sbusl) break; | |
131 | k++; | |
132 | if (k < 4) | |
133 | action = sbus_actions [(j << 5) + (sbusl << 2) + k].action; | |
134 | else { | |
135 | j++; | |
136 | if (j == nsbi) break; | |
137 | k = 0; | |
138 | action = sbus_actions [(j << 5) + (sbusl << 2)].action; | |
139 | } | |
140 | } | |
141 | seq_putc(p, '\n'); | |
142 | } | |
143 | out_unlock: | |
144 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
145 | return 0; | |
146 | } | |
147 | ||
148 | void sun4d_free_irq(unsigned int irq, void *dev_id) | |
149 | { | |
150 | struct irqaction *action, **actionp; | |
151 | struct irqaction *tmp = NULL; | |
152 | unsigned long flags; | |
153 | ||
154 | spin_lock_irqsave(&irq_action_lock, flags); | |
155 | if (irq < 15) | |
156 | actionp = irq + irq_action; | |
157 | else | |
158 | actionp = &(sbus_actions[irq - (1 << 5)].action); | |
159 | action = *actionp; | |
160 | if (!action) { | |
161 | printk("Trying to free free IRQ%d\n",irq); | |
162 | goto out_unlock; | |
163 | } | |
164 | if (dev_id) { | |
165 | for (; action; action = action->next) { | |
166 | if (action->dev_id == dev_id) | |
167 | break; | |
168 | tmp = action; | |
169 | } | |
170 | if (!action) { | |
171 | printk("Trying to free free shared IRQ%d\n",irq); | |
172 | goto out_unlock; | |
173 | } | |
67413202 | 174 | } else if (action->flags & IRQF_SHARED) { |
1da177e4 LT |
175 | printk("Trying to free shared IRQ%d with NULL device ID\n", irq); |
176 | goto out_unlock; | |
177 | } | |
178 | if (action->flags & SA_STATIC_ALLOC) | |
179 | { | |
180 | /* This interrupt is marked as specially allocated | |
181 | * so it is a bad idea to free it. | |
182 | */ | |
183 | printk("Attempt to free statically allocated IRQ%d (%s)\n", | |
184 | irq, action->name); | |
185 | goto out_unlock; | |
186 | } | |
187 | ||
188 | if (action && tmp) | |
189 | tmp->next = action->next; | |
190 | else | |
191 | *actionp = action->next; | |
192 | ||
193 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
194 | ||
195 | synchronize_irq(irq); | |
196 | ||
197 | spin_lock_irqsave(&irq_action_lock, flags); | |
198 | ||
199 | kfree(action); | |
200 | ||
201 | if (!(*actionp)) | |
0f516813 | 202 | __disable_irq(irq); |
1da177e4 LT |
203 | |
204 | out_unlock: | |
205 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
206 | } | |
207 | ||
208 | extern void unexpected_irq(int, void *, struct pt_regs *); | |
209 | ||
210 | void sun4d_handler_irq(int irq, struct pt_regs * regs) | |
211 | { | |
0d84438d | 212 | struct pt_regs *old_regs; |
1da177e4 LT |
213 | struct irqaction * action; |
214 | int cpu = smp_processor_id(); | |
215 | /* SBUS IRQ level (1 - 7) */ | |
216 | int sbusl = pil_to_sbus[irq]; | |
217 | ||
218 | /* FIXME: Is this necessary?? */ | |
219 | cc_get_ipen(); | |
220 | ||
221 | cc_set_iclr(1 << irq); | |
222 | ||
0d84438d | 223 | old_regs = set_irq_regs(regs); |
1da177e4 LT |
224 | irq_enter(); |
225 | kstat_cpu(cpu).irqs[irq]++; | |
226 | if (!sbusl) { | |
227 | action = *(irq + irq_action); | |
228 | if (!action) | |
229 | unexpected_irq(irq, NULL, regs); | |
230 | do { | |
0d84438d | 231 | action->handler(irq, action->dev_id); |
1da177e4 LT |
232 | action = action->next; |
233 | } while (action); | |
234 | } else { | |
235 | int bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff; | |
236 | int sbino; | |
237 | struct sbus_action *actionp; | |
238 | unsigned mask, slot; | |
239 | int sbil = (sbusl << 2); | |
240 | ||
241 | bw_clear_intr_mask(sbusl, bus_mask); | |
242 | ||
243 | /* Loop for each pending SBI */ | |
244 | for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1) | |
245 | if (bus_mask & 1) { | |
246 | mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil); | |
247 | mask &= (0xf << sbil); | |
248 | actionp = sbus_actions + (sbino << 5) + (sbil); | |
249 | /* Loop for each pending SBI slot */ | |
250 | for (slot = (1 << sbil); mask; slot <<= 1, actionp++) | |
251 | if (mask & slot) { | |
252 | mask &= ~slot; | |
253 | action = actionp->action; | |
254 | ||
255 | if (!action) | |
256 | unexpected_irq(irq, NULL, regs); | |
257 | do { | |
0d84438d | 258 | action->handler(irq, action->dev_id); |
1da177e4 LT |
259 | action = action->next; |
260 | } while (action); | |
261 | release_sbi(SBI2DEVID(sbino), slot); | |
262 | } | |
263 | } | |
264 | } | |
265 | irq_exit(); | |
0d84438d | 266 | set_irq_regs(old_regs); |
1da177e4 LT |
267 | } |
268 | ||
1da177e4 | 269 | int sun4d_request_irq(unsigned int irq, |
40220c1a | 270 | irq_handler_t handler, |
1da177e4 LT |
271 | unsigned long irqflags, const char * devname, void *dev_id) |
272 | { | |
273 | struct irqaction *action, *tmp = NULL, **actionp; | |
274 | unsigned long flags; | |
275 | int ret; | |
276 | ||
277 | if(irq > 14 && irq < (1 << 5)) { | |
278 | ret = -EINVAL; | |
279 | goto out; | |
280 | } | |
281 | ||
282 | if (!handler) { | |
283 | ret = -EINVAL; | |
284 | goto out; | |
285 | } | |
286 | ||
287 | spin_lock_irqsave(&irq_action_lock, flags); | |
288 | ||
289 | if (irq >= (1 << 5)) | |
290 | actionp = &(sbus_actions[irq - (1 << 5)].action); | |
291 | else | |
292 | actionp = irq + irq_action; | |
293 | action = *actionp; | |
294 | ||
295 | if (action) { | |
67413202 | 296 | if ((action->flags & IRQF_SHARED) && (irqflags & IRQF_SHARED)) { |
1da177e4 LT |
297 | for (tmp = action; tmp->next; tmp = tmp->next); |
298 | } else { | |
299 | ret = -EBUSY; | |
300 | goto out_unlock; | |
301 | } | |
67413202 | 302 | if ((action->flags & IRQF_DISABLED) ^ (irqflags & IRQF_DISABLED)) { |
1da177e4 LT |
303 | printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq); |
304 | ret = -EBUSY; | |
305 | goto out_unlock; | |
306 | } | |
307 | action = NULL; /* Or else! */ | |
308 | } | |
309 | ||
310 | /* If this is flagged as statically allocated then we use our | |
311 | * private struct which is never freed. | |
312 | */ | |
313 | if (irqflags & SA_STATIC_ALLOC) { | |
314 | if (static_irq_count < MAX_STATIC_ALLOC) | |
315 | action = &static_irqaction[static_irq_count++]; | |
316 | else | |
317 | printk("Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", irq, devname); | |
318 | } | |
319 | ||
320 | if (action == NULL) | |
5cbded58 | 321 | action = kmalloc(sizeof(struct irqaction), |
1da177e4 LT |
322 | GFP_ATOMIC); |
323 | ||
324 | if (!action) { | |
325 | ret = -ENOMEM; | |
326 | goto out_unlock; | |
327 | } | |
328 | ||
329 | action->handler = handler; | |
330 | action->flags = irqflags; | |
331 | cpus_clear(action->mask); | |
332 | action->name = devname; | |
333 | action->next = NULL; | |
334 | action->dev_id = dev_id; | |
335 | ||
336 | if (tmp) | |
337 | tmp->next = action; | |
338 | else | |
339 | *actionp = action; | |
340 | ||
0f516813 | 341 | __enable_irq(irq); |
1da177e4 LT |
342 | |
343 | ret = 0; | |
344 | out_unlock: | |
345 | spin_unlock_irqrestore(&irq_action_lock, flags); | |
346 | out: | |
347 | return ret; | |
348 | } | |
349 | ||
350 | static void sun4d_disable_irq(unsigned int irq) | |
351 | { | |
352 | #ifdef CONFIG_SMP | |
353 | int tid = sbus_tid[(irq >> 5) - 1]; | |
354 | unsigned long flags; | |
355 | #endif | |
356 | ||
357 | if (irq < NR_IRQS) return; | |
358 | #ifdef CONFIG_SMP | |
359 | spin_lock_irqsave(&sun4d_imsk_lock, flags); | |
360 | cc_set_imsk_other(tid, cc_get_imsk_other(tid) | (1 << sbus_to_pil[(irq >> 2) & 7])); | |
361 | spin_unlock_irqrestore(&sun4d_imsk_lock, flags); | |
362 | #else | |
363 | cc_set_imsk(cc_get_imsk() | (1 << sbus_to_pil[(irq >> 2) & 7])); | |
364 | #endif | |
365 | } | |
366 | ||
367 | static void sun4d_enable_irq(unsigned int irq) | |
368 | { | |
369 | #ifdef CONFIG_SMP | |
370 | int tid = sbus_tid[(irq >> 5) - 1]; | |
371 | unsigned long flags; | |
372 | #endif | |
373 | ||
374 | if (irq < NR_IRQS) return; | |
375 | #ifdef CONFIG_SMP | |
376 | spin_lock_irqsave(&sun4d_imsk_lock, flags); | |
377 | cc_set_imsk_other(tid, cc_get_imsk_other(tid) & ~(1 << sbus_to_pil[(irq >> 2) & 7])); | |
378 | spin_unlock_irqrestore(&sun4d_imsk_lock, flags); | |
379 | #else | |
380 | cc_set_imsk(cc_get_imsk() & ~(1 << sbus_to_pil[(irq >> 2) & 7])); | |
381 | #endif | |
382 | } | |
383 | ||
384 | #ifdef CONFIG_SMP | |
385 | static void sun4d_set_cpu_int(int cpu, int level) | |
386 | { | |
387 | sun4d_send_ipi(cpu, level); | |
388 | } | |
389 | ||
390 | static void sun4d_clear_ipi(int cpu, int level) | |
391 | { | |
392 | } | |
393 | ||
394 | static void sun4d_set_udt(int cpu) | |
395 | { | |
396 | } | |
397 | ||
398 | /* Setup IRQ distribution scheme. */ | |
399 | void __init sun4d_distribute_irqs(void) | |
400 | { | |
71d37211 DM |
401 | struct device_node *dp; |
402 | ||
1da177e4 | 403 | #ifdef DISTRIBUTE_IRQS |
71d37211 | 404 | cpumask_t sbus_serving_map; |
1da177e4 LT |
405 | |
406 | sbus_serving_map = cpu_present_map; | |
71d37211 DM |
407 | for_each_node_by_name(dp, "sbi") { |
408 | int board = of_getintprop_default(dp, "board#", 0); | |
409 | ||
410 | if ((board * 2) == boot_cpu_id && cpu_isset(board * 2 + 1, cpu_present_map)) | |
411 | sbus_tid[board] = (board * 2 + 1); | |
412 | else if (cpu_isset(board * 2, cpu_present_map)) | |
413 | sbus_tid[board] = (board * 2); | |
414 | else if (cpu_isset(board * 2 + 1, cpu_present_map)) | |
415 | sbus_tid[board] = (board * 2 + 1); | |
1da177e4 | 416 | else |
71d37211 DM |
417 | sbus_tid[board] = 0xff; |
418 | if (sbus_tid[board] != 0xff) | |
419 | cpu_clear(sbus_tid[board], sbus_serving_map); | |
1da177e4 | 420 | } |
71d37211 DM |
421 | for_each_node_by_name(dp, "sbi") { |
422 | int board = of_getintprop_default(dp, "board#", 0); | |
423 | if (sbus_tid[board] == 0xff) { | |
1da177e4 LT |
424 | int i = 31; |
425 | ||
71d37211 | 426 | if (cpus_empty(sbus_serving_map)) |
1da177e4 | 427 | sbus_serving_map = cpu_present_map; |
71d37211 | 428 | while (cpu_isset(i, sbus_serving_map)) |
1da177e4 | 429 | i--; |
71d37211 DM |
430 | sbus_tid[board] = i; |
431 | cpu_clear(i, sbus_serving_map); | |
1da177e4 | 432 | } |
71d37211 DM |
433 | } |
434 | for_each_node_by_name(dp, "sbi") { | |
435 | int devid = of_getintprop_default(dp, "device-id", 0); | |
436 | int board = of_getintprop_default(dp, "board#", 0); | |
437 | printk("sbus%d IRQs directed to CPU%d\n", board, sbus_tid[board]); | |
438 | set_sbi_tid(devid, sbus_tid[board] << 3); | |
1da177e4 LT |
439 | } |
440 | #else | |
1da177e4 LT |
441 | int cpuid = cpu_logical_map(1); |
442 | ||
443 | if (cpuid == -1) | |
444 | cpuid = cpu_logical_map(0); | |
71d37211 DM |
445 | for_each_node_by_name(dp, "sbi") { |
446 | int devid = of_getintprop_default(dp, "device-id", 0); | |
447 | int board = of_getintprop_default(dp, "board#", 0); | |
448 | sbus_tid[board] = cpuid; | |
449 | set_sbi_tid(devid, cpuid << 3); | |
1da177e4 LT |
450 | } |
451 | printk("All sbus IRQs directed to CPU%d\n", cpuid); | |
452 | #endif | |
453 | } | |
454 | #endif | |
455 | ||
456 | static void sun4d_clear_clock_irq(void) | |
457 | { | |
f5f10857 | 458 | sbus_readl(&sun4d_timers->l10_timer_limit); |
1da177e4 LT |
459 | } |
460 | ||
461 | static void sun4d_clear_profile_irq(int cpu) | |
462 | { | |
463 | bw_get_prof_limit(cpu); | |
464 | } | |
465 | ||
466 | static void sun4d_load_profile_irq(int cpu, unsigned int limit) | |
467 | { | |
468 | bw_set_prof_limit(cpu, limit); | |
469 | } | |
470 | ||
f5f10857 | 471 | static void __init sun4d_load_profile_irqs(void) |
1da177e4 | 472 | { |
f5f10857 | 473 | int cpu = 0, mid; |
1da177e4 | 474 | |
f5f10857 DM |
475 | while (!cpu_find_by_instance(cpu, NULL, &mid)) { |
476 | sun4d_load_profile_irq(mid >> 3, 0); | |
477 | cpu++; | |
478 | } | |
479 | } | |
480 | ||
481 | static void __init sun4d_fixup_trap_table(void) | |
482 | { | |
1da177e4 | 483 | #ifdef CONFIG_SMP |
f5f10857 DM |
484 | unsigned long flags; |
485 | extern unsigned long lvl14_save[4]; | |
486 | struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)]; | |
487 | extern unsigned int real_irq_entry[], smp4d_ticker[]; | |
488 | extern unsigned int patchme_maybe_smp_msg[]; | |
489 | ||
490 | /* Adjust so that we jump directly to smp4d_ticker */ | |
491 | lvl14_save[2] += smp4d_ticker - real_irq_entry; | |
492 | ||
493 | /* For SMP we use the level 14 ticker, however the bootup code | |
494 | * has copied the firmware's level 14 vector into the boot cpu's | |
495 | * trap table, we must fix this now or we get squashed. | |
496 | */ | |
497 | local_irq_save(flags); | |
498 | patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */ | |
499 | trap_table->inst_one = lvl14_save[0]; | |
500 | trap_table->inst_two = lvl14_save[1]; | |
501 | trap_table->inst_three = lvl14_save[2]; | |
502 | trap_table->inst_four = lvl14_save[3]; | |
503 | local_flush_cache_all(); | |
504 | local_irq_restore(flags); | |
1da177e4 | 505 | #endif |
f5f10857 DM |
506 | } |
507 | ||
508 | static void __init sun4d_init_timers(irq_handler_t counter_fn) | |
509 | { | |
510 | struct device_node *dp; | |
511 | struct resource res; | |
512 | const u32 *reg; | |
513 | int err; | |
514 | ||
515 | dp = of_find_node_by_name(NULL, "cpu-unit"); | |
516 | if (!dp) { | |
517 | prom_printf("sun4d_init_timers: Unable to find cpu-unit\n"); | |
518 | prom_halt(); | |
519 | } | |
520 | ||
521 | /* Which cpu-unit we use is arbitrary, we can view the bootbus timer | |
522 | * registers via any cpu's mapping. The first 'reg' property is the | |
523 | * bootbus. | |
524 | */ | |
525 | reg = of_get_property(dp, "reg", NULL); | |
526 | if (!reg) { | |
527 | prom_printf("sun4d_init_timers: No reg property\n"); | |
528 | prom_halt(); | |
529 | } | |
530 | ||
531 | res.start = reg[1]; | |
532 | res.end = reg[2] - 1; | |
533 | res.flags = reg[0] & 0xff; | |
534 | sun4d_timers = of_ioremap(&res, BW_TIMER_LIMIT, | |
535 | sizeof(struct sun4d_timer_regs), "user timer"); | |
536 | if (!sun4d_timers) { | |
537 | prom_printf("sun4d_init_timers: Can't map timer regs\n"); | |
538 | prom_halt(); | |
539 | } | |
540 | ||
541 | sbus_writel((((1000000/HZ) + 1) << 10), &sun4d_timers->l10_timer_limit); | |
1da177e4 | 542 | |
1da177e4 LT |
543 | master_l10_counter = &sun4d_timers->l10_cur_count; |
544 | master_l10_limit = &sun4d_timers->l10_timer_limit; | |
545 | ||
f5f10857 | 546 | err = request_irq(TIMER_IRQ, counter_fn, |
67413202 | 547 | (IRQF_DISABLED | SA_STATIC_ALLOC), |
1da177e4 | 548 | "timer", NULL); |
f5f10857 DM |
549 | if (err) { |
550 | prom_printf("sun4d_init_timers: request_irq() failed with %d\n", err); | |
1da177e4 LT |
551 | prom_halt(); |
552 | } | |
f5f10857 DM |
553 | sun4d_load_profile_irqs(); |
554 | sun4d_fixup_trap_table(); | |
1da177e4 LT |
555 | } |
556 | ||
557 | void __init sun4d_init_sbi_irq(void) | |
558 | { | |
71d37211 | 559 | struct device_node *dp; |
1da177e4 LT |
560 | |
561 | nsbi = 0; | |
71d37211 | 562 | for_each_node_by_name(dp, "sbi") |
1da177e4 | 563 | nsbi++; |
c80892d1 | 564 | sbus_actions = kzalloc (nsbi * 8 * 4 * sizeof(struct sbus_action), GFP_ATOMIC); |
d4accd60 DM |
565 | if (!sbus_actions) { |
566 | prom_printf("SUN4D: Cannot allocate sbus_actions, halting.\n"); | |
567 | prom_halt(); | |
568 | } | |
71d37211 DM |
569 | for_each_node_by_name(dp, "sbi") { |
570 | int devid = of_getintprop_default(dp, "device-id", 0); | |
571 | int board = of_getintprop_default(dp, "board#", 0); | |
572 | unsigned int mask; | |
573 | ||
1da177e4 | 574 | #ifdef CONFIG_SMP |
71d37211 DM |
575 | { |
576 | extern unsigned char boot_cpu_id; | |
1da177e4 | 577 | |
71d37211 DM |
578 | set_sbi_tid(devid, boot_cpu_id << 3); |
579 | sbus_tid[board] = boot_cpu_id; | |
580 | } | |
1da177e4 LT |
581 | #endif |
582 | /* Get rid of pending irqs from PROM */ | |
71d37211 | 583 | mask = acquire_sbi(devid, 0xffffffff); |
1da177e4 | 584 | if (mask) { |
71d37211 DM |
585 | printk ("Clearing pending IRQs %08x on SBI %d\n", mask, board); |
586 | release_sbi(devid, mask); | |
1da177e4 LT |
587 | } |
588 | } | |
589 | } | |
590 | ||
1da177e4 LT |
591 | void __init sun4d_init_IRQ(void) |
592 | { | |
593 | local_irq_disable(); | |
594 | ||
1da177e4 LT |
595 | BTFIXUPSET_CALL(enable_irq, sun4d_enable_irq, BTFIXUPCALL_NORM); |
596 | BTFIXUPSET_CALL(disable_irq, sun4d_disable_irq, BTFIXUPCALL_NORM); | |
597 | BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM); | |
598 | BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM); | |
599 | BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM); | |
1da177e4 LT |
600 | sparc_init_timers = sun4d_init_timers; |
601 | #ifdef CONFIG_SMP | |
602 | BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM); | |
603 | BTFIXUPSET_CALL(clear_cpu_int, sun4d_clear_ipi, BTFIXUPCALL_NOP); | |
604 | BTFIXUPSET_CALL(set_irq_udt, sun4d_set_udt, BTFIXUPCALL_NOP); | |
605 | #endif | |
606 | /* Cannot enable interrupts until OBP ticker is disabled. */ | |
607 | } |