[deliverable/linux.git] / arch / sparc / kernel / unaligned_64.c

/*
 * unaligned.c: Unaligned load/store trap handling with special
 *              cases for the kernel to do them more quickly.
 *
 * Copyright (C) 1996,2008 David S. Miller (davem@davemloft.net)
 * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */


#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <asm/asi.h>
#include <asm/ptrace.h>
#include <asm/pstate.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <linux/smp.h>
#include <linux/bitops.h>
#include <linux/perf_event.h>
#include <asm/fpumacro.h>

enum direction {
	load,    /* ld, ldd, ldh, ldsh */
	store,   /* st, std, sth, stsh */
	both,    /* Swap, ldstub, cas, ... */
	fpld,
	fpst,
	invalid,
};

static inline enum direction decode_direction(unsigned int insn)
{
	unsigned long tmp = (insn >> 21) & 1;

	if (!tmp)
		return load;
	else {
		switch ((insn>>19)&0xf) {
		case 15: /* swap* */
			return both;
		default:
			return store;
		}
	}
}

/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
static inline int decode_access_size(unsigned int insn)
{
	unsigned int tmp;

	tmp = ((insn >> 19) & 0xf);
	if (tmp == 11 || tmp == 14) /* ldx/stx */
		return 8;
	tmp &= 3;
	if (!tmp)
		return 4;
	else if (tmp == 3)
		return 16;	/* ldd/std - Although it is actually 8 */
	else if (tmp == 2)
		return 2;
	else {
		printk("Impossible unaligned trap. insn=%08x\n", insn);
		die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);

		/* GCC should never warn that control reaches the end
		 * of this function without returning a value because
		 * die_if_kernel() is marked with attribute 'noreturn'.
		 * Alas, some versions do...
		 */

		return 0;
	}
}

static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
{
	if (insn & 0x800000) {
		if (insn & 0x2000)
			return (unsigned char)(regs->tstate >> 24);	/* %asi */
		else
			return (unsigned char)(insn >> 5);		/* imm_asi */
	} else
		return ASI_P;
}

/* 0x400000 = signed, 0 = unsigned */
static inline int decode_signedness(unsigned int insn)
{
	return (insn & 0x400000);
}

static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
				       unsigned int rd, int from_kernel)
{
	if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
		if (from_kernel != 0)
			__asm__ __volatile__("flushw");
		else
			flushw_user();
	}
}

static inline long sign_extend_imm13(long imm)
{
	return imm << 51 >> 51;
}

static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
{
	unsigned long value;
	
	if (reg < 16)
		return (!reg ? 0 : regs->u_regs[reg]);
	if (regs->tstate & TSTATE_PRIV) {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		value = win->locals[reg - 16];
	} else if (test_thread_flag(TIF_32BIT)) {
		struct reg_window32 __user *win32;
		win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
		get_user(value, &win32->locals[reg - 16]);
	} else {
		struct reg_window __user *win;
		win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		get_user(value, &win->locals[reg - 16]);
	}
	return value;
}

static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
{
	if (reg < 16)
		return &regs->u_regs[reg];
	if (regs->tstate & TSTATE_PRIV) {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		return &win->locals[reg - 16];
	} else if (test_thread_flag(TIF_32BIT)) {
		struct reg_window32 *win32;
		win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
		return (unsigned long *)&win32->locals[reg - 16];
	} else {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		return &win->locals[reg - 16];
	}
}

unsigned long compute_effective_address(struct pt_regs *regs,
					unsigned int insn, unsigned int rd)
{
	unsigned int rs1 = (insn >> 14) & 0x1f;
	unsigned int rs2 = insn & 0x1f;
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;

	if (insn & 0x2000) {
		maybe_flush_windows(rs1, 0, rd, from_kernel);
		return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
	} else {
		maybe_flush_windows(rs1, rs2, rd, from_kernel);
		return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
	}
}

/* This is just to make gcc think die_if_kernel does return... */
static void __used unaligned_panic(char *str, struct pt_regs *regs)
{
	die_if_kernel(str, regs);
}

extern int do_int_load(unsigned long *dest_reg, int size,
		       unsigned long *saddr, int is_signed, int asi);
	
extern int __do_int_store(unsigned long *dst_addr, int size,
			  unsigned long src_val, int asi);

static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
			       struct pt_regs *regs, int asi, int orig_asi)
{
	unsigned long zero = 0;
	unsigned long *src_val_p = &zero;
	unsigned long src_val;

	if (size == 16) {
		size = 8;
		zero = (((long)(reg_num ?
		        (unsigned)fetch_reg(reg_num, regs) : 0)) << 32) |
			(unsigned)fetch_reg(reg_num + 1, regs);
	} else if (reg_num) {
		src_val_p = fetch_reg_addr(reg_num, regs);
	}
	src_val = *src_val_p;
	if (unlikely(asi != orig_asi)) {
		switch (size) {
		case 2:
			src_val = swab16(src_val);
			break;
		case 4:
			src_val = swab32(src_val);
			break;
		case 8:
			src_val = swab64(src_val);
			break;
		case 16:
		default:
			BUG();
			break;
		};
	}
	return __do_int_store(dst_addr, size, src_val, asi);
}

static inline void advance(struct pt_regs *regs)
{
	regs->tpc   = regs->tnpc;
	regs->tnpc += 4;
	if (test_thread_flag(TIF_32BIT)) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
}

static inline int floating_point_load_or_store_p(unsigned int insn)
{
	return (insn >> 24) & 1;
}

static inline int ok_for_kernel(unsigned int insn)
{
	return !floating_point_load_or_store_p(insn);
}

static void kernel_mna_trap_fault(int fixup_tstate_asi)
{
	struct pt_regs *regs = current_thread_info()->kern_una_regs;
	unsigned int insn = current_thread_info()->kern_una_insn;
	const struct exception_table_entry *entry;

	entry = search_exception_tables(regs->tpc);
	if (!entry) {
		unsigned long address;

		address = compute_effective_address(regs, insn,
						    ((insn >> 25) & 0x1f));
        	if (address < PAGE_SIZE) {
                	printk(KERN_ALERT "Unable to handle kernel NULL "
			       "pointer dereference in mna handler");
        	} else
                	printk(KERN_ALERT "Unable to handle kernel paging "
			       "request in mna handler");
	        printk(KERN_ALERT " at virtual address %016lx\n",address);
		printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
			(current->mm ? CTX_HWBITS(current->mm->context) :
			CTX_HWBITS(current->active_mm->context)));
		printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
			(current->mm ? (unsigned long) current->mm->pgd :
			(unsigned long) current->active_mm->pgd));
	        die_if_kernel("Oops", regs);
		/* Not reached */
	}
	regs->tpc = entry->fixup;
	regs->tnpc = regs->tpc + 4;

	if (fixup_tstate_asi) {
		regs->tstate &= ~TSTATE_ASI;
		regs->tstate |= (ASI_AIUS << 24UL);
	}
}

static void log_unaligned(struct pt_regs *regs)
{
	static unsigned long count, last_time;

	if (time_after(jiffies, last_time + 5 * HZ))
		count = 0;
	if (count < 5) {
		last_time = jiffies;
		count++;
		printk("Kernel unaligned access at TPC[%lx] %pS\n",
		       regs->tpc, (void *) regs->tpc);
	}
}

asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
{
	enum direction dir = decode_direction(insn);
	int size = decode_access_size(insn);
	int orig_asi, asi;

	current_thread_info()->kern_una_regs = regs;
	current_thread_info()->kern_una_insn = insn;

	orig_asi = asi = decode_asi(insn, regs);

	/* If this is a {get,put}_user() on an unaligned userspace pointer,
	 * just signal a fault and do not log the event.
	 */
	if (asi == ASI_AIUS) {
		kernel_mna_trap_fault(0);
		return;
	}

	log_unaligned(regs);

	if (!ok_for_kernel(insn) || dir == both) {
		printk("Unsupported unaligned load/store trap for kernel "
		       "at <%016lx>.\n", regs->tpc);
		unaligned_panic("Kernel does fpu/atomic "
				"unaligned load/store.", regs);

		kernel_mna_trap_fault(0);
	} else {
		unsigned long addr, *reg_addr;
		int err;

		addr = compute_effective_address(regs, insn,
						 ((insn >> 25) & 0x1f));
		perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, addr);
		switch (asi) {
		case ASI_NL:
		case ASI_AIUPL:
		case ASI_AIUSL:
		case ASI_PL:
		case ASI_SL:
		case ASI_PNFL:
		case ASI_SNFL:
			asi &= ~0x08;
			break;
		};
		switch (dir) {
		case load:
			reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
			err = do_int_load(reg_addr, size,
					  (unsigned long *) addr,
					  decode_signedness(insn), asi);
			if (likely(!err) && unlikely(asi != orig_asi)) {
				unsigned long val_in = *reg_addr;
				switch (size) {
				case 2:
					val_in = swab16(val_in);
					break;
				case 4:
					val_in = swab32(val_in);
					break;
				case 8:
					val_in = swab64(val_in);
					break;
				case 16:
				default:
					BUG();
					break;
				};
				*reg_addr = val_in;
			}
			break;

		case store:
			err = do_int_store(((insn>>25)&0x1f), size,
					   (unsigned long *) addr, regs,
					   asi, orig_asi);
			break;

		default:
			panic("Impossible kernel unaligned trap.");
			/* Not reached... */
		}
		if (unlikely(err))
			kernel_mna_trap_fault(1);
		else
			advance(regs);
	}
}

static char popc_helper[] = {
0, 1, 1, 2, 1, 2, 2, 3,
1, 2, 2, 3, 2, 3, 3, 4, 
};

int handle_popc(u32 insn, struct pt_regs *regs)
{
	u64 value;
	int ret, i, rd = ((insn >> 25) & 0x1f);
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	                        
	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
	if (insn & 0x2000) {
		maybe_flush_windows(0, 0, rd, from_kernel);
		value = sign_extend_imm13(insn);
	} else {
		maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
		value = fetch_reg(insn & 0x1f, regs);
	}
	for (ret = 0, i = 0; i < 16; i++) {
		ret += popc_helper[value & 0xf];
		value >>= 4;
	}
	if (rd < 16) {
		if (rd)
			regs->u_regs[rd] = ret;
	} else {
		if (test_thread_flag(TIF_32BIT)) {
			struct reg_window32 __user *win32;
			win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
			put_user(ret, &win32->locals[rd - 16]);
		} else {
			struct reg_window __user *win;
			win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
			put_user(ret, &win->locals[rd - 16]);
		}
	}
	advance(regs);
	return 1;
}

extern void do_fpother(struct pt_regs *regs);
extern void do_privact(struct pt_regs *regs);
extern void spitfire_data_access_exception(struct pt_regs *regs,
					   unsigned long sfsr,
					   unsigned long sfar);
extern void sun4v_data_access_exception(struct pt_regs *regs,
					unsigned long addr,
					unsigned long type_ctx);

int handle_ldf_stq(u32 insn, struct pt_regs *regs)
{
	unsigned long addr = compute_effective_address(regs, insn, 0);
	int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
	struct fpustate *f = FPUSTATE;
	int asi = decode_asi(insn, regs);
	int flag = (freg < 32) ? FPRS_DL : FPRS_DU;

	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);

	save_and_clear_fpu();
	current_thread_info()->xfsr[0] &= ~0x1c000;
	if (freg & 3) {
		current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
		do_fpother(regs);
		return 0;
	}
	if (insn & 0x200000) {
		/* STQ */
		u64 first = 0, second = 0;
		
		if (current_thread_info()->fpsaved[0] & flag) {
			first = *(u64 *)&f->regs[freg];
			second = *(u64 *)&f->regs[freg+2];
		}
		if (asi < 0x80) {
			do_privact(regs);
			return 1;
		}
		switch (asi) {
		case ASI_P:
		case ASI_S: break;
		case ASI_PL:
		case ASI_SL: 
			{
				/* Need to convert endians */
				u64 tmp = __swab64p(&first);
				
				first = __swab64p(&second);
				second = tmp;
				break;
			}
		default:
			if (tlb_type == hypervisor)
				sun4v_data_access_exception(regs, addr, 0);
			else
				spitfire_data_access_exception(regs, 0, addr);
			return 1;
		}
		if (put_user (first >> 32, (u32 __user *)addr) ||
		    __put_user ((u32)first, (u32 __user *)(addr + 4)) ||
		    __put_user (second >> 32, (u32 __user *)(addr + 8)) ||
		    __put_user ((u32)second, (u32 __user *)(addr + 12))) {
			if (tlb_type == hypervisor)
				sun4v_data_access_exception(regs, addr, 0);
			else
				spitfire_data_access_exception(regs, 0, addr);
		    	return 1;
		}
	} else {
		/* LDF, LDDF, LDQF */
		u32 data[4] __attribute__ ((aligned(8)));
		int size, i;
		int err;

		if (asi < 0x80) {
			do_privact(regs);
			return 1;
		} else if (asi > ASI_SNFL) {
			if (tlb_type == hypervisor)
				sun4v_data_access_exception(regs, addr, 0);
			else
				spitfire_data_access_exception(regs, 0, addr);
			return 1;
		}
		switch (insn & 0x180000) {
		case 0x000000: size = 1; break;
		case 0x100000: size = 4; break;
		default: size = 2; break;
		}
		for (i = 0; i < size; i++)
			data[i] = 0;
		
		err = get_user (data[0], (u32 __user *) addr);
		if (!err) {
			for (i = 1; i < size; i++)
				err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
		}
		if (err && !(asi & 0x2 /* NF */)) {
			if (tlb_type == hypervisor)
				sun4v_data_access_exception(regs, addr, 0);
			else
				spitfire_data_access_exception(regs, 0, addr);
			return 1;
		}
		if (asi & 0x8) /* Little */ {
			u64 tmp;

			switch (size) {
			case 1: data[0] = le32_to_cpup(data + 0); break;
			default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
				break;
			case 4: tmp = le64_to_cpup((u64 *)(data + 0));
				*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
				*(u64 *)(data + 2) = tmp;
				break;
			}
		}
		if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
			current_thread_info()->fpsaved[0] = FPRS_FEF;
			current_thread_info()->gsr[0] = 0;
		}
		if (!(current_thread_info()->fpsaved[0] & flag)) {
			if (freg < 32)
				memset(f->regs, 0, 32*sizeof(u32));
			else
				memset(f->regs+32, 0, 32*sizeof(u32));
		}
		memcpy(f->regs + freg, data, size * 4);
		current_thread_info()->fpsaved[0] |= flag;
	}
	advance(regs);
	return 1;
}

void handle_ld_nf(u32 insn, struct pt_regs *regs)
{
	int rd = ((insn >> 25) & 0x1f);
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	unsigned long *reg;
	                        
	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);

	maybe_flush_windows(0, 0, rd, from_kernel);
	reg = fetch_reg_addr(rd, regs);
	if (from_kernel || rd < 16) {
		reg[0] = 0;
		if ((insn & 0x780000) == 0x180000)
			reg[1] = 0;
	} else if (test_thread_flag(TIF_32BIT)) {
		put_user(0, (int __user *) reg);
		if ((insn & 0x780000) == 0x180000)
			put_user(0, ((int __user *) reg) + 1);
	} else {
		put_user(0, (unsigned long __user *) reg);
		if ((insn & 0x780000) == 0x180000)
			put_user(0, (unsigned long __user *) reg + 1);
	}
	advance(regs);
}

void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
{
	unsigned long pc = regs->tpc;
	unsigned long tstate = regs->tstate;
	u32 insn;
	u64 value;
	u8 freg;
	int flag;
	struct fpustate *f = FPUSTATE;

	if (tstate & TSTATE_PRIV)
		die_if_kernel("lddfmna from kernel", regs);
	perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, sfar);
	if (test_thread_flag(TIF_32BIT))
		pc = (u32)pc;
	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
		int asi = decode_asi(insn, regs);
		u32 first, second;
		int err;

		if ((asi > ASI_SNFL) ||
		    (asi < ASI_P))
			goto daex;
		first = second = 0;
		err = get_user(first, (u32 __user *)sfar);
		if (!err)
			err = get_user(second, (u32 __user *)(sfar + 4));
		if (err) {
			if (!(asi & 0x2))
				goto daex;
			first = second = 0;
		}
		save_and_clear_fpu();
		freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
		value = (((u64)first) << 32) | second;
		if (asi & 0x8) /* Little */
			value = __swab64p(&value);
		flag = (freg < 32) ? FPRS_DL : FPRS_DU;
		if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
			current_thread_info()->fpsaved[0] = FPRS_FEF;
			current_thread_info()->gsr[0] = 0;
		}
		if (!(current_thread_info()->fpsaved[0] & flag)) {
			if (freg < 32)
				memset(f->regs, 0, 32*sizeof(u32));
			else
				memset(f->regs+32, 0, 32*sizeof(u32));
		}
		*(u64 *)(f->regs + freg) = value;
		current_thread_info()->fpsaved[0] |= flag;
	} else {
daex:
		if (tlb_type == hypervisor)
			sun4v_data_access_exception(regs, sfar, sfsr);
		else
			spitfire_data_access_exception(regs, sfsr, sfar);
		return;
	}
	advance(regs);
}

void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
{
	unsigned long pc = regs->tpc;
	unsigned long tstate = regs->tstate;
	u32 insn;
	u64 value;
	u8 freg;
	int flag;
	struct fpustate *f = FPUSTATE;

	if (tstate & TSTATE_PRIV)
		die_if_kernel("stdfmna from kernel", regs);
	perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, sfar);
	if (test_thread_flag(TIF_32BIT))
		pc = (u32)pc;
	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
		int asi = decode_asi(insn, regs);
		freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
		value = 0;
		flag = (freg < 32) ? FPRS_DL : FPRS_DU;
		if ((asi > ASI_SNFL) ||
		    (asi < ASI_P))
			goto daex;
		save_and_clear_fpu();
		if (current_thread_info()->fpsaved[0] & flag)
			value = *(u64 *)&f->regs[freg];
		switch (asi) {
		case ASI_P:
		case ASI_S: break;
		case ASI_PL:
		case ASI_SL: 
			value = __swab64p(&value); break;
		default: goto daex;
		}
		if (put_user (value >> 32, (u32 __user *) sfar) ||
		    __put_user ((u32)value, (u32 __user *)(sfar + 4)))
			goto daex;
	} else {
daex:
		if (tlb_type == hypervisor)
			sun4v_data_access_exception(regs, sfar, sfsr);
		else
			spitfire_data_access_exception(regs, sfsr, sfar);
		return;
	}
	advance(regs);
}
Commit	Line	Data
b00dc837	1	/*
1da177e4 LT	2	* unaligned.c: Unaligned load/store trap handling with special
	3	* cases for the kernel to do them more quickly.
	4	*
4fe3ebec	5	* Copyright (C) 1996,2008 David S. Miller (davem@davemloft.net)
1da177e4 LT	6	* Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
	7	*/
	8
	9
cbc9fc5d	10	#include <linux/jiffies.h>
1da177e4 LT	11	#include <linux/kernel.h>
	12	#include <linux/sched.h>
	13	#include <linux/mm.h>
	14	#include <linux/module.h>
	15	#include <asm/asi.h>
	16	#include <asm/ptrace.h>
	17	#include <asm/pstate.h>
	18	#include <asm/processor.h>
	19	#include <asm/system.h>
	20	#include <asm/uaccess.h>
	21	#include <linux/smp.h>
1da177e4	22	#include <linux/bitops.h>
121dd5f2	23	#include <linux/perf_event.h>
1da177e4 LT	24	#include <asm/fpumacro.h>
1da177e4 LT	25
1da177e4 LT	26	enum direction {
	27	load, /* ld, ldd, ldh, ldsh */
	28	store, /* st, std, sth, stsh */
	29	both, /* Swap, ldstub, cas, ... */
	30	fpld,
	31	fpst,
	32	invalid,
	33	};
	34
1da177e4 LT	35	static inline enum direction decode_direction(unsigned int insn)
	36	{
	37	unsigned long tmp = (insn >> 21) & 1;
	38
	39	if (!tmp)
	40	return load;
	41	else {
	42	switch ((insn>>19)&0xf) {
	43	case 15: /* swap* */
	44	return both;
	45	default:
	46	return store;
	47	}
	48	}
	49	}
	50
	51	/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
	52	static inline int decode_access_size(unsigned int insn)
	53	{
	54	unsigned int tmp;
	55
	56	tmp = ((insn >> 19) & 0xf);
	57	if (tmp == 11 \|\| tmp == 14) /* ldx/stx */
	58	return 8;
	59	tmp &= 3;
	60	if (!tmp)
	61	return 4;
	62	else if (tmp == 3)
	63	return 16; /* ldd/std - Although it is actually 8 */
	64	else if (tmp == 2)
	65	return 2;
	66	else {
	67	printk("Impossible unaligned trap. insn=%08x\n", insn);
	68	die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);
	69
	70	/* GCC should never warn that control reaches the end
	71	* of this function without returning a value because
	72	* die_if_kernel() is marked with attribute 'noreturn'.
	73	* Alas, some versions do...
	74	*/
	75
	76	return 0;
	77	}
	78	}
	79
	80	static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
	81	{
	82	if (insn & 0x800000) {
	83	if (insn & 0x2000)
	84	return (unsigned char)(regs->tstate >> 24); /* %asi */
	85	else
	86	return (unsigned char)(insn >> 5); /* imm_asi */
	87	} else
	88	return ASI_P;
	89	}
	90
	91	/* 0x400000 = signed, 0 = unsigned */
	92	static inline int decode_signedness(unsigned int insn)
	93	{
	94	return (insn & 0x400000);
	95	}
	96
	97	static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
	98	unsigned int rd, int from_kernel)
99	{
100	if (rs2 >= 16 \|\| rs1 >= 16 \|\| rd >= 16) {
101	if (from_kernel != 0)
102	__asm__ __volatile__("flushw");
103	else
104	flushw_user();
105	}
106	}
107
108	static inline long sign_extend_imm13(long imm)
109	{
110	return imm << 51 >> 51;
111	}
112
113	static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
114	{
115	unsigned long value;
116
117	if (reg < 16)
118	return (!reg ? 0 : regs->u_regs[reg]);
119	if (regs->tstate & TSTATE_PRIV) {
120	struct reg_window *win;
121	win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
122	value = win->locals[reg - 16];
123	} else if (test_thread_flag(TIF_32BIT)) {
124	struct reg_window32 __user *win32;
125	win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
126	get_user(value, &win32->locals[reg - 16]);
127	} else {
128	struct reg_window __user *win;
129	win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
130	get_user(value, &win->locals[reg - 16]);
131	}
132	return value;
133	}
134
135	static unsigned long fetch_reg_addr(unsigned int reg, struct pt_regs regs)
136	{
137	if (reg < 16)
138	return &regs->u_regs[reg];
139	if (regs->tstate & TSTATE_PRIV) {
140	struct reg_window *win;
141	win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
142	return &win->locals[reg - 16];
143	} else if (test_thread_flag(TIF_32BIT)) {
144	struct reg_window32 *win32;
145	win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
146	return (unsigned long *)&win32->locals[reg - 16];
147	} else {
148	struct reg_window *win;
149	win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
150	return &win->locals[reg - 16];
151	}
152	}
153
154	unsigned long compute_effective_address(struct pt_regs *regs,
155	unsigned int insn, unsigned int rd)
156	{
157	unsigned int rs1 = (insn >> 14) & 0x1f;
158	unsigned int rs2 = insn & 0x1f;
159	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
160
161	if (insn & 0x2000) {
162	maybe_flush_windows(rs1, 0, rd, from_kernel);
163	return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
164	} else {
165	maybe_flush_windows(rs1, rs2, rd, from_kernel);
166	return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
167	}
168	}
169
170	/* This is just to make gcc think die_if_kernel does return... */
3ff6eecc	171	static void __used unaligned_panic(char str, struct pt_regs regs)
1da177e4 LT	172	{
	173	die_if_kernel(str, regs);
	174	}
	175
5fd29752 DM	176	extern int do_int_load(unsigned long *dest_reg, int size,
5fd29752 DM	177	unsigned long *saddr, int is_signed, int asi);
1da177e4	178
5fd29752 DM	179	extern int __do_int_store(unsigned long *dst_addr, int size,
5fd29752 DM	180	unsigned long src_val, int asi);
a3f99858	181
5fd29752 DM	182	static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
5fd29752 DM	183	struct pt_regs *regs, int asi, int orig_asi)
a3f99858 DM	184	{
a3f99858 DM	185	unsigned long zero = 0;
ff171d8f DM	186	unsigned long *src_val_p = &zero;
ff171d8f DM	187	unsigned long src_val;
a3f99858 DM	188
	189	if (size == 16) {
	190	size = 8;
	191	zero = (((long)(reg_num ?
	192	(unsigned)fetch_reg(reg_num, regs) : 0)) << 32) \|
	193	(unsigned)fetch_reg(reg_num + 1, regs);
	194	} else if (reg_num) {
ff171d8f DM	195	src_val_p = fetch_reg_addr(reg_num, regs);
	196	}
	197	src_val = *src_val_p;
	198	if (unlikely(asi != orig_asi)) {
	199	switch (size) {
	200	case 2:
	201	src_val = swab16(src_val);
	202	break;
	203	case 4:
	204	src_val = swab32(src_val);
	205	break;
	206	case 8:
	207	src_val = swab64(src_val);
	208	break;
	209	case 16:
	210	default:
	211	BUG();
	212	break;
	213	};
a3f99858	214	}
5fd29752	215	return __do_int_store(dst_addr, size, src_val, asi);
a3f99858	216	}
1da177e4 LT	217
	218	static inline void advance(struct pt_regs *regs)
	219	{
	220	regs->tpc = regs->tnpc;
	221	regs->tnpc += 4;
	222	if (test_thread_flag(TIF_32BIT)) {
	223	regs->tpc &= 0xffffffff;
	224	regs->tnpc &= 0xffffffff;
	225	}
	226	}
	227
	228	static inline int floating_point_load_or_store_p(unsigned int insn)
	229	{
	230	return (insn >> 24) & 1;
	231	}
	232
	233	static inline int ok_for_kernel(unsigned int insn)
	234	{
	235	return !floating_point_load_or_store_p(insn);
	236	}
	237
c449c38b	238	static void kernel_mna_trap_fault(int fixup_tstate_asi)
1da177e4	239	{
a3f99858 DM	240	struct pt_regs *regs = current_thread_info()->kern_una_regs;
a3f99858 DM	241	unsigned int insn = current_thread_info()->kern_una_insn;
8cf14af0	242	const struct exception_table_entry *entry;
1da177e4	243
8cf14af0 DM	244	entry = search_exception_tables(regs->tpc);
8cf14af0 DM	245	if (!entry) {
a3f99858 DM	246	unsigned long address;
	247
	248	address = compute_effective_address(regs, insn,
	249	((insn >> 25) & 0x1f));
1da177e4	250	if (address < PAGE_SIZE) {
a3f99858 DM	251	printk(KERN_ALERT "Unable to handle kernel NULL "
a3f99858 DM	252	"pointer dereference in mna handler");
1da177e4	253	} else
a3f99858 DM	254	printk(KERN_ALERT "Unable to handle kernel paging "
a3f99858 DM	255	"request in mna handler");
1da177e4	256	printk(KERN_ALERT " at virtual address %016lx\n",address);
a3f99858	257	printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
1da177e4 LT	258	(current->mm ? CTX_HWBITS(current->mm->context) :
1da177e4 LT	259	CTX_HWBITS(current->active_mm->context)));
a3f99858	260	printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
1da177e4 LT	261	(current->mm ? (unsigned long) current->mm->pgd :
	262	(unsigned long) current->active_mm->pgd));
	263	die_if_kernel("Oops", regs);
	264	/* Not reached */
	265	}
8cf14af0	266	regs->tpc = entry->fixup;
1da177e4	267	regs->tnpc = regs->tpc + 4;
1da177e4	268
c449c38b DM	269	if (fixup_tstate_asi) {
	270	regs->tstate &= ~TSTATE_ASI;
	271	regs->tstate \|= (ASI_AIUS << 24UL);
	272	}
1da177e4 LT	273	}
1da177e4 LT	274
c449c38b	275	static void log_unaligned(struct pt_regs *regs)
1da177e4	276	{
27cc64c7	277	static unsigned long count, last_time;
a3f99858	278
cbc9fc5d	279	if (time_after(jiffies, last_time + 5 * HZ))
27cc64c7 DM	280	count = 0;
	281	if (count < 5) {
	282	last_time = jiffies;
	283	count++;
4fe3ebec DM	284	printk("Kernel unaligned access at TPC[%lx] %pS\n",
4fe3ebec DM	285	regs->tpc, (void *) regs->tpc);
27cc64c7	286	}
c449c38b DM	287	}
	288
	289	asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
	290	{
	291	enum direction dir = decode_direction(insn);
	292	int size = decode_access_size(insn);
	293	int orig_asi, asi;
	294
	295	current_thread_info()->kern_una_regs = regs;
	296	current_thread_info()->kern_una_insn = insn;
	297
	298	orig_asi = asi = decode_asi(insn, regs);
	299
	300	/* If this is a {get,put}_user() on an unaligned userspace pointer,
	301	* just signal a fault and do not log the event.
	302	*/
	303	if (asi == ASI_AIUS) {
	304	kernel_mna_trap_fault(0);
	305	return;
	306	}
	307
	308	log_unaligned(regs);
27cc64c7	309
1da177e4	310	if (!ok_for_kernel(insn) \|\| dir == both) {
a3f99858 DM	311	printk("Unsupported unaligned load/store trap for kernel "
	312	"at <%016lx>.\n", regs->tpc);
	313	unaligned_panic("Kernel does fpu/atomic "
	314	"unaligned load/store.", regs);
	315
c449c38b	316	kernel_mna_trap_fault(0);
1da177e4	317	} else {
705747ab	318	unsigned long addr, *reg_addr;
c449c38b	319	int err;
1da177e4	320
a3f99858 DM	321	addr = compute_effective_address(regs, insn,
a3f99858 DM	322	((insn >> 25) & 0x1f));
121dd5f2	323	perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, addr);
ff171d8f DM	324	switch (asi) {
	325	case ASI_NL:
	326	case ASI_AIUPL:
	327	case ASI_AIUSL:
	328	case ASI_PL:
	329	case ASI_SL:
	330	case ASI_PNFL:
	331	case ASI_SNFL:
	332	asi &= ~0x08;
	333	break;
	334	};
1da177e4 LT	335	switch (dir) {
1da177e4 LT	336	case load:
705747ab	337	reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
5fd29752 DM	338	err = do_int_load(reg_addr, size,
	339	(unsigned long *) addr,
	340	decode_signedness(insn), asi);
	341	if (likely(!err) && unlikely(asi != orig_asi)) {
705747ab	342	unsigned long val_in = *reg_addr;
ff171d8f DM	343	switch (size) {
	344	case 2:
	345	val_in = swab16(val_in);
	346	break;
	347	case 4:
	348	val_in = swab32(val_in);
	349	break;
	350	case 8:
	351	val_in = swab64(val_in);
	352	break;
	353	case 16:
	354	default:
	355	BUG();
	356	break;
	357	};
705747ab	358	*reg_addr = val_in;
ff171d8f	359	}
1da177e4 LT	360	break;
	361
	362	case store:
5fd29752 DM	363	err = do_int_store(((insn>>25)&0x1f), size,
	364	(unsigned long *) addr, regs,
	365	asi, orig_asi);
1da177e4	366	break;
a3f99858	367
1da177e4 LT	368	default:
	369	panic("Impossible kernel unaligned trap.");
	370	/* Not reached... */
	371	}
5fd29752	372	if (unlikely(err))
c449c38b	373	kernel_mna_trap_fault(1);
5fd29752 DM	374	else
5fd29752 DM	375	advance(regs);
1da177e4 LT	376	}
	377	}
	378
	379	static char popc_helper[] = {
	380	0, 1, 1, 2, 1, 2, 2, 3,
	381	1, 2, 2, 3, 2, 3, 3, 4,
	382	};
	383
	384	int handle_popc(u32 insn, struct pt_regs *regs)
	385	{
	386	u64 value;
	387	int ret, i, rd = ((insn >> 25) & 0x1f);
	388	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	389
121dd5f2	390	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
1da177e4 LT	391	if (insn & 0x2000) {
	392	maybe_flush_windows(0, 0, rd, from_kernel);
	393	value = sign_extend_imm13(insn);
	394	} else {
	395	maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
	396	value = fetch_reg(insn & 0x1f, regs);
	397	}
	398	for (ret = 0, i = 0; i < 16; i++) {
	399	ret += popc_helper[value & 0xf];
	400	value >>= 4;
	401	}
	402	if (rd < 16) {
	403	if (rd)
	404	regs->u_regs[rd] = ret;
	405	} else {
	406	if (test_thread_flag(TIF_32BIT)) {
	407	struct reg_window32 __user *win32;
	408	win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
	409	put_user(ret, &win32->locals[rd - 16]);
	410	} else {
	411	struct reg_window __user *win;
	412	win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
	413	put_user(ret, &win->locals[rd - 16]);
	414	}
	415	}
	416	advance(regs);
	417	return 1;
	418	}
	419
	420	extern void do_fpother(struct pt_regs *regs);
	421	extern void do_privact(struct pt_regs *regs);
6c52a96e DM	422	extern void spitfire_data_access_exception(struct pt_regs *regs,
	423	unsigned long sfsr,
	424	unsigned long sfar);
ed6b0b45 DM	425	extern void sun4v_data_access_exception(struct pt_regs *regs,
	426	unsigned long addr,
	427	unsigned long type_ctx);
1da177e4 LT	428
	429	int handle_ldf_stq(u32 insn, struct pt_regs *regs)
	430	{
	431	unsigned long addr = compute_effective_address(regs, insn, 0);
	432	int freg = ((insn >> 25) & 0x1e) \| ((insn >> 20) & 0x20);
	433	struct fpustate *f = FPUSTATE;
	434	int asi = decode_asi(insn, regs);
	435	int flag = (freg < 32) ? FPRS_DL : FPRS_DU;
	436
121dd5f2 DM	437	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
121dd5f2 DM	438
1da177e4 LT	439	save_and_clear_fpu();
	440	current_thread_info()->xfsr[0] &= ~0x1c000;
	441	if (freg & 3) {
	442	current_thread_info()->xfsr[0] \|= (6 << 14) /* invalid_fp_register */;
	443	do_fpother(regs);
	444	return 0;
	445	}
	446	if (insn & 0x200000) {
	447	/* STQ */
	448	u64 first = 0, second = 0;
	449
	450	if (current_thread_info()->fpsaved[0] & flag) {
	451	first = (u64 )&f->regs[freg];
	452	second = (u64 )&f->regs[freg+2];
	453	}
	454	if (asi < 0x80) {
	455	do_privact(regs);
	456	return 1;
	457	}
	458	switch (asi) {
	459	case ASI_P:
	460	case ASI_S: break;
	461	case ASI_PL:
	462	case ASI_SL:
	463	{
	464	/* Need to convert endians */
	465	u64 tmp = __swab64p(&first);
	466
	467	first = __swab64p(&second);
	468	second = tmp;
	469	break;
	470	}
	471	default:
ed6b0b45 DM	472	if (tlb_type == hypervisor)
	473	sun4v_data_access_exception(regs, addr, 0);
	474	else
	475	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	476	return 1;
	477	}
	478	if (put_user (first >> 32, (u32 __user *)addr) \|\|
	479	__put_user ((u32)first, (u32 __user *)(addr + 4)) \|\|
	480	__put_user (second >> 32, (u32 __user *)(addr + 8)) \|\|
	481	__put_user ((u32)second, (u32 __user *)(addr + 12))) {
ed6b0b45 DM	482	if (tlb_type == hypervisor)
	483	sun4v_data_access_exception(regs, addr, 0);
	484	else
	485	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	486	return 1;
	487	}
	488	} else {
	489	/* LDF, LDDF, LDQF */
	490	u32 data[4] __attribute__ ((aligned(8)));
	491	int size, i;
	492	int err;
	493
	494	if (asi < 0x80) {
	495	do_privact(regs);
	496	return 1;
	497	} else if (asi > ASI_SNFL) {
ed6b0b45 DM	498	if (tlb_type == hypervisor)
	499	sun4v_data_access_exception(regs, addr, 0);
	500	else
	501	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	502	return 1;
	503	}
	504	switch (insn & 0x180000) {
	505	case 0x000000: size = 1; break;
	506	case 0x100000: size = 4; break;
	507	default: size = 2; break;
	508	}
	509	for (i = 0; i < size; i++)
	510	data[i] = 0;
	511
	512	err = get_user (data[0], (u32 __user *) addr);
	513	if (!err) {
	514	for (i = 1; i < size; i++)
	515	err \|= __get_user (data[i], (u32 __user )(addr + 4i));
	516	}
	517	if (err && !(asi & 0x2 /* NF */)) {
ed6b0b45 DM	518	if (tlb_type == hypervisor)
	519	sun4v_data_access_exception(regs, addr, 0);
	520	else
	521	spitfire_data_access_exception(regs, 0, addr);
1da177e4 LT	522	return 1;
	523	}
	524	if (asi & 0x8) /* Little */ {
	525	u64 tmp;
	526
	527	switch (size) {
	528	case 1: data[0] = le32_to_cpup(data + 0); break;
	529	default:(u64 )(data + 0) = le64_to_cpup((u64 *)(data + 0));
	530	break;
	531	case 4: tmp = le64_to_cpup((u64 *)(data + 0));
	532	(u64 )(data + 0) = le64_to_cpup((u64 *)(data + 2));
	533	(u64 )(data + 2) = tmp;
	534	break;
	535	}
	536	}
	537	if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
	538	current_thread_info()->fpsaved[0] = FPRS_FEF;
	539	current_thread_info()->gsr[0] = 0;
	540	}
	541	if (!(current_thread_info()->fpsaved[0] & flag)) {
	542	if (freg < 32)
	543	memset(f->regs, 0, 32*sizeof(u32));
	544	else
	545	memset(f->regs+32, 0, 32*sizeof(u32));
	546	}
	547	memcpy(f->regs + freg, data, size * 4);
	548	current_thread_info()->fpsaved[0] \|= flag;
	549	}
	550	advance(regs);
	551	return 1;
	552	}
	553
	554	void handle_ld_nf(u32 insn, struct pt_regs *regs)
	555	{
	556	int rd = ((insn >> 25) & 0x1f);
	557	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	558	unsigned long *reg;
	559
121dd5f2 DM	560	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, 0);
121dd5f2 DM	561
1da177e4 LT	562	maybe_flush_windows(0, 0, rd, from_kernel);
	563	reg = fetch_reg_addr(rd, regs);
	564	if (from_kernel \|\| rd < 16) {
	565	reg[0] = 0;
	566	if ((insn & 0x780000) == 0x180000)
	567	reg[1] = 0;
	568	} else if (test_thread_flag(TIF_32BIT)) {
	569	put_user(0, (int __user *) reg);
	570	if ((insn & 0x780000) == 0x180000)
	571	put_user(0, ((int __user *) reg) + 1);
	572	} else {
	573	put_user(0, (unsigned long __user *) reg);
	574	if ((insn & 0x780000) == 0x180000)
	575	put_user(0, (unsigned long __user *) reg + 1);
	576	}
	577	advance(regs);
	578	}
	579
	580	void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
	581	{
	582	unsigned long pc = regs->tpc;
	583	unsigned long tstate = regs->tstate;
	584	u32 insn;
1da177e4	585	u64 value;
ed6b0b45	586	u8 freg;
1da177e4 LT	587	int flag;
	588	struct fpustate *f = FPUSTATE;
	589
	590	if (tstate & TSTATE_PRIV)
	591	die_if_kernel("lddfmna from kernel", regs);
121dd5f2	592	perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, sfar);
1da177e4 LT	593	if (test_thread_flag(TIF_32BIT))
	594	pc = (u32)pc;
	595	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
ed6b0b45	596	int asi = decode_asi(insn, regs);
b41418f4	597	u32 first, second;
18b8e08e DM	598	int err;
18b8e08e DM	599
1da177e4 LT	600	if ((asi > ASI_SNFL) \|\|
	601	(asi < ASI_P))
	602	goto daex;
b41418f4	603	first = second = 0;
18b8e08e DM	604	err = get_user(first, (u32 __user *)sfar);
	605	if (!err)
	606	err = get_user(second, (u32 __user *)(sfar + 4));
	607	if (err) {
b41418f4	608	if (!(asi & 0x2))
1da177e4	609	goto daex;
b41418f4	610	first = second = 0;
1da177e4 LT	611	}
	612	save_and_clear_fpu();
	613	freg = ((insn >> 25) & 0x1e) \| ((insn >> 20) & 0x20);
	614	value = (((u64)first) << 32) \| second;
	615	if (asi & 0x8) /* Little */
	616	value = __swab64p(&value);
	617	flag = (freg < 32) ? FPRS_DL : FPRS_DU;
	618	if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
	619	current_thread_info()->fpsaved[0] = FPRS_FEF;
	620	current_thread_info()->gsr[0] = 0;
	621	}
	622	if (!(current_thread_info()->fpsaved[0] & flag)) {
	623	if (freg < 32)
	624	memset(f->regs, 0, 32*sizeof(u32));
	625	else
	626	memset(f->regs+32, 0, 32*sizeof(u32));
	627	}
	628	(u64 )(f->regs + freg) = value;
	629	current_thread_info()->fpsaved[0] \|= flag;
	630	} else {
ed6b0b45 DM	631	daex:
	632	if (tlb_type == hypervisor)
	633	sun4v_data_access_exception(regs, sfar, sfsr);
	634	else
	635	spitfire_data_access_exception(regs, sfsr, sfar);
1da177e4 LT	636	return;
	637	}
	638	advance(regs);
1da177e4 LT	639	}
	640
	641	void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
	642	{
	643	unsigned long pc = regs->tpc;
	644	unsigned long tstate = regs->tstate;
	645	u32 insn;
	646	u64 value;
ed6b0b45	647	u8 freg;
1da177e4 LT	648	int flag;
	649	struct fpustate *f = FPUSTATE;
	650
	651	if (tstate & TSTATE_PRIV)
	652	die_if_kernel("stdfmna from kernel", regs);
121dd5f2	653	perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs, sfar);
1da177e4 LT	654	if (test_thread_flag(TIF_32BIT))
	655	pc = (u32)pc;
	656	if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
ed6b0b45	657	int asi = decode_asi(insn, regs);
1da177e4	658	freg = ((insn >> 25) & 0x1e) \| ((insn >> 20) & 0x20);
1da177e4 LT	659	value = 0;
	660	flag = (freg < 32) ? FPRS_DL : FPRS_DU;
	661	if ((asi > ASI_SNFL) \|\|
	662	(asi < ASI_P))
	663	goto daex;
	664	save_and_clear_fpu();
	665	if (current_thread_info()->fpsaved[0] & flag)
	666	value = (u64 )&f->regs[freg];
	667	switch (asi) {
	668	case ASI_P:
	669	case ASI_S: break;
	670	case ASI_PL:
	671	case ASI_SL:
	672	value = __swab64p(&value); break;
	673	default: goto daex;
	674	}
	675	if (put_user (value >> 32, (u32 __user *) sfar) \|\|
	676	__put_user ((u32)value, (u32 __user *)(sfar + 4)))
	677	goto daex;
	678	} else {
ed6b0b45 DM	679	daex:
	680	if (tlb_type == hypervisor)
	681	sun4v_data_access_exception(regs, sfar, sfsr);
	682	else
	683	spitfire_data_access_exception(regs, sfsr, sfar);
1da177e4 LT	684	return;
	685	}
	686	advance(regs);
1da177e4	687	}