Merge branches 'core/futexes', 'core/locking', 'core/rcu' and 'linus' into core/urgent
[deliverable/linux.git] / arch / sparc / lib / atomic_64.S
CommitLineData
24f287e4 1/* atomic.S: These things are too big to do inline.
1da177e4 2 *
24f287e4 3 * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)
1da177e4
LT
4 */
5
1da177e4 6#include <asm/asi.h>
24f287e4 7#include <asm/backoff.h>
1da177e4 8
1da177e4
LT
9 .text
10
11 /* Two versions of the atomic routines, one that
12 * does not return a value and does not perform
13 * memory barriers, and a second which returns
14 * a value and does the barriers.
15 */
16 .globl atomic_add
17 .type atomic_add,#function
18atomic_add: /* %o0 = increment, %o1 = atomic_ptr */
24f287e4 19 BACKOFF_SETUP(%o2)
1da177e4
LT
201: lduw [%o1], %g1
21 add %g1, %o0, %g7
22 cas [%o1], %g1, %g7
23 cmp %g1, %g7
24f287e4 24 bne,pn %icc, 2f
1da177e4
LT
25 nop
26 retl
27 nop
24f287e4 282: BACKOFF_SPIN(%o2, %o3, 1b)
1da177e4
LT
29 .size atomic_add, .-atomic_add
30
31 .globl atomic_sub
32 .type atomic_sub,#function
33atomic_sub: /* %o0 = decrement, %o1 = atomic_ptr */
24f287e4 34 BACKOFF_SETUP(%o2)
1da177e4
LT
351: lduw [%o1], %g1
36 sub %g1, %o0, %g7
37 cas [%o1], %g1, %g7
38 cmp %g1, %g7
24f287e4 39 bne,pn %icc, 2f
1da177e4
LT
40 nop
41 retl
42 nop
24f287e4 432: BACKOFF_SPIN(%o2, %o3, 1b)
1da177e4
LT
44 .size atomic_sub, .-atomic_sub
45
46 .globl atomic_add_ret
47 .type atomic_add_ret,#function
48atomic_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
24f287e4 49 BACKOFF_SETUP(%o2)
1da177e4
LT
501: lduw [%o1], %g1
51 add %g1, %o0, %g7
52 cas [%o1], %g1, %g7
53 cmp %g1, %g7
24f287e4 54 bne,pn %icc, 2f
1da177e4 55 add %g7, %o0, %g7
b445e26c 56 sra %g7, 0, %o0
1da177e4 57 retl
b445e26c 58 nop
24f287e4 592: BACKOFF_SPIN(%o2, %o3, 1b)
1da177e4
LT
60 .size atomic_add_ret, .-atomic_add_ret
61
62 .globl atomic_sub_ret
63 .type atomic_sub_ret,#function
64atomic_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
24f287e4 65 BACKOFF_SETUP(%o2)
1da177e4
LT
661: lduw [%o1], %g1
67 sub %g1, %o0, %g7
68 cas [%o1], %g1, %g7
69 cmp %g1, %g7
24f287e4 70 bne,pn %icc, 2f
1da177e4 71 sub %g7, %o0, %g7
b445e26c 72 sra %g7, 0, %o0
1da177e4 73 retl
b445e26c 74 nop
24f287e4 752: BACKOFF_SPIN(%o2, %o3, 1b)
1da177e4
LT
76 .size atomic_sub_ret, .-atomic_sub_ret
77
78 .globl atomic64_add
79 .type atomic64_add,#function
80atomic64_add: /* %o0 = increment, %o1 = atomic_ptr */
24f287e4 81 BACKOFF_SETUP(%o2)
1da177e4
LT
821: ldx [%o1], %g1
83 add %g1, %o0, %g7
84 casx [%o1], %g1, %g7
85 cmp %g1, %g7
24f287e4 86 bne,pn %xcc, 2f
1da177e4
LT
87 nop
88 retl
89 nop
24f287e4 902: BACKOFF_SPIN(%o2, %o3, 1b)
1da177e4
LT
91 .size atomic64_add, .-atomic64_add
92
93 .globl atomic64_sub
94 .type atomic64_sub,#function
95atomic64_sub: /* %o0 = decrement, %o1 = atomic_ptr */
24f287e4 96 BACKOFF_SETUP(%o2)
1da177e4
LT
971: ldx [%o1], %g1
98 sub %g1, %o0, %g7
99 casx [%o1], %g1, %g7
100 cmp %g1, %g7
24f287e4 101 bne,pn %xcc, 2f
1da177e4
LT
102 nop
103 retl
104 nop
24f287e4 1052: BACKOFF_SPIN(%o2, %o3, 1b)
1da177e4
LT
106 .size atomic64_sub, .-atomic64_sub
107
108 .globl atomic64_add_ret
109 .type atomic64_add_ret,#function
110atomic64_add_ret: /* %o0 = increment, %o1 = atomic_ptr */
24f287e4 111 BACKOFF_SETUP(%o2)
1da177e4
LT
1121: ldx [%o1], %g1
113 add %g1, %o0, %g7
114 casx [%o1], %g1, %g7
115 cmp %g1, %g7
24f287e4 116 bne,pn %xcc, 2f
1da177e4 117 add %g7, %o0, %g7
b445e26c 118 mov %g7, %o0
1da177e4 119 retl
b445e26c 120 nop
24f287e4 1212: BACKOFF_SPIN(%o2, %o3, 1b)
1da177e4
LT
122 .size atomic64_add_ret, .-atomic64_add_ret
123
124 .globl atomic64_sub_ret
125 .type atomic64_sub_ret,#function
126atomic64_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */
24f287e4 127 BACKOFF_SETUP(%o2)
1da177e4
LT
1281: ldx [%o1], %g1
129 sub %g1, %o0, %g7
130 casx [%o1], %g1, %g7
131 cmp %g1, %g7
24f287e4 132 bne,pn %xcc, 2f
1da177e4 133 sub %g7, %o0, %g7
b445e26c 134 mov %g7, %o0
1da177e4 135 retl
b445e26c 136 nop
24f287e4 1372: BACKOFF_SPIN(%o2, %o3, 1b)
1da177e4 138 .size atomic64_sub_ret, .-atomic64_sub_ret
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