Commit | Line | Data |
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a2bd4fd1 DM |
1 | #include <linux/string.h> |
2 | #include <linux/kernel.h> | |
f85ff305 | 3 | #include <linux/of.h> |
a2bd4fd1 DM |
4 | #include <linux/init.h> |
5 | #include <linux/module.h> | |
6 | #include <linux/mod_devicetable.h> | |
7 | #include <linux/slab.h> | |
3f23de10 | 8 | #include <linux/errno.h> |
c1b1a5f1 | 9 | #include <linux/irq.h> |
3f23de10 SR |
10 | #include <linux/of_device.h> |
11 | #include <linux/of_platform.h> | |
a2bd4fd1 | 12 | |
3ca9fab4 DM |
13 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name) |
14 | { | |
15 | unsigned long ret = res->start + offset; | |
6bda5736 | 16 | struct resource *r; |
3ca9fab4 | 17 | |
6bda5736 DM |
18 | if (res->flags & IORESOURCE_MEM) |
19 | r = request_mem_region(ret, size, name); | |
20 | else | |
21 | r = request_region(ret, size, name); | |
22 | if (!r) | |
3ca9fab4 DM |
23 | ret = 0; |
24 | ||
25 | return (void __iomem *) ret; | |
26 | } | |
27 | EXPORT_SYMBOL(of_ioremap); | |
28 | ||
e3a411a3 | 29 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 | 30 | { |
e3a411a3 DM |
31 | if (res->flags & IORESOURCE_MEM) |
32 | release_mem_region((unsigned long) base, size); | |
33 | else | |
34 | release_region((unsigned long) base, size); | |
3ca9fab4 DM |
35 | } |
36 | EXPORT_SYMBOL(of_iounmap); | |
37 | ||
2b1e5978 DM |
38 | static int node_match(struct device *dev, void *data) |
39 | { | |
40 | struct of_device *op = to_of_device(dev); | |
41 | struct device_node *dp = data; | |
42 | ||
43 | return (op->node == dp); | |
44 | } | |
45 | ||
46 | struct of_device *of_find_device_by_node(struct device_node *dp) | |
47 | { | |
37b7754a | 48 | struct device *dev = bus_find_device(&of_platform_bus_type, NULL, |
2b1e5978 DM |
49 | dp, node_match); |
50 | ||
51 | if (dev) | |
52 | return to_of_device(dev); | |
53 | ||
54 | return NULL; | |
55 | } | |
56 | EXPORT_SYMBOL(of_find_device_by_node); | |
57 | ||
a2bd4fd1 | 58 | #ifdef CONFIG_PCI |
3f23de10 | 59 | struct bus_type ebus_bus_type; |
69853918 | 60 | EXPORT_SYMBOL(ebus_bus_type); |
a2bd4fd1 DM |
61 | #endif |
62 | ||
63 | #ifdef CONFIG_SBUS | |
3f23de10 | 64 | struct bus_type sbus_bus_type; |
69853918 | 65 | EXPORT_SYMBOL(sbus_bus_type); |
a2bd4fd1 DM |
66 | #endif |
67 | ||
3f23de10 | 68 | struct bus_type of_platform_bus_type; |
37b7754a | 69 | EXPORT_SYMBOL(of_platform_bus_type); |
cf44bbc2 | 70 | |
a83f9823 | 71 | static inline u64 of_read_addr(const u32 *cell, int size) |
cf44bbc2 DM |
72 | { |
73 | u64 r = 0; | |
74 | while (size--) | |
75 | r = (r << 32) | *(cell++); | |
76 | return r; | |
77 | } | |
78 | ||
79 | static void __init get_cells(struct device_node *dp, | |
80 | int *addrc, int *sizec) | |
81 | { | |
82 | if (addrc) | |
83 | *addrc = of_n_addr_cells(dp); | |
84 | if (sizec) | |
85 | *sizec = of_n_size_cells(dp); | |
86 | } | |
87 | ||
88 | /* Max address size we deal with */ | |
89 | #define OF_MAX_ADDR_CELLS 4 | |
90 | ||
91 | struct of_bus { | |
92 | const char *name; | |
93 | const char *addr_prop_name; | |
94 | int (*match)(struct device_node *parent); | |
95 | void (*count_cells)(struct device_node *child, | |
96 | int *addrc, int *sizec); | |
a83f9823 DM |
97 | int (*map)(u32 *addr, const u32 *range, |
98 | int na, int ns, int pna); | |
6a23acf3 | 99 | unsigned int (*get_flags)(const u32 *addr); |
cf44bbc2 DM |
100 | }; |
101 | ||
102 | /* | |
103 | * Default translator (generic bus) | |
104 | */ | |
105 | ||
106 | static void of_bus_default_count_cells(struct device_node *dev, | |
107 | int *addrc, int *sizec) | |
108 | { | |
109 | get_cells(dev, addrc, sizec); | |
110 | } | |
111 | ||
a83f9823 DM |
112 | /* Make sure the least significant 64-bits are in-range. Even |
113 | * for 3 or 4 cell values it is a good enough approximation. | |
114 | */ | |
115 | static int of_out_of_range(const u32 *addr, const u32 *base, | |
116 | const u32 *size, int na, int ns) | |
cf44bbc2 | 117 | { |
a83f9823 DM |
118 | u64 a = of_read_addr(addr, na); |
119 | u64 b = of_read_addr(base, na); | |
cf44bbc2 | 120 | |
a83f9823 DM |
121 | if (a < b) |
122 | return 1; | |
cf44bbc2 | 123 | |
a83f9823 DM |
124 | b += of_read_addr(size, ns); |
125 | if (a >= b) | |
126 | return 1; | |
127 | ||
128 | return 0; | |
cf44bbc2 DM |
129 | } |
130 | ||
a83f9823 DM |
131 | static int of_bus_default_map(u32 *addr, const u32 *range, |
132 | int na, int ns, int pna) | |
cf44bbc2 | 133 | { |
a83f9823 DM |
134 | u32 result[OF_MAX_ADDR_CELLS]; |
135 | int i; | |
136 | ||
137 | if (ns > 2) { | |
138 | printk("of_device: Cannot handle size cells (%d) > 2.", ns); | |
139 | return -EINVAL; | |
140 | } | |
141 | ||
142 | if (of_out_of_range(addr, range, range + na + pna, na, ns)) | |
143 | return -EINVAL; | |
144 | ||
145 | /* Start with the parent range base. */ | |
146 | memcpy(result, range + na, pna * 4); | |
147 | ||
148 | /* Add in the child address offset. */ | |
149 | for (i = 0; i < na; i++) | |
150 | result[pna - 1 - i] += | |
151 | (addr[na - 1 - i] - | |
152 | range[na - 1 - i]); | |
153 | ||
154 | memcpy(addr, result, pna * 4); | |
cf44bbc2 DM |
155 | |
156 | return 0; | |
157 | } | |
158 | ||
6a23acf3 | 159 | static unsigned int of_bus_default_get_flags(const u32 *addr) |
cf44bbc2 DM |
160 | { |
161 | return IORESOURCE_MEM; | |
162 | } | |
163 | ||
cf44bbc2 DM |
164 | /* |
165 | * PCI bus specific translator | |
166 | */ | |
167 | ||
168 | static int of_bus_pci_match(struct device_node *np) | |
169 | { | |
a83f9823 | 170 | if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) { |
a165b420 | 171 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
172 | |
173 | if (model && !strcmp(model, "SUNW,simba")) | |
174 | return 0; | |
175 | ||
a83f9823 DM |
176 | /* Do not do PCI specific frobbing if the |
177 | * PCI bridge lacks a ranges property. We | |
178 | * want to pass it through up to the next | |
179 | * parent as-is, not with the PCI translate | |
180 | * method which chops off the top address cell. | |
181 | */ | |
182 | if (!of_find_property(np, "ranges", NULL)) | |
183 | return 0; | |
184 | ||
185 | return 1; | |
186 | } | |
187 | ||
188 | return 0; | |
cf44bbc2 DM |
189 | } |
190 | ||
01f94c4a DM |
191 | static int of_bus_simba_match(struct device_node *np) |
192 | { | |
a165b420 | 193 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
194 | |
195 | if (model && !strcmp(model, "SUNW,simba")) | |
196 | return 1; | |
8c2786cf DM |
197 | |
198 | /* Treat PCI busses lacking ranges property just like | |
199 | * simba. | |
200 | */ | |
201 | if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) { | |
202 | if (!of_find_property(np, "ranges", NULL)) | |
203 | return 1; | |
204 | } | |
205 | ||
01f94c4a DM |
206 | return 0; |
207 | } | |
208 | ||
209 | static int of_bus_simba_map(u32 *addr, const u32 *range, | |
210 | int na, int ns, int pna) | |
211 | { | |
212 | return 0; | |
213 | } | |
214 | ||
cf44bbc2 DM |
215 | static void of_bus_pci_count_cells(struct device_node *np, |
216 | int *addrc, int *sizec) | |
217 | { | |
218 | if (addrc) | |
219 | *addrc = 3; | |
220 | if (sizec) | |
221 | *sizec = 2; | |
222 | } | |
223 | ||
a83f9823 DM |
224 | static int of_bus_pci_map(u32 *addr, const u32 *range, |
225 | int na, int ns, int pna) | |
cf44bbc2 | 226 | { |
a83f9823 DM |
227 | u32 result[OF_MAX_ADDR_CELLS]; |
228 | int i; | |
cf44bbc2 DM |
229 | |
230 | /* Check address type match */ | |
231 | if ((addr[0] ^ range[0]) & 0x03000000) | |
a83f9823 | 232 | return -EINVAL; |
cf44bbc2 | 233 | |
a83f9823 DM |
234 | if (of_out_of_range(addr + 1, range + 1, range + na + pna, |
235 | na - 1, ns)) | |
236 | return -EINVAL; | |
cf44bbc2 | 237 | |
a83f9823 DM |
238 | /* Start with the parent range base. */ |
239 | memcpy(result, range + na, pna * 4); | |
cf44bbc2 | 240 | |
a83f9823 DM |
241 | /* Add in the child address offset, skipping high cell. */ |
242 | for (i = 0; i < na - 1; i++) | |
243 | result[pna - 1 - i] += | |
244 | (addr[na - 1 - i] - | |
245 | range[na - 1 - i]); | |
246 | ||
247 | memcpy(addr, result, pna * 4); | |
248 | ||
249 | return 0; | |
cf44bbc2 DM |
250 | } |
251 | ||
6a23acf3 | 252 | static unsigned int of_bus_pci_get_flags(const u32 *addr) |
cf44bbc2 DM |
253 | { |
254 | unsigned int flags = 0; | |
255 | u32 w = addr[0]; | |
256 | ||
257 | switch((w >> 24) & 0x03) { | |
258 | case 0x01: | |
259 | flags |= IORESOURCE_IO; | |
260 | case 0x02: /* 32 bits */ | |
261 | case 0x03: /* 64 bits */ | |
262 | flags |= IORESOURCE_MEM; | |
263 | } | |
264 | if (w & 0x40000000) | |
265 | flags |= IORESOURCE_PREFETCH; | |
266 | return flags; | |
267 | } | |
268 | ||
cf44bbc2 DM |
269 | /* |
270 | * SBUS bus specific translator | |
271 | */ | |
272 | ||
273 | static int of_bus_sbus_match(struct device_node *np) | |
274 | { | |
275 | return !strcmp(np->name, "sbus") || | |
276 | !strcmp(np->name, "sbi"); | |
277 | } | |
278 | ||
279 | static void of_bus_sbus_count_cells(struct device_node *child, | |
280 | int *addrc, int *sizec) | |
281 | { | |
282 | if (addrc) | |
283 | *addrc = 2; | |
284 | if (sizec) | |
285 | *sizec = 1; | |
286 | } | |
287 | ||
4130a4b2 DM |
288 | /* |
289 | * FHC/Central bus specific translator. | |
290 | * | |
291 | * This is just needed to hard-code the address and size cell | |
292 | * counts. 'fhc' and 'central' nodes lack the #address-cells and | |
293 | * #size-cells properties, and if you walk to the root on such | |
294 | * Enterprise boxes all you'll get is a #size-cells of 2 which is | |
295 | * not what we want to use. | |
296 | */ | |
297 | static int of_bus_fhc_match(struct device_node *np) | |
cf44bbc2 | 298 | { |
4130a4b2 DM |
299 | return !strcmp(np->name, "fhc") || |
300 | !strcmp(np->name, "central"); | |
cf44bbc2 DM |
301 | } |
302 | ||
4130a4b2 | 303 | #define of_bus_fhc_count_cells of_bus_sbus_count_cells |
cf44bbc2 DM |
304 | |
305 | /* | |
306 | * Array of bus specific translators | |
307 | */ | |
308 | ||
309 | static struct of_bus of_busses[] = { | |
310 | /* PCI */ | |
311 | { | |
312 | .name = "pci", | |
313 | .addr_prop_name = "assigned-addresses", | |
314 | .match = of_bus_pci_match, | |
315 | .count_cells = of_bus_pci_count_cells, | |
316 | .map = of_bus_pci_map, | |
cf44bbc2 DM |
317 | .get_flags = of_bus_pci_get_flags, |
318 | }, | |
01f94c4a DM |
319 | /* SIMBA */ |
320 | { | |
321 | .name = "simba", | |
322 | .addr_prop_name = "assigned-addresses", | |
323 | .match = of_bus_simba_match, | |
324 | .count_cells = of_bus_pci_count_cells, | |
325 | .map = of_bus_simba_map, | |
326 | .get_flags = of_bus_pci_get_flags, | |
327 | }, | |
cf44bbc2 DM |
328 | /* SBUS */ |
329 | { | |
330 | .name = "sbus", | |
331 | .addr_prop_name = "reg", | |
332 | .match = of_bus_sbus_match, | |
333 | .count_cells = of_bus_sbus_count_cells, | |
4130a4b2 DM |
334 | .map = of_bus_default_map, |
335 | .get_flags = of_bus_default_get_flags, | |
336 | }, | |
337 | /* FHC */ | |
338 | { | |
339 | .name = "fhc", | |
340 | .addr_prop_name = "reg", | |
341 | .match = of_bus_fhc_match, | |
342 | .count_cells = of_bus_fhc_count_cells, | |
343 | .map = of_bus_default_map, | |
344 | .get_flags = of_bus_default_get_flags, | |
cf44bbc2 DM |
345 | }, |
346 | /* Default */ | |
347 | { | |
348 | .name = "default", | |
349 | .addr_prop_name = "reg", | |
350 | .match = NULL, | |
351 | .count_cells = of_bus_default_count_cells, | |
352 | .map = of_bus_default_map, | |
cf44bbc2 DM |
353 | .get_flags = of_bus_default_get_flags, |
354 | }, | |
355 | }; | |
356 | ||
357 | static struct of_bus *of_match_bus(struct device_node *np) | |
358 | { | |
359 | int i; | |
360 | ||
361 | for (i = 0; i < ARRAY_SIZE(of_busses); i ++) | |
362 | if (!of_busses[i].match || of_busses[i].match(np)) | |
363 | return &of_busses[i]; | |
364 | BUG(); | |
365 | return NULL; | |
366 | } | |
367 | ||
368 | static int __init build_one_resource(struct device_node *parent, | |
369 | struct of_bus *bus, | |
370 | struct of_bus *pbus, | |
371 | u32 *addr, | |
372 | int na, int ns, int pna) | |
373 | { | |
6a23acf3 | 374 | const u32 *ranges; |
cf44bbc2 DM |
375 | unsigned int rlen; |
376 | int rone; | |
cf44bbc2 DM |
377 | |
378 | ranges = of_get_property(parent, "ranges", &rlen); | |
379 | if (ranges == NULL || rlen == 0) { | |
a83f9823 DM |
380 | u32 result[OF_MAX_ADDR_CELLS]; |
381 | int i; | |
382 | ||
383 | memset(result, 0, pna * 4); | |
384 | for (i = 0; i < na; i++) | |
385 | result[pna - 1 - i] = | |
386 | addr[na - 1 - i]; | |
387 | ||
388 | memcpy(addr, result, pna * 4); | |
389 | return 0; | |
cf44bbc2 DM |
390 | } |
391 | ||
392 | /* Now walk through the ranges */ | |
393 | rlen /= 4; | |
394 | rone = na + pna + ns; | |
395 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
a83f9823 DM |
396 | if (!bus->map(addr, ranges, na, ns, pna)) |
397 | return 0; | |
cf44bbc2 | 398 | } |
a83f9823 | 399 | |
49d23cfc DM |
400 | /* When we miss an I/O space match on PCI, just pass it up |
401 | * to the next PCI bridge and/or controller. | |
402 | */ | |
403 | if (!strcmp(bus->name, "pci") && | |
404 | (addr[0] & 0x03000000) == 0x01000000) | |
405 | return 0; | |
406 | ||
a83f9823 DM |
407 | return 1; |
408 | } | |
409 | ||
410 | static int __init use_1to1_mapping(struct device_node *pp) | |
411 | { | |
a83f9823 DM |
412 | /* If we have a ranges property in the parent, use it. */ |
413 | if (of_find_property(pp, "ranges", NULL) != NULL) | |
414 | return 0; | |
cf44bbc2 | 415 | |
a83f9823 DM |
416 | /* If the parent is the dma node of an ISA bus, pass |
417 | * the translation up to the root. | |
418 | */ | |
419 | if (!strcmp(pp->name, "dma")) | |
420 | return 0; | |
421 | ||
8c2786cf DM |
422 | /* Similarly for all PCI bridges, if we get this far |
423 | * it lacks a ranges property, and this will include | |
424 | * cases like Simba. | |
425 | */ | |
426 | if (!strcmp(pp->type, "pci") || !strcmp(pp->type, "pciex")) | |
a83f9823 DM |
427 | return 0; |
428 | ||
429 | return 1; | |
cf44bbc2 DM |
430 | } |
431 | ||
a83f9823 DM |
432 | static int of_resource_verbose; |
433 | ||
cf44bbc2 DM |
434 | static void __init build_device_resources(struct of_device *op, |
435 | struct device *parent) | |
436 | { | |
437 | struct of_device *p_op; | |
438 | struct of_bus *bus; | |
439 | int na, ns; | |
440 | int index, num_reg; | |
6a23acf3 | 441 | const void *preg; |
cf44bbc2 DM |
442 | |
443 | if (!parent) | |
444 | return; | |
445 | ||
446 | p_op = to_of_device(parent); | |
447 | bus = of_match_bus(p_op->node); | |
448 | bus->count_cells(op->node, &na, &ns); | |
449 | ||
450 | preg = of_get_property(op->node, bus->addr_prop_name, &num_reg); | |
451 | if (!preg || num_reg == 0) | |
452 | return; | |
453 | ||
454 | /* Convert to num-cells. */ | |
455 | num_reg /= 4; | |
456 | ||
46ba6d7d | 457 | /* Convert to num-entries. */ |
cf44bbc2 DM |
458 | num_reg /= na + ns; |
459 | ||
e5dd42e4 | 460 | /* Prevent overrunning the op->resources[] array. */ |
46ba6d7d DM |
461 | if (num_reg > PROMREG_MAX) { |
462 | printk(KERN_WARNING "%s: Too many regs (%d), " | |
463 | "limiting to %d.\n", | |
464 | op->node->full_name, num_reg, PROMREG_MAX); | |
465 | num_reg = PROMREG_MAX; | |
466 | } | |
467 | ||
cf44bbc2 DM |
468 | for (index = 0; index < num_reg; index++) { |
469 | struct resource *r = &op->resource[index]; | |
470 | u32 addr[OF_MAX_ADDR_CELLS]; | |
6a23acf3 | 471 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
cf44bbc2 DM |
472 | struct device_node *dp = op->node; |
473 | struct device_node *pp = p_op->node; | |
b85cdd49 | 474 | struct of_bus *pbus, *dbus; |
cf44bbc2 DM |
475 | u64 size, result = OF_BAD_ADDR; |
476 | unsigned long flags; | |
477 | int dna, dns; | |
478 | int pna, pns; | |
479 | ||
480 | size = of_read_addr(reg + na, ns); | |
481 | flags = bus->get_flags(reg); | |
482 | ||
483 | memcpy(addr, reg, na * 4); | |
484 | ||
a83f9823 | 485 | if (use_1to1_mapping(pp)) { |
cf44bbc2 DM |
486 | result = of_read_addr(addr, na); |
487 | goto build_res; | |
488 | } | |
489 | ||
490 | dna = na; | |
491 | dns = ns; | |
b85cdd49 | 492 | dbus = bus; |
cf44bbc2 DM |
493 | |
494 | while (1) { | |
495 | dp = pp; | |
496 | pp = dp->parent; | |
497 | if (!pp) { | |
498 | result = of_read_addr(addr, dna); | |
499 | break; | |
500 | } | |
501 | ||
502 | pbus = of_match_bus(pp); | |
503 | pbus->count_cells(dp, &pna, &pns); | |
504 | ||
b85cdd49 | 505 | if (build_one_resource(dp, dbus, pbus, addr, |
a83f9823 | 506 | dna, dns, pna)) |
cf44bbc2 DM |
507 | break; |
508 | ||
509 | dna = pna; | |
510 | dns = pns; | |
b85cdd49 | 511 | dbus = pbus; |
cf44bbc2 DM |
512 | } |
513 | ||
514 | build_res: | |
515 | memset(r, 0, sizeof(*r)); | |
a83f9823 DM |
516 | |
517 | if (of_resource_verbose) | |
518 | printk("%s reg[%d] -> %lx\n", | |
519 | op->node->full_name, index, | |
520 | result); | |
521 | ||
cf44bbc2 | 522 | if (result != OF_BAD_ADDR) { |
1815aed5 DM |
523 | if (tlb_type == hypervisor) |
524 | result &= 0x0fffffffffffffffUL; | |
525 | ||
cf44bbc2 DM |
526 | r->start = result; |
527 | r->end = result + size - 1; | |
528 | r->flags = flags; | |
cf44bbc2 DM |
529 | } |
530 | r->name = op->node->name; | |
531 | } | |
532 | } | |
533 | ||
2b1e5978 DM |
534 | static struct device_node * __init |
535 | apply_interrupt_map(struct device_node *dp, struct device_node *pp, | |
6a23acf3 | 536 | const u32 *imap, int imlen, const u32 *imask, |
2b1e5978 DM |
537 | unsigned int *irq_p) |
538 | { | |
539 | struct device_node *cp; | |
540 | unsigned int irq = *irq_p; | |
541 | struct of_bus *bus; | |
542 | phandle handle; | |
6a23acf3 | 543 | const u32 *reg; |
2b1e5978 DM |
544 | int na, num_reg, i; |
545 | ||
546 | bus = of_match_bus(pp); | |
547 | bus->count_cells(dp, &na, NULL); | |
548 | ||
549 | reg = of_get_property(dp, "reg", &num_reg); | |
550 | if (!reg || !num_reg) | |
551 | return NULL; | |
552 | ||
553 | imlen /= ((na + 3) * 4); | |
554 | handle = 0; | |
555 | for (i = 0; i < imlen; i++) { | |
556 | int j; | |
557 | ||
558 | for (j = 0; j < na; j++) { | |
559 | if ((reg[j] & imask[j]) != imap[j]) | |
560 | goto next; | |
561 | } | |
562 | if (imap[na] == irq) { | |
563 | handle = imap[na + 1]; | |
564 | irq = imap[na + 2]; | |
565 | break; | |
566 | } | |
567 | ||
568 | next: | |
569 | imap += (na + 3); | |
570 | } | |
46ba6d7d DM |
571 | if (i == imlen) { |
572 | /* Psycho and Sabre PCI controllers can have 'interrupt-map' | |
573 | * properties that do not include the on-board device | |
574 | * interrupts. Instead, the device's 'interrupts' property | |
575 | * is already a fully specified INO value. | |
576 | * | |
577 | * Handle this by deciding that, if we didn't get a | |
578 | * match in the parent's 'interrupt-map', and the | |
579 | * parent is an IRQ translater, then use the parent as | |
580 | * our IRQ controller. | |
581 | */ | |
582 | if (pp->irq_trans) | |
583 | return pp; | |
584 | ||
2b1e5978 | 585 | return NULL; |
46ba6d7d | 586 | } |
2b1e5978 DM |
587 | |
588 | *irq_p = irq; | |
589 | cp = of_find_node_by_phandle(handle); | |
590 | ||
591 | return cp; | |
592 | } | |
593 | ||
594 | static unsigned int __init pci_irq_swizzle(struct device_node *dp, | |
595 | struct device_node *pp, | |
596 | unsigned int irq) | |
597 | { | |
6a23acf3 | 598 | const struct linux_prom_pci_registers *regs; |
bb4c18cb | 599 | unsigned int bus, devfn, slot, ret; |
2b1e5978 DM |
600 | |
601 | if (irq < 1 || irq > 4) | |
602 | return irq; | |
603 | ||
604 | regs = of_get_property(dp, "reg", NULL); | |
605 | if (!regs) | |
606 | return irq; | |
607 | ||
bb4c18cb | 608 | bus = (regs->phys_hi >> 16) & 0xff; |
2b1e5978 DM |
609 | devfn = (regs->phys_hi >> 8) & 0xff; |
610 | slot = (devfn >> 3) & 0x1f; | |
611 | ||
bb4c18cb DM |
612 | if (pp->irq_trans) { |
613 | /* Derived from Table 8-3, U2P User's Manual. This branch | |
614 | * is handling a PCI controller that lacks a proper set of | |
615 | * interrupt-map and interrupt-map-mask properties. The | |
616 | * Ultra-E450 is one example. | |
617 | * | |
618 | * The bit layout is BSSLL, where: | |
619 | * B: 0 on bus A, 1 on bus B | |
620 | * D: 2-bit slot number, derived from PCI device number as | |
621 | * (dev - 1) for bus A, or (dev - 2) for bus B | |
622 | * L: 2-bit line number | |
bb4c18cb DM |
623 | */ |
624 | if (bus & 0x80) { | |
625 | /* PBM-A */ | |
626 | bus = 0x00; | |
627 | slot = (slot - 1) << 2; | |
628 | } else { | |
629 | /* PBM-B */ | |
630 | bus = 0x10; | |
631 | slot = (slot - 2) << 2; | |
632 | } | |
633 | irq -= 1; | |
634 | ||
635 | ret = (bus | slot | irq); | |
636 | } else { | |
637 | /* Going through a PCI-PCI bridge that lacks a set of | |
638 | * interrupt-map and interrupt-map-mask properties. | |
639 | */ | |
640 | ret = ((irq - 1 + (slot & 3)) & 3) + 1; | |
641 | } | |
2b1e5978 DM |
642 | |
643 | return ret; | |
644 | } | |
645 | ||
a83f9823 DM |
646 | static int of_irq_verbose; |
647 | ||
2b1e5978 DM |
648 | static unsigned int __init build_one_device_irq(struct of_device *op, |
649 | struct device *parent, | |
650 | unsigned int irq) | |
651 | { | |
652 | struct device_node *dp = op->node; | |
653 | struct device_node *pp, *ip; | |
654 | unsigned int orig_irq = irq; | |
c1b1a5f1 | 655 | int nid; |
2b1e5978 DM |
656 | |
657 | if (irq == 0xffffffff) | |
658 | return irq; | |
659 | ||
660 | if (dp->irq_trans) { | |
661 | irq = dp->irq_trans->irq_build(dp, irq, | |
662 | dp->irq_trans->data); | |
a83f9823 DM |
663 | |
664 | if (of_irq_verbose) | |
665 | printk("%s: direct translate %x --> %x\n", | |
666 | dp->full_name, orig_irq, irq); | |
667 | ||
c1b1a5f1 | 668 | goto out; |
2b1e5978 DM |
669 | } |
670 | ||
671 | /* Something more complicated. Walk up to the root, applying | |
672 | * interrupt-map or bus specific translations, until we hit | |
673 | * an IRQ translator. | |
674 | * | |
675 | * If we hit a bus type or situation we cannot handle, we | |
676 | * stop and assume that the original IRQ number was in a | |
677 | * format which has special meaning to it's immediate parent. | |
678 | */ | |
679 | pp = dp->parent; | |
680 | ip = NULL; | |
681 | while (pp) { | |
6a23acf3 | 682 | const void *imap, *imsk; |
2b1e5978 DM |
683 | int imlen; |
684 | ||
685 | imap = of_get_property(pp, "interrupt-map", &imlen); | |
686 | imsk = of_get_property(pp, "interrupt-map-mask", NULL); | |
687 | if (imap && imsk) { | |
688 | struct device_node *iret; | |
689 | int this_orig_irq = irq; | |
690 | ||
691 | iret = apply_interrupt_map(dp, pp, | |
692 | imap, imlen, imsk, | |
693 | &irq); | |
a83f9823 DM |
694 | |
695 | if (of_irq_verbose) | |
696 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", | |
697 | op->node->full_name, | |
698 | pp->full_name, this_orig_irq, | |
699 | (iret ? iret->full_name : "NULL"), irq); | |
700 | ||
2b1e5978 DM |
701 | if (!iret) |
702 | break; | |
703 | ||
704 | if (iret->irq_trans) { | |
705 | ip = iret; | |
706 | break; | |
707 | } | |
708 | } else { | |
709 | if (!strcmp(pp->type, "pci") || | |
710 | !strcmp(pp->type, "pciex")) { | |
711 | unsigned int this_orig_irq = irq; | |
712 | ||
713 | irq = pci_irq_swizzle(dp, pp, irq); | |
a83f9823 DM |
714 | if (of_irq_verbose) |
715 | printk("%s: PCI swizzle [%s] " | |
716 | "%x --> %x\n", | |
717 | op->node->full_name, | |
718 | pp->full_name, this_orig_irq, | |
719 | irq); | |
720 | ||
2b1e5978 DM |
721 | } |
722 | ||
723 | if (pp->irq_trans) { | |
724 | ip = pp; | |
725 | break; | |
726 | } | |
727 | } | |
728 | dp = pp; | |
729 | pp = pp->parent; | |
730 | } | |
731 | if (!ip) | |
732 | return orig_irq; | |
733 | ||
734 | irq = ip->irq_trans->irq_build(op->node, irq, | |
735 | ip->irq_trans->data); | |
a83f9823 DM |
736 | if (of_irq_verbose) |
737 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", | |
738 | op->node->full_name, ip->full_name, orig_irq, irq); | |
2b1e5978 | 739 | |
c1b1a5f1 DM |
740 | out: |
741 | nid = of_node_to_nid(dp); | |
742 | if (nid != -1) { | |
743 | cpumask_t numa_mask = node_to_cpumask(nid); | |
744 | ||
745 | irq_set_affinity(irq, numa_mask); | |
746 | } | |
747 | ||
2b1e5978 DM |
748 | return irq; |
749 | } | |
750 | ||
cf44bbc2 DM |
751 | static struct of_device * __init scan_one_device(struct device_node *dp, |
752 | struct device *parent) | |
753 | { | |
754 | struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL); | |
6a23acf3 | 755 | const unsigned int *irq; |
3d6e4702 | 756 | struct dev_archdata *sd; |
2b1e5978 | 757 | int len, i; |
cf44bbc2 DM |
758 | |
759 | if (!op) | |
760 | return NULL; | |
761 | ||
3d6e4702 DM |
762 | sd = &op->dev.archdata; |
763 | sd->prom_node = dp; | |
764 | sd->op = op; | |
765 | ||
cf44bbc2 DM |
766 | op->node = dp; |
767 | ||
768 | op->clock_freq = of_getintprop_default(dp, "clock-frequency", | |
769 | (25*1000*1000)); | |
770 | op->portid = of_getintprop_default(dp, "upa-portid", -1); | |
771 | if (op->portid == -1) | |
772 | op->portid = of_getintprop_default(dp, "portid", -1); | |
773 | ||
774 | irq = of_get_property(dp, "interrupts", &len); | |
2b1e5978 DM |
775 | if (irq) { |
776 | memcpy(op->irqs, irq, len); | |
777 | op->num_irqs = len / 4; | |
778 | } else { | |
779 | op->num_irqs = 0; | |
780 | } | |
cf44bbc2 | 781 | |
e5dd42e4 | 782 | /* Prevent overrunning the op->irqs[] array. */ |
46ba6d7d DM |
783 | if (op->num_irqs > PROMINTR_MAX) { |
784 | printk(KERN_WARNING "%s: Too many irqs (%d), " | |
785 | "limiting to %d.\n", | |
786 | dp->full_name, op->num_irqs, PROMINTR_MAX); | |
787 | op->num_irqs = PROMINTR_MAX; | |
788 | } | |
789 | ||
cf44bbc2 | 790 | build_device_resources(op, parent); |
2b1e5978 DM |
791 | for (i = 0; i < op->num_irqs; i++) |
792 | op->irqs[i] = build_one_device_irq(op, parent, op->irqs[i]); | |
cf44bbc2 DM |
793 | |
794 | op->dev.parent = parent; | |
37b7754a | 795 | op->dev.bus = &of_platform_bus_type; |
cf44bbc2 | 796 | if (!parent) |
2222c313 | 797 | dev_set_name(&op->dev, "root"); |
cf44bbc2 | 798 | else |
2222c313 | 799 | dev_set_name(&op->dev, "%08x", dp->node); |
cf44bbc2 DM |
800 | |
801 | if (of_device_register(op)) { | |
802 | printk("%s: Could not register of device.\n", | |
803 | dp->full_name); | |
804 | kfree(op); | |
805 | op = NULL; | |
806 | } | |
807 | ||
808 | return op; | |
809 | } | |
810 | ||
811 | static void __init scan_tree(struct device_node *dp, struct device *parent) | |
812 | { | |
813 | while (dp) { | |
814 | struct of_device *op = scan_one_device(dp, parent); | |
815 | ||
816 | if (op) | |
817 | scan_tree(dp->child, &op->dev); | |
818 | ||
819 | dp = dp->sibling; | |
820 | } | |
821 | } | |
822 | ||
823 | static void __init scan_of_devices(void) | |
824 | { | |
825 | struct device_node *root = of_find_node_by_path("/"); | |
826 | struct of_device *parent; | |
827 | ||
828 | parent = scan_one_device(root, NULL); | |
829 | if (!parent) | |
830 | return; | |
831 | ||
832 | scan_tree(root->child, &parent->dev); | |
833 | } | |
834 | ||
a2bd4fd1 DM |
835 | static int __init of_bus_driver_init(void) |
836 | { | |
cf44bbc2 | 837 | int err; |
a2bd4fd1 | 838 | |
3f23de10 | 839 | err = of_bus_type_init(&of_platform_bus_type, "of"); |
a2bd4fd1 | 840 | #ifdef CONFIG_PCI |
a2bd4fd1 | 841 | if (!err) |
3f23de10 | 842 | err = of_bus_type_init(&ebus_bus_type, "ebus"); |
a2bd4fd1 DM |
843 | #endif |
844 | #ifdef CONFIG_SBUS | |
845 | if (!err) | |
3f23de10 | 846 | err = of_bus_type_init(&sbus_bus_type, "sbus"); |
a2bd4fd1 | 847 | #endif |
cf44bbc2 DM |
848 | |
849 | if (!err) | |
850 | scan_of_devices(); | |
851 | ||
852 | return err; | |
a2bd4fd1 DM |
853 | } |
854 | ||
855 | postcore_initcall(of_bus_driver_init); | |
856 | ||
a83f9823 DM |
857 | static int __init of_debug(char *str) |
858 | { | |
859 | int val = 0; | |
860 | ||
861 | get_option(&str, &val); | |
862 | if (val & 1) | |
863 | of_resource_verbose = 1; | |
864 | if (val & 2) | |
865 | of_irq_verbose = 1; | |
866 | return 1; | |
867 | } | |
868 | ||
869 | __setup("of_debug=", of_debug); |