Commit | Line | Data |
---|---|---|
a2bd4fd1 DM |
1 | #include <linux/string.h> |
2 | #include <linux/kernel.h> | |
f85ff305 | 3 | #include <linux/of.h> |
a2bd4fd1 DM |
4 | #include <linux/init.h> |
5 | #include <linux/module.h> | |
6 | #include <linux/mod_devicetable.h> | |
7 | #include <linux/slab.h> | |
3f23de10 | 8 | #include <linux/errno.h> |
c1b1a5f1 | 9 | #include <linux/irq.h> |
3f23de10 SR |
10 | #include <linux/of_device.h> |
11 | #include <linux/of_platform.h> | |
a2bd4fd1 | 12 | |
3ca9fab4 DM |
13 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name) |
14 | { | |
15 | unsigned long ret = res->start + offset; | |
6bda5736 | 16 | struct resource *r; |
3ca9fab4 | 17 | |
6bda5736 DM |
18 | if (res->flags & IORESOURCE_MEM) |
19 | r = request_mem_region(ret, size, name); | |
20 | else | |
21 | r = request_region(ret, size, name); | |
22 | if (!r) | |
3ca9fab4 DM |
23 | ret = 0; |
24 | ||
25 | return (void __iomem *) ret; | |
26 | } | |
27 | EXPORT_SYMBOL(of_ioremap); | |
28 | ||
e3a411a3 | 29 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 | 30 | { |
e3a411a3 DM |
31 | if (res->flags & IORESOURCE_MEM) |
32 | release_mem_region((unsigned long) base, size); | |
33 | else | |
34 | release_region((unsigned long) base, size); | |
3ca9fab4 DM |
35 | } |
36 | EXPORT_SYMBOL(of_iounmap); | |
37 | ||
2b1e5978 DM |
38 | static int node_match(struct device *dev, void *data) |
39 | { | |
40 | struct of_device *op = to_of_device(dev); | |
41 | struct device_node *dp = data; | |
42 | ||
43 | return (op->node == dp); | |
44 | } | |
45 | ||
46 | struct of_device *of_find_device_by_node(struct device_node *dp) | |
47 | { | |
37b7754a | 48 | struct device *dev = bus_find_device(&of_platform_bus_type, NULL, |
2b1e5978 DM |
49 | dp, node_match); |
50 | ||
51 | if (dev) | |
52 | return to_of_device(dev); | |
53 | ||
54 | return NULL; | |
55 | } | |
56 | EXPORT_SYMBOL(of_find_device_by_node); | |
57 | ||
51e0f004 | 58 | unsigned int irq_of_parse_and_map(struct device_node *node, int index) |
44266215 DM |
59 | { |
60 | struct of_device *op = of_find_device_by_node(node); | |
61 | ||
62 | if (!op || index >= op->num_irqs) | |
51e0f004 | 63 | return 0; |
44266215 DM |
64 | |
65 | return op->irqs[index]; | |
66 | } | |
67 | EXPORT_SYMBOL(irq_of_parse_and_map); | |
68 | ||
5059625e DM |
69 | /* Take the archdata values for IOMMU, STC, and HOSTDATA found in |
70 | * BUS and propagate to all child of_device objects. | |
71 | */ | |
72 | void of_propagate_archdata(struct of_device *bus) | |
73 | { | |
74 | struct dev_archdata *bus_sd = &bus->dev.archdata; | |
75 | struct device_node *bus_dp = bus->node; | |
76 | struct device_node *dp; | |
77 | ||
78 | for (dp = bus_dp->child; dp; dp = dp->sibling) { | |
79 | struct of_device *op = of_find_device_by_node(dp); | |
80 | ||
81 | op->dev.archdata.iommu = bus_sd->iommu; | |
82 | op->dev.archdata.stc = bus_sd->stc; | |
83 | op->dev.archdata.host_controller = bus_sd->host_controller; | |
84 | op->dev.archdata.numa_node = bus_sd->numa_node; | |
85 | ||
86 | if (dp->child) | |
87 | of_propagate_archdata(op); | |
88 | } | |
89 | } | |
90 | ||
3f23de10 | 91 | struct bus_type of_platform_bus_type; |
37b7754a | 92 | EXPORT_SYMBOL(of_platform_bus_type); |
cf44bbc2 | 93 | |
a83f9823 | 94 | static inline u64 of_read_addr(const u32 *cell, int size) |
cf44bbc2 DM |
95 | { |
96 | u64 r = 0; | |
97 | while (size--) | |
98 | r = (r << 32) | *(cell++); | |
99 | return r; | |
100 | } | |
101 | ||
102 | static void __init get_cells(struct device_node *dp, | |
103 | int *addrc, int *sizec) | |
104 | { | |
105 | if (addrc) | |
106 | *addrc = of_n_addr_cells(dp); | |
107 | if (sizec) | |
108 | *sizec = of_n_size_cells(dp); | |
109 | } | |
110 | ||
111 | /* Max address size we deal with */ | |
112 | #define OF_MAX_ADDR_CELLS 4 | |
113 | ||
114 | struct of_bus { | |
115 | const char *name; | |
116 | const char *addr_prop_name; | |
117 | int (*match)(struct device_node *parent); | |
118 | void (*count_cells)(struct device_node *child, | |
119 | int *addrc, int *sizec); | |
a83f9823 DM |
120 | int (*map)(u32 *addr, const u32 *range, |
121 | int na, int ns, int pna); | |
6a23acf3 | 122 | unsigned int (*get_flags)(const u32 *addr); |
cf44bbc2 DM |
123 | }; |
124 | ||
125 | /* | |
126 | * Default translator (generic bus) | |
127 | */ | |
128 | ||
129 | static void of_bus_default_count_cells(struct device_node *dev, | |
130 | int *addrc, int *sizec) | |
131 | { | |
132 | get_cells(dev, addrc, sizec); | |
133 | } | |
134 | ||
a83f9823 DM |
135 | /* Make sure the least significant 64-bits are in-range. Even |
136 | * for 3 or 4 cell values it is a good enough approximation. | |
137 | */ | |
138 | static int of_out_of_range(const u32 *addr, const u32 *base, | |
139 | const u32 *size, int na, int ns) | |
cf44bbc2 | 140 | { |
a83f9823 DM |
141 | u64 a = of_read_addr(addr, na); |
142 | u64 b = of_read_addr(base, na); | |
cf44bbc2 | 143 | |
a83f9823 DM |
144 | if (a < b) |
145 | return 1; | |
cf44bbc2 | 146 | |
a83f9823 DM |
147 | b += of_read_addr(size, ns); |
148 | if (a >= b) | |
149 | return 1; | |
150 | ||
151 | return 0; | |
cf44bbc2 DM |
152 | } |
153 | ||
a83f9823 DM |
154 | static int of_bus_default_map(u32 *addr, const u32 *range, |
155 | int na, int ns, int pna) | |
cf44bbc2 | 156 | { |
a83f9823 DM |
157 | u32 result[OF_MAX_ADDR_CELLS]; |
158 | int i; | |
159 | ||
160 | if (ns > 2) { | |
161 | printk("of_device: Cannot handle size cells (%d) > 2.", ns); | |
162 | return -EINVAL; | |
163 | } | |
164 | ||
165 | if (of_out_of_range(addr, range, range + na + pna, na, ns)) | |
166 | return -EINVAL; | |
167 | ||
168 | /* Start with the parent range base. */ | |
169 | memcpy(result, range + na, pna * 4); | |
170 | ||
171 | /* Add in the child address offset. */ | |
172 | for (i = 0; i < na; i++) | |
173 | result[pna - 1 - i] += | |
174 | (addr[na - 1 - i] - | |
175 | range[na - 1 - i]); | |
176 | ||
177 | memcpy(addr, result, pna * 4); | |
cf44bbc2 DM |
178 | |
179 | return 0; | |
180 | } | |
181 | ||
6a23acf3 | 182 | static unsigned int of_bus_default_get_flags(const u32 *addr) |
cf44bbc2 DM |
183 | { |
184 | return IORESOURCE_MEM; | |
185 | } | |
186 | ||
cf44bbc2 DM |
187 | /* |
188 | * PCI bus specific translator | |
189 | */ | |
190 | ||
191 | static int of_bus_pci_match(struct device_node *np) | |
192 | { | |
a83f9823 | 193 | if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) { |
a165b420 | 194 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
195 | |
196 | if (model && !strcmp(model, "SUNW,simba")) | |
197 | return 0; | |
198 | ||
a83f9823 DM |
199 | /* Do not do PCI specific frobbing if the |
200 | * PCI bridge lacks a ranges property. We | |
201 | * want to pass it through up to the next | |
202 | * parent as-is, not with the PCI translate | |
203 | * method which chops off the top address cell. | |
204 | */ | |
205 | if (!of_find_property(np, "ranges", NULL)) | |
206 | return 0; | |
207 | ||
208 | return 1; | |
209 | } | |
210 | ||
211 | return 0; | |
cf44bbc2 DM |
212 | } |
213 | ||
01f94c4a DM |
214 | static int of_bus_simba_match(struct device_node *np) |
215 | { | |
a165b420 | 216 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
217 | |
218 | if (model && !strcmp(model, "SUNW,simba")) | |
219 | return 1; | |
8c2786cf DM |
220 | |
221 | /* Treat PCI busses lacking ranges property just like | |
222 | * simba. | |
223 | */ | |
224 | if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) { | |
225 | if (!of_find_property(np, "ranges", NULL)) | |
226 | return 1; | |
227 | } | |
228 | ||
01f94c4a DM |
229 | return 0; |
230 | } | |
231 | ||
232 | static int of_bus_simba_map(u32 *addr, const u32 *range, | |
233 | int na, int ns, int pna) | |
234 | { | |
235 | return 0; | |
236 | } | |
237 | ||
cf44bbc2 DM |
238 | static void of_bus_pci_count_cells(struct device_node *np, |
239 | int *addrc, int *sizec) | |
240 | { | |
241 | if (addrc) | |
242 | *addrc = 3; | |
243 | if (sizec) | |
244 | *sizec = 2; | |
245 | } | |
246 | ||
a83f9823 DM |
247 | static int of_bus_pci_map(u32 *addr, const u32 *range, |
248 | int na, int ns, int pna) | |
cf44bbc2 | 249 | { |
a83f9823 DM |
250 | u32 result[OF_MAX_ADDR_CELLS]; |
251 | int i; | |
cf44bbc2 DM |
252 | |
253 | /* Check address type match */ | |
254 | if ((addr[0] ^ range[0]) & 0x03000000) | |
a83f9823 | 255 | return -EINVAL; |
cf44bbc2 | 256 | |
a83f9823 DM |
257 | if (of_out_of_range(addr + 1, range + 1, range + na + pna, |
258 | na - 1, ns)) | |
259 | return -EINVAL; | |
cf44bbc2 | 260 | |
a83f9823 DM |
261 | /* Start with the parent range base. */ |
262 | memcpy(result, range + na, pna * 4); | |
cf44bbc2 | 263 | |
a83f9823 DM |
264 | /* Add in the child address offset, skipping high cell. */ |
265 | for (i = 0; i < na - 1; i++) | |
266 | result[pna - 1 - i] += | |
267 | (addr[na - 1 - i] - | |
268 | range[na - 1 - i]); | |
269 | ||
270 | memcpy(addr, result, pna * 4); | |
271 | ||
272 | return 0; | |
cf44bbc2 DM |
273 | } |
274 | ||
6a23acf3 | 275 | static unsigned int of_bus_pci_get_flags(const u32 *addr) |
cf44bbc2 DM |
276 | { |
277 | unsigned int flags = 0; | |
278 | u32 w = addr[0]; | |
279 | ||
280 | switch((w >> 24) & 0x03) { | |
281 | case 0x01: | |
282 | flags |= IORESOURCE_IO; | |
283 | case 0x02: /* 32 bits */ | |
284 | case 0x03: /* 64 bits */ | |
285 | flags |= IORESOURCE_MEM; | |
286 | } | |
287 | if (w & 0x40000000) | |
288 | flags |= IORESOURCE_PREFETCH; | |
289 | return flags; | |
290 | } | |
291 | ||
cf44bbc2 DM |
292 | /* |
293 | * SBUS bus specific translator | |
294 | */ | |
295 | ||
296 | static int of_bus_sbus_match(struct device_node *np) | |
297 | { | |
298 | return !strcmp(np->name, "sbus") || | |
299 | !strcmp(np->name, "sbi"); | |
300 | } | |
301 | ||
302 | static void of_bus_sbus_count_cells(struct device_node *child, | |
303 | int *addrc, int *sizec) | |
304 | { | |
305 | if (addrc) | |
306 | *addrc = 2; | |
307 | if (sizec) | |
308 | *sizec = 1; | |
309 | } | |
310 | ||
4130a4b2 DM |
311 | /* |
312 | * FHC/Central bus specific translator. | |
313 | * | |
314 | * This is just needed to hard-code the address and size cell | |
315 | * counts. 'fhc' and 'central' nodes lack the #address-cells and | |
316 | * #size-cells properties, and if you walk to the root on such | |
317 | * Enterprise boxes all you'll get is a #size-cells of 2 which is | |
318 | * not what we want to use. | |
319 | */ | |
320 | static int of_bus_fhc_match(struct device_node *np) | |
cf44bbc2 | 321 | { |
4130a4b2 DM |
322 | return !strcmp(np->name, "fhc") || |
323 | !strcmp(np->name, "central"); | |
cf44bbc2 DM |
324 | } |
325 | ||
4130a4b2 | 326 | #define of_bus_fhc_count_cells of_bus_sbus_count_cells |
cf44bbc2 DM |
327 | |
328 | /* | |
329 | * Array of bus specific translators | |
330 | */ | |
331 | ||
332 | static struct of_bus of_busses[] = { | |
333 | /* PCI */ | |
334 | { | |
335 | .name = "pci", | |
336 | .addr_prop_name = "assigned-addresses", | |
337 | .match = of_bus_pci_match, | |
338 | .count_cells = of_bus_pci_count_cells, | |
339 | .map = of_bus_pci_map, | |
cf44bbc2 DM |
340 | .get_flags = of_bus_pci_get_flags, |
341 | }, | |
01f94c4a DM |
342 | /* SIMBA */ |
343 | { | |
344 | .name = "simba", | |
345 | .addr_prop_name = "assigned-addresses", | |
346 | .match = of_bus_simba_match, | |
347 | .count_cells = of_bus_pci_count_cells, | |
348 | .map = of_bus_simba_map, | |
349 | .get_flags = of_bus_pci_get_flags, | |
350 | }, | |
cf44bbc2 DM |
351 | /* SBUS */ |
352 | { | |
353 | .name = "sbus", | |
354 | .addr_prop_name = "reg", | |
355 | .match = of_bus_sbus_match, | |
356 | .count_cells = of_bus_sbus_count_cells, | |
4130a4b2 DM |
357 | .map = of_bus_default_map, |
358 | .get_flags = of_bus_default_get_flags, | |
359 | }, | |
360 | /* FHC */ | |
361 | { | |
362 | .name = "fhc", | |
363 | .addr_prop_name = "reg", | |
364 | .match = of_bus_fhc_match, | |
365 | .count_cells = of_bus_fhc_count_cells, | |
366 | .map = of_bus_default_map, | |
367 | .get_flags = of_bus_default_get_flags, | |
cf44bbc2 DM |
368 | }, |
369 | /* Default */ | |
370 | { | |
371 | .name = "default", | |
372 | .addr_prop_name = "reg", | |
373 | .match = NULL, | |
374 | .count_cells = of_bus_default_count_cells, | |
375 | .map = of_bus_default_map, | |
cf44bbc2 DM |
376 | .get_flags = of_bus_default_get_flags, |
377 | }, | |
378 | }; | |
379 | ||
380 | static struct of_bus *of_match_bus(struct device_node *np) | |
381 | { | |
382 | int i; | |
383 | ||
384 | for (i = 0; i < ARRAY_SIZE(of_busses); i ++) | |
385 | if (!of_busses[i].match || of_busses[i].match(np)) | |
386 | return &of_busses[i]; | |
387 | BUG(); | |
388 | return NULL; | |
389 | } | |
390 | ||
391 | static int __init build_one_resource(struct device_node *parent, | |
392 | struct of_bus *bus, | |
393 | struct of_bus *pbus, | |
394 | u32 *addr, | |
395 | int na, int ns, int pna) | |
396 | { | |
6a23acf3 | 397 | const u32 *ranges; |
cf44bbc2 DM |
398 | unsigned int rlen; |
399 | int rone; | |
cf44bbc2 DM |
400 | |
401 | ranges = of_get_property(parent, "ranges", &rlen); | |
402 | if (ranges == NULL || rlen == 0) { | |
a83f9823 DM |
403 | u32 result[OF_MAX_ADDR_CELLS]; |
404 | int i; | |
405 | ||
406 | memset(result, 0, pna * 4); | |
407 | for (i = 0; i < na; i++) | |
408 | result[pna - 1 - i] = | |
409 | addr[na - 1 - i]; | |
410 | ||
411 | memcpy(addr, result, pna * 4); | |
412 | return 0; | |
cf44bbc2 DM |
413 | } |
414 | ||
415 | /* Now walk through the ranges */ | |
416 | rlen /= 4; | |
417 | rone = na + pna + ns; | |
418 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
a83f9823 DM |
419 | if (!bus->map(addr, ranges, na, ns, pna)) |
420 | return 0; | |
cf44bbc2 | 421 | } |
a83f9823 | 422 | |
49d23cfc DM |
423 | /* When we miss an I/O space match on PCI, just pass it up |
424 | * to the next PCI bridge and/or controller. | |
425 | */ | |
426 | if (!strcmp(bus->name, "pci") && | |
427 | (addr[0] & 0x03000000) == 0x01000000) | |
428 | return 0; | |
429 | ||
a83f9823 DM |
430 | return 1; |
431 | } | |
432 | ||
433 | static int __init use_1to1_mapping(struct device_node *pp) | |
434 | { | |
a83f9823 DM |
435 | /* If we have a ranges property in the parent, use it. */ |
436 | if (of_find_property(pp, "ranges", NULL) != NULL) | |
437 | return 0; | |
cf44bbc2 | 438 | |
a83f9823 DM |
439 | /* If the parent is the dma node of an ISA bus, pass |
440 | * the translation up to the root. | |
441 | */ | |
442 | if (!strcmp(pp->name, "dma")) | |
443 | return 0; | |
444 | ||
8c2786cf DM |
445 | /* Similarly for all PCI bridges, if we get this far |
446 | * it lacks a ranges property, and this will include | |
447 | * cases like Simba. | |
448 | */ | |
449 | if (!strcmp(pp->type, "pci") || !strcmp(pp->type, "pciex")) | |
a83f9823 DM |
450 | return 0; |
451 | ||
452 | return 1; | |
cf44bbc2 DM |
453 | } |
454 | ||
a83f9823 DM |
455 | static int of_resource_verbose; |
456 | ||
cf44bbc2 DM |
457 | static void __init build_device_resources(struct of_device *op, |
458 | struct device *parent) | |
459 | { | |
460 | struct of_device *p_op; | |
461 | struct of_bus *bus; | |
462 | int na, ns; | |
463 | int index, num_reg; | |
6a23acf3 | 464 | const void *preg; |
cf44bbc2 DM |
465 | |
466 | if (!parent) | |
467 | return; | |
468 | ||
469 | p_op = to_of_device(parent); | |
470 | bus = of_match_bus(p_op->node); | |
471 | bus->count_cells(op->node, &na, &ns); | |
472 | ||
473 | preg = of_get_property(op->node, bus->addr_prop_name, &num_reg); | |
474 | if (!preg || num_reg == 0) | |
475 | return; | |
476 | ||
477 | /* Convert to num-cells. */ | |
478 | num_reg /= 4; | |
479 | ||
46ba6d7d | 480 | /* Convert to num-entries. */ |
cf44bbc2 DM |
481 | num_reg /= na + ns; |
482 | ||
e5dd42e4 | 483 | /* Prevent overrunning the op->resources[] array. */ |
46ba6d7d DM |
484 | if (num_reg > PROMREG_MAX) { |
485 | printk(KERN_WARNING "%s: Too many regs (%d), " | |
486 | "limiting to %d.\n", | |
487 | op->node->full_name, num_reg, PROMREG_MAX); | |
488 | num_reg = PROMREG_MAX; | |
489 | } | |
490 | ||
cf44bbc2 DM |
491 | for (index = 0; index < num_reg; index++) { |
492 | struct resource *r = &op->resource[index]; | |
493 | u32 addr[OF_MAX_ADDR_CELLS]; | |
6a23acf3 | 494 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
cf44bbc2 DM |
495 | struct device_node *dp = op->node; |
496 | struct device_node *pp = p_op->node; | |
b85cdd49 | 497 | struct of_bus *pbus, *dbus; |
cf44bbc2 DM |
498 | u64 size, result = OF_BAD_ADDR; |
499 | unsigned long flags; | |
500 | int dna, dns; | |
501 | int pna, pns; | |
502 | ||
503 | size = of_read_addr(reg + na, ns); | |
504 | flags = bus->get_flags(reg); | |
505 | ||
506 | memcpy(addr, reg, na * 4); | |
507 | ||
a83f9823 | 508 | if (use_1to1_mapping(pp)) { |
cf44bbc2 DM |
509 | result = of_read_addr(addr, na); |
510 | goto build_res; | |
511 | } | |
512 | ||
513 | dna = na; | |
514 | dns = ns; | |
b85cdd49 | 515 | dbus = bus; |
cf44bbc2 DM |
516 | |
517 | while (1) { | |
518 | dp = pp; | |
519 | pp = dp->parent; | |
520 | if (!pp) { | |
521 | result = of_read_addr(addr, dna); | |
522 | break; | |
523 | } | |
524 | ||
525 | pbus = of_match_bus(pp); | |
526 | pbus->count_cells(dp, &pna, &pns); | |
527 | ||
b85cdd49 | 528 | if (build_one_resource(dp, dbus, pbus, addr, |
a83f9823 | 529 | dna, dns, pna)) |
cf44bbc2 DM |
530 | break; |
531 | ||
532 | dna = pna; | |
533 | dns = pns; | |
b85cdd49 | 534 | dbus = pbus; |
cf44bbc2 DM |
535 | } |
536 | ||
537 | build_res: | |
538 | memset(r, 0, sizeof(*r)); | |
a83f9823 DM |
539 | |
540 | if (of_resource_verbose) | |
541 | printk("%s reg[%d] -> %lx\n", | |
542 | op->node->full_name, index, | |
543 | result); | |
544 | ||
cf44bbc2 | 545 | if (result != OF_BAD_ADDR) { |
1815aed5 DM |
546 | if (tlb_type == hypervisor) |
547 | result &= 0x0fffffffffffffffUL; | |
548 | ||
cf44bbc2 DM |
549 | r->start = result; |
550 | r->end = result + size - 1; | |
551 | r->flags = flags; | |
cf44bbc2 DM |
552 | } |
553 | r->name = op->node->name; | |
554 | } | |
555 | } | |
556 | ||
2b1e5978 DM |
557 | static struct device_node * __init |
558 | apply_interrupt_map(struct device_node *dp, struct device_node *pp, | |
6a23acf3 | 559 | const u32 *imap, int imlen, const u32 *imask, |
2b1e5978 DM |
560 | unsigned int *irq_p) |
561 | { | |
562 | struct device_node *cp; | |
563 | unsigned int irq = *irq_p; | |
564 | struct of_bus *bus; | |
565 | phandle handle; | |
6a23acf3 | 566 | const u32 *reg; |
2b1e5978 DM |
567 | int na, num_reg, i; |
568 | ||
569 | bus = of_match_bus(pp); | |
570 | bus->count_cells(dp, &na, NULL); | |
571 | ||
572 | reg = of_get_property(dp, "reg", &num_reg); | |
573 | if (!reg || !num_reg) | |
574 | return NULL; | |
575 | ||
576 | imlen /= ((na + 3) * 4); | |
577 | handle = 0; | |
578 | for (i = 0; i < imlen; i++) { | |
579 | int j; | |
580 | ||
581 | for (j = 0; j < na; j++) { | |
582 | if ((reg[j] & imask[j]) != imap[j]) | |
583 | goto next; | |
584 | } | |
585 | if (imap[na] == irq) { | |
586 | handle = imap[na + 1]; | |
587 | irq = imap[na + 2]; | |
588 | break; | |
589 | } | |
590 | ||
591 | next: | |
592 | imap += (na + 3); | |
593 | } | |
46ba6d7d DM |
594 | if (i == imlen) { |
595 | /* Psycho and Sabre PCI controllers can have 'interrupt-map' | |
596 | * properties that do not include the on-board device | |
597 | * interrupts. Instead, the device's 'interrupts' property | |
598 | * is already a fully specified INO value. | |
599 | * | |
600 | * Handle this by deciding that, if we didn't get a | |
601 | * match in the parent's 'interrupt-map', and the | |
602 | * parent is an IRQ translater, then use the parent as | |
603 | * our IRQ controller. | |
604 | */ | |
605 | if (pp->irq_trans) | |
606 | return pp; | |
607 | ||
2b1e5978 | 608 | return NULL; |
46ba6d7d | 609 | } |
2b1e5978 DM |
610 | |
611 | *irq_p = irq; | |
612 | cp = of_find_node_by_phandle(handle); | |
613 | ||
614 | return cp; | |
615 | } | |
616 | ||
617 | static unsigned int __init pci_irq_swizzle(struct device_node *dp, | |
618 | struct device_node *pp, | |
619 | unsigned int irq) | |
620 | { | |
6a23acf3 | 621 | const struct linux_prom_pci_registers *regs; |
bb4c18cb | 622 | unsigned int bus, devfn, slot, ret; |
2b1e5978 DM |
623 | |
624 | if (irq < 1 || irq > 4) | |
625 | return irq; | |
626 | ||
627 | regs = of_get_property(dp, "reg", NULL); | |
628 | if (!regs) | |
629 | return irq; | |
630 | ||
bb4c18cb | 631 | bus = (regs->phys_hi >> 16) & 0xff; |
2b1e5978 DM |
632 | devfn = (regs->phys_hi >> 8) & 0xff; |
633 | slot = (devfn >> 3) & 0x1f; | |
634 | ||
bb4c18cb DM |
635 | if (pp->irq_trans) { |
636 | /* Derived from Table 8-3, U2P User's Manual. This branch | |
637 | * is handling a PCI controller that lacks a proper set of | |
638 | * interrupt-map and interrupt-map-mask properties. The | |
639 | * Ultra-E450 is one example. | |
640 | * | |
641 | * The bit layout is BSSLL, where: | |
642 | * B: 0 on bus A, 1 on bus B | |
643 | * D: 2-bit slot number, derived from PCI device number as | |
644 | * (dev - 1) for bus A, or (dev - 2) for bus B | |
645 | * L: 2-bit line number | |
bb4c18cb DM |
646 | */ |
647 | if (bus & 0x80) { | |
648 | /* PBM-A */ | |
649 | bus = 0x00; | |
650 | slot = (slot - 1) << 2; | |
651 | } else { | |
652 | /* PBM-B */ | |
653 | bus = 0x10; | |
654 | slot = (slot - 2) << 2; | |
655 | } | |
656 | irq -= 1; | |
657 | ||
658 | ret = (bus | slot | irq); | |
659 | } else { | |
660 | /* Going through a PCI-PCI bridge that lacks a set of | |
661 | * interrupt-map and interrupt-map-mask properties. | |
662 | */ | |
663 | ret = ((irq - 1 + (slot & 3)) & 3) + 1; | |
664 | } | |
2b1e5978 DM |
665 | |
666 | return ret; | |
667 | } | |
668 | ||
a83f9823 DM |
669 | static int of_irq_verbose; |
670 | ||
2b1e5978 DM |
671 | static unsigned int __init build_one_device_irq(struct of_device *op, |
672 | struct device *parent, | |
673 | unsigned int irq) | |
674 | { | |
675 | struct device_node *dp = op->node; | |
676 | struct device_node *pp, *ip; | |
677 | unsigned int orig_irq = irq; | |
c1b1a5f1 | 678 | int nid; |
2b1e5978 DM |
679 | |
680 | if (irq == 0xffffffff) | |
681 | return irq; | |
682 | ||
683 | if (dp->irq_trans) { | |
684 | irq = dp->irq_trans->irq_build(dp, irq, | |
685 | dp->irq_trans->data); | |
a83f9823 DM |
686 | |
687 | if (of_irq_verbose) | |
688 | printk("%s: direct translate %x --> %x\n", | |
689 | dp->full_name, orig_irq, irq); | |
690 | ||
c1b1a5f1 | 691 | goto out; |
2b1e5978 DM |
692 | } |
693 | ||
694 | /* Something more complicated. Walk up to the root, applying | |
695 | * interrupt-map or bus specific translations, until we hit | |
696 | * an IRQ translator. | |
697 | * | |
698 | * If we hit a bus type or situation we cannot handle, we | |
699 | * stop and assume that the original IRQ number was in a | |
700 | * format which has special meaning to it's immediate parent. | |
701 | */ | |
702 | pp = dp->parent; | |
703 | ip = NULL; | |
704 | while (pp) { | |
6a23acf3 | 705 | const void *imap, *imsk; |
2b1e5978 DM |
706 | int imlen; |
707 | ||
708 | imap = of_get_property(pp, "interrupt-map", &imlen); | |
709 | imsk = of_get_property(pp, "interrupt-map-mask", NULL); | |
710 | if (imap && imsk) { | |
711 | struct device_node *iret; | |
712 | int this_orig_irq = irq; | |
713 | ||
714 | iret = apply_interrupt_map(dp, pp, | |
715 | imap, imlen, imsk, | |
716 | &irq); | |
a83f9823 DM |
717 | |
718 | if (of_irq_verbose) | |
719 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", | |
720 | op->node->full_name, | |
721 | pp->full_name, this_orig_irq, | |
722 | (iret ? iret->full_name : "NULL"), irq); | |
723 | ||
2b1e5978 DM |
724 | if (!iret) |
725 | break; | |
726 | ||
727 | if (iret->irq_trans) { | |
728 | ip = iret; | |
729 | break; | |
730 | } | |
731 | } else { | |
732 | if (!strcmp(pp->type, "pci") || | |
733 | !strcmp(pp->type, "pciex")) { | |
734 | unsigned int this_orig_irq = irq; | |
735 | ||
736 | irq = pci_irq_swizzle(dp, pp, irq); | |
a83f9823 DM |
737 | if (of_irq_verbose) |
738 | printk("%s: PCI swizzle [%s] " | |
739 | "%x --> %x\n", | |
740 | op->node->full_name, | |
741 | pp->full_name, this_orig_irq, | |
742 | irq); | |
743 | ||
2b1e5978 DM |
744 | } |
745 | ||
746 | if (pp->irq_trans) { | |
747 | ip = pp; | |
748 | break; | |
749 | } | |
750 | } | |
751 | dp = pp; | |
752 | pp = pp->parent; | |
753 | } | |
754 | if (!ip) | |
755 | return orig_irq; | |
756 | ||
757 | irq = ip->irq_trans->irq_build(op->node, irq, | |
758 | ip->irq_trans->data); | |
a83f9823 DM |
759 | if (of_irq_verbose) |
760 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", | |
761 | op->node->full_name, ip->full_name, orig_irq, irq); | |
2b1e5978 | 762 | |
c1b1a5f1 DM |
763 | out: |
764 | nid = of_node_to_nid(dp); | |
765 | if (nid != -1) { | |
766 | cpumask_t numa_mask = node_to_cpumask(nid); | |
767 | ||
768 | irq_set_affinity(irq, numa_mask); | |
769 | } | |
770 | ||
2b1e5978 DM |
771 | return irq; |
772 | } | |
773 | ||
cf44bbc2 DM |
774 | static struct of_device * __init scan_one_device(struct device_node *dp, |
775 | struct device *parent) | |
776 | { | |
777 | struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL); | |
6a23acf3 | 778 | const unsigned int *irq; |
3d6e4702 | 779 | struct dev_archdata *sd; |
2b1e5978 | 780 | int len, i; |
cf44bbc2 DM |
781 | |
782 | if (!op) | |
783 | return NULL; | |
784 | ||
3d6e4702 DM |
785 | sd = &op->dev.archdata; |
786 | sd->prom_node = dp; | |
787 | sd->op = op; | |
788 | ||
cf44bbc2 DM |
789 | op->node = dp; |
790 | ||
791 | op->clock_freq = of_getintprop_default(dp, "clock-frequency", | |
792 | (25*1000*1000)); | |
793 | op->portid = of_getintprop_default(dp, "upa-portid", -1); | |
794 | if (op->portid == -1) | |
795 | op->portid = of_getintprop_default(dp, "portid", -1); | |
796 | ||
797 | irq = of_get_property(dp, "interrupts", &len); | |
2b1e5978 DM |
798 | if (irq) { |
799 | memcpy(op->irqs, irq, len); | |
800 | op->num_irqs = len / 4; | |
801 | } else { | |
802 | op->num_irqs = 0; | |
803 | } | |
cf44bbc2 | 804 | |
e5dd42e4 | 805 | /* Prevent overrunning the op->irqs[] array. */ |
46ba6d7d DM |
806 | if (op->num_irqs > PROMINTR_MAX) { |
807 | printk(KERN_WARNING "%s: Too many irqs (%d), " | |
808 | "limiting to %d.\n", | |
809 | dp->full_name, op->num_irqs, PROMINTR_MAX); | |
810 | op->num_irqs = PROMINTR_MAX; | |
811 | } | |
812 | ||
cf44bbc2 | 813 | build_device_resources(op, parent); |
2b1e5978 DM |
814 | for (i = 0; i < op->num_irqs; i++) |
815 | op->irqs[i] = build_one_device_irq(op, parent, op->irqs[i]); | |
cf44bbc2 DM |
816 | |
817 | op->dev.parent = parent; | |
37b7754a | 818 | op->dev.bus = &of_platform_bus_type; |
cf44bbc2 | 819 | if (!parent) |
2222c313 | 820 | dev_set_name(&op->dev, "root"); |
cf44bbc2 | 821 | else |
2222c313 | 822 | dev_set_name(&op->dev, "%08x", dp->node); |
cf44bbc2 DM |
823 | |
824 | if (of_device_register(op)) { | |
825 | printk("%s: Could not register of device.\n", | |
826 | dp->full_name); | |
827 | kfree(op); | |
828 | op = NULL; | |
829 | } | |
830 | ||
831 | return op; | |
832 | } | |
833 | ||
834 | static void __init scan_tree(struct device_node *dp, struct device *parent) | |
835 | { | |
836 | while (dp) { | |
837 | struct of_device *op = scan_one_device(dp, parent); | |
838 | ||
839 | if (op) | |
840 | scan_tree(dp->child, &op->dev); | |
841 | ||
842 | dp = dp->sibling; | |
843 | } | |
844 | } | |
845 | ||
846 | static void __init scan_of_devices(void) | |
847 | { | |
848 | struct device_node *root = of_find_node_by_path("/"); | |
849 | struct of_device *parent; | |
850 | ||
851 | parent = scan_one_device(root, NULL); | |
852 | if (!parent) | |
853 | return; | |
854 | ||
855 | scan_tree(root->child, &parent->dev); | |
856 | } | |
857 | ||
a2bd4fd1 DM |
858 | static int __init of_bus_driver_init(void) |
859 | { | |
cf44bbc2 | 860 | int err; |
a2bd4fd1 | 861 | |
3f23de10 | 862 | err = of_bus_type_init(&of_platform_bus_type, "of"); |
cf44bbc2 DM |
863 | if (!err) |
864 | scan_of_devices(); | |
865 | ||
866 | return err; | |
a2bd4fd1 DM |
867 | } |
868 | ||
869 | postcore_initcall(of_bus_driver_init); | |
870 | ||
a83f9823 DM |
871 | static int __init of_debug(char *str) |
872 | { | |
873 | int val = 0; | |
874 | ||
875 | get_option(&str, &val); | |
876 | if (val & 1) | |
877 | of_resource_verbose = 1; | |
878 | if (val & 2) | |
879 | of_irq_verbose = 1; | |
880 | return 1; | |
881 | } | |
882 | ||
883 | __setup("of_debug=", of_debug); |