Commit | Line | Data |
---|---|---|
372b07bb DM |
1 | /* |
2 | * Procedures for creating, accessing and interpreting the device tree. | |
3 | * | |
4 | * Paul Mackerras August 1996. | |
5 | * Copyright (C) 1996-2005 Paul Mackerras. | |
6 | * | |
7 | * Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner. | |
8 | * {engebret|bergner}@us.ibm.com | |
9 | * | |
10 | * Adapted for sparc64 by David S. Miller davem@davemloft.net | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/types.h> | |
20 | #include <linux/string.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/bootmem.h> | |
de8d28b1 | 23 | #include <linux/module.h> |
372b07bb DM |
24 | |
25 | #include <asm/prom.h> | |
2b1e5978 | 26 | #include <asm/of_device.h> |
372b07bb | 27 | #include <asm/oplib.h> |
2b1e5978 DM |
28 | #include <asm/irq.h> |
29 | #include <asm/asi.h> | |
30 | #include <asm/upa.h> | |
5cbc3073 | 31 | #include <asm/smp.h> |
372b07bb DM |
32 | |
33 | static struct device_node *allnodes; | |
34 | ||
fb7cd9d9 DM |
35 | /* use when traversing tree through the allnext, child, sibling, |
36 | * or parent members of struct device_node. | |
37 | */ | |
38 | static DEFINE_RWLOCK(devtree_lock); | |
39 | ||
3dfe10ee SR |
40 | int of_device_is_compatible(const struct device_node *device, |
41 | const char *compat) | |
8cd24ed4 DM |
42 | { |
43 | const char* cp; | |
44 | int cplen, l; | |
45 | ||
3dfe10ee | 46 | cp = of_get_property(device, "compatible", &cplen); |
8cd24ed4 DM |
47 | if (cp == NULL) |
48 | return 0; | |
49 | while (cplen > 0) { | |
50 | if (strncmp(cp, compat, strlen(compat)) == 0) | |
51 | return 1; | |
52 | l = strlen(cp) + 1; | |
53 | cp += l; | |
54 | cplen -= l; | |
55 | } | |
56 | ||
57 | return 0; | |
58 | } | |
59 | EXPORT_SYMBOL(of_device_is_compatible); | |
60 | ||
372b07bb DM |
61 | struct device_node *of_get_parent(const struct device_node *node) |
62 | { | |
63 | struct device_node *np; | |
64 | ||
65 | if (!node) | |
66 | return NULL; | |
67 | ||
68 | np = node->parent; | |
69 | ||
70 | return np; | |
71 | } | |
8cd24ed4 | 72 | EXPORT_SYMBOL(of_get_parent); |
372b07bb DM |
73 | |
74 | struct device_node *of_get_next_child(const struct device_node *node, | |
75 | struct device_node *prev) | |
76 | { | |
77 | struct device_node *next; | |
78 | ||
79 | next = prev ? prev->sibling : node->child; | |
80 | for (; next != 0; next = next->sibling) { | |
81 | break; | |
82 | } | |
83 | ||
84 | return next; | |
85 | } | |
8cd24ed4 | 86 | EXPORT_SYMBOL(of_get_next_child); |
372b07bb DM |
87 | |
88 | struct device_node *of_find_node_by_path(const char *path) | |
89 | { | |
90 | struct device_node *np = allnodes; | |
91 | ||
92 | for (; np != 0; np = np->allnext) { | |
93 | if (np->full_name != 0 && strcmp(np->full_name, path) == 0) | |
94 | break; | |
95 | } | |
96 | ||
97 | return np; | |
98 | } | |
690c8fd3 | 99 | EXPORT_SYMBOL(of_find_node_by_path); |
372b07bb | 100 | |
de8d28b1 DM |
101 | struct device_node *of_find_node_by_phandle(phandle handle) |
102 | { | |
103 | struct device_node *np; | |
104 | ||
105 | for (np = allnodes; np != 0; np = np->allnext) | |
106 | if (np->node == handle) | |
107 | break; | |
108 | ||
109 | return np; | |
110 | } | |
8cd24ed4 | 111 | EXPORT_SYMBOL(of_find_node_by_phandle); |
de8d28b1 | 112 | |
aaf7cec2 DM |
113 | struct device_node *of_find_node_by_name(struct device_node *from, |
114 | const char *name) | |
115 | { | |
116 | struct device_node *np; | |
117 | ||
118 | np = from ? from->allnext : allnodes; | |
119 | for (; np != NULL; np = np->allnext) | |
120 | if (np->name != NULL && strcmp(np->name, name) == 0) | |
121 | break; | |
122 | ||
123 | return np; | |
124 | } | |
8cd24ed4 | 125 | EXPORT_SYMBOL(of_find_node_by_name); |
aaf7cec2 DM |
126 | |
127 | struct device_node *of_find_node_by_type(struct device_node *from, | |
128 | const char *type) | |
129 | { | |
130 | struct device_node *np; | |
131 | ||
132 | np = from ? from->allnext : allnodes; | |
133 | for (; np != 0; np = np->allnext) | |
134 | if (np->type != 0 && strcmp(np->type, type) == 0) | |
135 | break; | |
136 | ||
137 | return np; | |
138 | } | |
8cd24ed4 DM |
139 | EXPORT_SYMBOL(of_find_node_by_type); |
140 | ||
141 | struct device_node *of_find_compatible_node(struct device_node *from, | |
142 | const char *type, const char *compatible) | |
143 | { | |
144 | struct device_node *np; | |
145 | ||
146 | np = from ? from->allnext : allnodes; | |
147 | for (; np != 0; np = np->allnext) { | |
148 | if (type != NULL | |
149 | && !(np->type != 0 && strcmp(np->type, type) == 0)) | |
150 | continue; | |
151 | if (of_device_is_compatible(np, compatible)) | |
152 | break; | |
153 | } | |
154 | ||
155 | return np; | |
156 | } | |
157 | EXPORT_SYMBOL(of_find_compatible_node); | |
aaf7cec2 | 158 | |
3dfe10ee SR |
159 | struct property *of_find_property(const struct device_node *np, |
160 | const char *name, | |
372b07bb DM |
161 | int *lenp) |
162 | { | |
163 | struct property *pp; | |
164 | ||
165 | for (pp = np->properties; pp != 0; pp = pp->next) { | |
a8b8814b | 166 | if (strcasecmp(pp->name, name) == 0) { |
372b07bb DM |
167 | if (lenp != 0) |
168 | *lenp = pp->length; | |
169 | break; | |
170 | } | |
171 | } | |
172 | return pp; | |
173 | } | |
de8d28b1 DM |
174 | EXPORT_SYMBOL(of_find_property); |
175 | ||
176 | /* | |
177 | * Find a property with a given name for a given node | |
178 | * and return the value. | |
179 | */ | |
3dfe10ee SR |
180 | const void *of_get_property(const struct device_node *np, const char *name, |
181 | int *lenp) | |
de8d28b1 DM |
182 | { |
183 | struct property *pp = of_find_property(np,name,lenp); | |
184 | return pp ? pp->value : NULL; | |
185 | } | |
186 | EXPORT_SYMBOL(of_get_property); | |
372b07bb | 187 | |
6d307724 DM |
188 | int of_getintprop_default(struct device_node *np, const char *name, int def) |
189 | { | |
190 | struct property *prop; | |
191 | int len; | |
192 | ||
193 | prop = of_find_property(np, name, &len); | |
194 | if (!prop || len != 4) | |
195 | return def; | |
196 | ||
197 | return *(int *) prop->value; | |
198 | } | |
de8d28b1 | 199 | EXPORT_SYMBOL(of_getintprop_default); |
6d307724 | 200 | |
3ae9a348 DM |
201 | int of_n_addr_cells(struct device_node *np) |
202 | { | |
6a23acf3 | 203 | const int* ip; |
3ae9a348 DM |
204 | do { |
205 | if (np->parent) | |
206 | np = np->parent; | |
207 | ip = of_get_property(np, "#address-cells", NULL); | |
208 | if (ip != NULL) | |
209 | return *ip; | |
210 | } while (np->parent); | |
211 | /* No #address-cells property for the root node, default to 2 */ | |
212 | return 2; | |
213 | } | |
214 | EXPORT_SYMBOL(of_n_addr_cells); | |
215 | ||
216 | int of_n_size_cells(struct device_node *np) | |
217 | { | |
6a23acf3 | 218 | const int* ip; |
3ae9a348 DM |
219 | do { |
220 | if (np->parent) | |
221 | np = np->parent; | |
222 | ip = of_get_property(np, "#size-cells", NULL); | |
223 | if (ip != NULL) | |
224 | return *ip; | |
225 | } while (np->parent); | |
226 | /* No #size-cells property for the root node, default to 1 */ | |
227 | return 1; | |
228 | } | |
229 | EXPORT_SYMBOL(of_n_size_cells); | |
230 | ||
fb7cd9d9 DM |
231 | int of_set_property(struct device_node *dp, const char *name, void *val, int len) |
232 | { | |
233 | struct property **prevp; | |
234 | void *new_val; | |
235 | int err; | |
236 | ||
237 | new_val = kmalloc(len, GFP_KERNEL); | |
238 | if (!new_val) | |
239 | return -ENOMEM; | |
240 | ||
241 | memcpy(new_val, val, len); | |
242 | ||
243 | err = -ENODEV; | |
244 | ||
245 | write_lock(&devtree_lock); | |
246 | prevp = &dp->properties; | |
247 | while (*prevp) { | |
248 | struct property *prop = *prevp; | |
249 | ||
a8b8814b | 250 | if (!strcasecmp(prop->name, name)) { |
fb7cd9d9 DM |
251 | void *old_val = prop->value; |
252 | int ret; | |
253 | ||
254 | ret = prom_setprop(dp->node, name, val, len); | |
255 | err = -EINVAL; | |
256 | if (ret >= 0) { | |
257 | prop->value = new_val; | |
258 | prop->length = len; | |
259 | ||
260 | if (OF_IS_DYNAMIC(prop)) | |
261 | kfree(old_val); | |
262 | ||
263 | OF_MARK_DYNAMIC(prop); | |
264 | ||
265 | err = 0; | |
266 | } | |
267 | break; | |
268 | } | |
269 | prevp = &(*prevp)->next; | |
270 | } | |
271 | write_unlock(&devtree_lock); | |
272 | ||
273 | /* XXX Upate procfs if necessary... */ | |
274 | ||
275 | return err; | |
276 | } | |
277 | EXPORT_SYMBOL(of_set_property); | |
278 | ||
372b07bb DM |
279 | static unsigned int prom_early_allocated; |
280 | ||
281 | static void * __init prom_early_alloc(unsigned long size) | |
282 | { | |
283 | void *ret; | |
284 | ||
285 | ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL); | |
286 | if (ret != NULL) | |
287 | memset(ret, 0, size); | |
288 | ||
289 | prom_early_allocated += size; | |
290 | ||
291 | return ret; | |
292 | } | |
293 | ||
2b1e5978 DM |
294 | #ifdef CONFIG_PCI |
295 | /* PSYCHO interrupt mapping support. */ | |
296 | #define PSYCHO_IMAP_A_SLOT0 0x0c00UL | |
297 | #define PSYCHO_IMAP_B_SLOT0 0x0c20UL | |
298 | static unsigned long psycho_pcislot_imap_offset(unsigned long ino) | |
299 | { | |
300 | unsigned int bus = (ino & 0x10) >> 4; | |
301 | unsigned int slot = (ino & 0x0c) >> 2; | |
302 | ||
303 | if (bus == 0) | |
304 | return PSYCHO_IMAP_A_SLOT0 + (slot * 8); | |
305 | else | |
306 | return PSYCHO_IMAP_B_SLOT0 + (slot * 8); | |
307 | } | |
308 | ||
309 | #define PSYCHO_IMAP_SCSI 0x1000UL | |
310 | #define PSYCHO_IMAP_ETH 0x1008UL | |
311 | #define PSYCHO_IMAP_BPP 0x1010UL | |
312 | #define PSYCHO_IMAP_AU_REC 0x1018UL | |
313 | #define PSYCHO_IMAP_AU_PLAY 0x1020UL | |
314 | #define PSYCHO_IMAP_PFAIL 0x1028UL | |
315 | #define PSYCHO_IMAP_KMS 0x1030UL | |
316 | #define PSYCHO_IMAP_FLPY 0x1038UL | |
317 | #define PSYCHO_IMAP_SHW 0x1040UL | |
318 | #define PSYCHO_IMAP_KBD 0x1048UL | |
319 | #define PSYCHO_IMAP_MS 0x1050UL | |
320 | #define PSYCHO_IMAP_SER 0x1058UL | |
321 | #define PSYCHO_IMAP_TIM0 0x1060UL | |
322 | #define PSYCHO_IMAP_TIM1 0x1068UL | |
323 | #define PSYCHO_IMAP_UE 0x1070UL | |
324 | #define PSYCHO_IMAP_CE 0x1078UL | |
325 | #define PSYCHO_IMAP_A_ERR 0x1080UL | |
326 | #define PSYCHO_IMAP_B_ERR 0x1088UL | |
327 | #define PSYCHO_IMAP_PMGMT 0x1090UL | |
328 | #define PSYCHO_IMAP_GFX 0x1098UL | |
329 | #define PSYCHO_IMAP_EUPA 0x10a0UL | |
330 | ||
331 | static unsigned long __psycho_onboard_imap_off[] = { | |
332 | /*0x20*/ PSYCHO_IMAP_SCSI, | |
333 | /*0x21*/ PSYCHO_IMAP_ETH, | |
334 | /*0x22*/ PSYCHO_IMAP_BPP, | |
335 | /*0x23*/ PSYCHO_IMAP_AU_REC, | |
336 | /*0x24*/ PSYCHO_IMAP_AU_PLAY, | |
337 | /*0x25*/ PSYCHO_IMAP_PFAIL, | |
338 | /*0x26*/ PSYCHO_IMAP_KMS, | |
339 | /*0x27*/ PSYCHO_IMAP_FLPY, | |
340 | /*0x28*/ PSYCHO_IMAP_SHW, | |
341 | /*0x29*/ PSYCHO_IMAP_KBD, | |
342 | /*0x2a*/ PSYCHO_IMAP_MS, | |
343 | /*0x2b*/ PSYCHO_IMAP_SER, | |
344 | /*0x2c*/ PSYCHO_IMAP_TIM0, | |
345 | /*0x2d*/ PSYCHO_IMAP_TIM1, | |
346 | /*0x2e*/ PSYCHO_IMAP_UE, | |
347 | /*0x2f*/ PSYCHO_IMAP_CE, | |
348 | /*0x30*/ PSYCHO_IMAP_A_ERR, | |
349 | /*0x31*/ PSYCHO_IMAP_B_ERR, | |
46ba6d7d DM |
350 | /*0x32*/ PSYCHO_IMAP_PMGMT, |
351 | /*0x33*/ PSYCHO_IMAP_GFX, | |
352 | /*0x34*/ PSYCHO_IMAP_EUPA, | |
2b1e5978 DM |
353 | }; |
354 | #define PSYCHO_ONBOARD_IRQ_BASE 0x20 | |
46ba6d7d | 355 | #define PSYCHO_ONBOARD_IRQ_LAST 0x34 |
2b1e5978 DM |
356 | #define psycho_onboard_imap_offset(__ino) \ |
357 | __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE] | |
358 | ||
359 | #define PSYCHO_ICLR_A_SLOT0 0x1400UL | |
360 | #define PSYCHO_ICLR_SCSI 0x1800UL | |
361 | ||
362 | #define psycho_iclr_offset(ino) \ | |
363 | ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ | |
364 | (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3))) | |
365 | ||
366 | static unsigned int psycho_irq_build(struct device_node *dp, | |
367 | unsigned int ino, | |
368 | void *_data) | |
369 | { | |
370 | unsigned long controller_regs = (unsigned long) _data; | |
371 | unsigned long imap, iclr; | |
372 | unsigned long imap_off, iclr_off; | |
373 | int inofixup = 0; | |
374 | ||
375 | ino &= 0x3f; | |
376 | if (ino < PSYCHO_ONBOARD_IRQ_BASE) { | |
377 | /* PCI slot */ | |
378 | imap_off = psycho_pcislot_imap_offset(ino); | |
379 | } else { | |
380 | /* Onboard device */ | |
381 | if (ino > PSYCHO_ONBOARD_IRQ_LAST) { | |
382 | prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino); | |
383 | prom_halt(); | |
384 | } | |
385 | imap_off = psycho_onboard_imap_offset(ino); | |
386 | } | |
387 | ||
388 | /* Now build the IRQ bucket. */ | |
389 | imap = controller_regs + imap_off; | |
2b1e5978 DM |
390 | |
391 | iclr_off = psycho_iclr_offset(ino); | |
392 | iclr = controller_regs + iclr_off; | |
2b1e5978 DM |
393 | |
394 | if ((ino & 0x20) == 0) | |
395 | inofixup = ino & 0x03; | |
396 | ||
397 | return build_irq(inofixup, iclr, imap); | |
398 | } | |
399 | ||
c35a376d | 400 | static void __init psycho_irq_trans_init(struct device_node *dp) |
2b1e5978 | 401 | { |
6a23acf3 | 402 | const struct linux_prom64_registers *regs; |
2b1e5978 DM |
403 | |
404 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
405 | dp->irq_trans->irq_build = psycho_irq_build; | |
406 | ||
407 | regs = of_get_property(dp, "reg", NULL); | |
408 | dp->irq_trans->data = (void *) regs[2].phys_addr; | |
409 | } | |
410 | ||
411 | #define sabre_read(__reg) \ | |
412 | ({ u64 __ret; \ | |
413 | __asm__ __volatile__("ldxa [%1] %2, %0" \ | |
414 | : "=r" (__ret) \ | |
415 | : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \ | |
416 | : "memory"); \ | |
417 | __ret; \ | |
418 | }) | |
419 | ||
420 | struct sabre_irq_data { | |
421 | unsigned long controller_regs; | |
422 | unsigned int pci_first_busno; | |
423 | }; | |
424 | #define SABRE_CONFIGSPACE 0x001000000UL | |
425 | #define SABRE_WRSYNC 0x1c20UL | |
426 | ||
427 | #define SABRE_CONFIG_BASE(CONFIG_SPACE) \ | |
428 | (CONFIG_SPACE | (1UL << 24)) | |
429 | #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \ | |
430 | (((unsigned long)(BUS) << 16) | \ | |
431 | ((unsigned long)(DEVFN) << 8) | \ | |
432 | ((unsigned long)(REG))) | |
433 | ||
434 | /* When a device lives behind a bridge deeper in the PCI bus topology | |
435 | * than APB, a special sequence must run to make sure all pending DMA | |
436 | * transfers at the time of IRQ delivery are visible in the coherency | |
437 | * domain by the cpu. This sequence is to perform a read on the far | |
438 | * side of the non-APB bridge, then perform a read of Sabre's DMA | |
439 | * write-sync register. | |
440 | */ | |
441 | static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2) | |
442 | { | |
443 | unsigned int phys_hi = (unsigned int) (unsigned long) _arg1; | |
444 | struct sabre_irq_data *irq_data = _arg2; | |
445 | unsigned long controller_regs = irq_data->controller_regs; | |
446 | unsigned long sync_reg = controller_regs + SABRE_WRSYNC; | |
447 | unsigned long config_space = controller_regs + SABRE_CONFIGSPACE; | |
448 | unsigned int bus, devfn; | |
449 | u16 _unused; | |
450 | ||
451 | config_space = SABRE_CONFIG_BASE(config_space); | |
452 | ||
453 | bus = (phys_hi >> 16) & 0xff; | |
454 | devfn = (phys_hi >> 8) & 0xff; | |
455 | ||
456 | config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00); | |
457 | ||
458 | __asm__ __volatile__("membar #Sync\n\t" | |
459 | "lduha [%1] %2, %0\n\t" | |
460 | "membar #Sync" | |
461 | : "=r" (_unused) | |
462 | : "r" ((u16 *) config_space), | |
463 | "i" (ASI_PHYS_BYPASS_EC_E_L) | |
464 | : "memory"); | |
465 | ||
466 | sabre_read(sync_reg); | |
467 | } | |
468 | ||
469 | #define SABRE_IMAP_A_SLOT0 0x0c00UL | |
470 | #define SABRE_IMAP_B_SLOT0 0x0c20UL | |
471 | #define SABRE_IMAP_SCSI 0x1000UL | |
472 | #define SABRE_IMAP_ETH 0x1008UL | |
473 | #define SABRE_IMAP_BPP 0x1010UL | |
474 | #define SABRE_IMAP_AU_REC 0x1018UL | |
475 | #define SABRE_IMAP_AU_PLAY 0x1020UL | |
476 | #define SABRE_IMAP_PFAIL 0x1028UL | |
477 | #define SABRE_IMAP_KMS 0x1030UL | |
478 | #define SABRE_IMAP_FLPY 0x1038UL | |
479 | #define SABRE_IMAP_SHW 0x1040UL | |
480 | #define SABRE_IMAP_KBD 0x1048UL | |
481 | #define SABRE_IMAP_MS 0x1050UL | |
482 | #define SABRE_IMAP_SER 0x1058UL | |
483 | #define SABRE_IMAP_UE 0x1070UL | |
484 | #define SABRE_IMAP_CE 0x1078UL | |
485 | #define SABRE_IMAP_PCIERR 0x1080UL | |
486 | #define SABRE_IMAP_GFX 0x1098UL | |
487 | #define SABRE_IMAP_EUPA 0x10a0UL | |
488 | #define SABRE_ICLR_A_SLOT0 0x1400UL | |
489 | #define SABRE_ICLR_B_SLOT0 0x1480UL | |
490 | #define SABRE_ICLR_SCSI 0x1800UL | |
491 | #define SABRE_ICLR_ETH 0x1808UL | |
492 | #define SABRE_ICLR_BPP 0x1810UL | |
493 | #define SABRE_ICLR_AU_REC 0x1818UL | |
494 | #define SABRE_ICLR_AU_PLAY 0x1820UL | |
495 | #define SABRE_ICLR_PFAIL 0x1828UL | |
496 | #define SABRE_ICLR_KMS 0x1830UL | |
497 | #define SABRE_ICLR_FLPY 0x1838UL | |
498 | #define SABRE_ICLR_SHW 0x1840UL | |
499 | #define SABRE_ICLR_KBD 0x1848UL | |
500 | #define SABRE_ICLR_MS 0x1850UL | |
501 | #define SABRE_ICLR_SER 0x1858UL | |
502 | #define SABRE_ICLR_UE 0x1870UL | |
503 | #define SABRE_ICLR_CE 0x1878UL | |
504 | #define SABRE_ICLR_PCIERR 0x1880UL | |
505 | ||
506 | static unsigned long sabre_pcislot_imap_offset(unsigned long ino) | |
507 | { | |
508 | unsigned int bus = (ino & 0x10) >> 4; | |
509 | unsigned int slot = (ino & 0x0c) >> 2; | |
510 | ||
511 | if (bus == 0) | |
512 | return SABRE_IMAP_A_SLOT0 + (slot * 8); | |
513 | else | |
514 | return SABRE_IMAP_B_SLOT0 + (slot * 8); | |
515 | } | |
516 | ||
517 | static unsigned long __sabre_onboard_imap_off[] = { | |
518 | /*0x20*/ SABRE_IMAP_SCSI, | |
519 | /*0x21*/ SABRE_IMAP_ETH, | |
520 | /*0x22*/ SABRE_IMAP_BPP, | |
521 | /*0x23*/ SABRE_IMAP_AU_REC, | |
522 | /*0x24*/ SABRE_IMAP_AU_PLAY, | |
523 | /*0x25*/ SABRE_IMAP_PFAIL, | |
524 | /*0x26*/ SABRE_IMAP_KMS, | |
525 | /*0x27*/ SABRE_IMAP_FLPY, | |
526 | /*0x28*/ SABRE_IMAP_SHW, | |
527 | /*0x29*/ SABRE_IMAP_KBD, | |
528 | /*0x2a*/ SABRE_IMAP_MS, | |
529 | /*0x2b*/ SABRE_IMAP_SER, | |
530 | /*0x2c*/ 0 /* reserved */, | |
531 | /*0x2d*/ 0 /* reserved */, | |
532 | /*0x2e*/ SABRE_IMAP_UE, | |
533 | /*0x2f*/ SABRE_IMAP_CE, | |
534 | /*0x30*/ SABRE_IMAP_PCIERR, | |
46ba6d7d DM |
535 | /*0x31*/ 0 /* reserved */, |
536 | /*0x32*/ 0 /* reserved */, | |
537 | /*0x33*/ SABRE_IMAP_GFX, | |
538 | /*0x34*/ SABRE_IMAP_EUPA, | |
2b1e5978 DM |
539 | }; |
540 | #define SABRE_ONBOARD_IRQ_BASE 0x20 | |
541 | #define SABRE_ONBOARD_IRQ_LAST 0x30 | |
542 | #define sabre_onboard_imap_offset(__ino) \ | |
543 | __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE] | |
544 | ||
545 | #define sabre_iclr_offset(ino) \ | |
546 | ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \ | |
547 | (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3))) | |
548 | ||
9bbd952e | 549 | static int sabre_device_needs_wsync(struct device_node *dp) |
a23c3a86 | 550 | { |
9bbd952e | 551 | struct device_node *parent = dp->parent; |
6a23acf3 | 552 | const char *parent_model, *parent_compat; |
a23c3a86 | 553 | |
9bbd952e DM |
554 | /* This traversal up towards the root is meant to |
555 | * handle two cases: | |
556 | * | |
557 | * 1) non-PCI bus sitting under PCI, such as 'ebus' | |
558 | * 2) the PCI controller interrupts themselves, which | |
559 | * will use the sabre_irq_build but do not need | |
560 | * the DMA synchronization handling | |
561 | */ | |
562 | while (parent) { | |
563 | if (!strcmp(parent->type, "pci")) | |
564 | break; | |
565 | parent = parent->parent; | |
566 | } | |
567 | ||
568 | if (!parent) | |
569 | return 0; | |
570 | ||
571 | parent_model = of_get_property(parent, | |
572 | "model", NULL); | |
a23c3a86 DM |
573 | if (parent_model && |
574 | (!strcmp(parent_model, "SUNW,sabre") || | |
575 | !strcmp(parent_model, "SUNW,simba"))) | |
9bbd952e | 576 | return 0; |
a23c3a86 | 577 | |
9bbd952e DM |
578 | parent_compat = of_get_property(parent, |
579 | "compatible", NULL); | |
a23c3a86 DM |
580 | if (parent_compat && |
581 | (!strcmp(parent_compat, "pci108e,a000") || | |
582 | !strcmp(parent_compat, "pci108e,a001"))) | |
9bbd952e | 583 | return 0; |
a23c3a86 | 584 | |
9bbd952e | 585 | return 1; |
a23c3a86 DM |
586 | } |
587 | ||
2b1e5978 DM |
588 | static unsigned int sabre_irq_build(struct device_node *dp, |
589 | unsigned int ino, | |
590 | void *_data) | |
591 | { | |
592 | struct sabre_irq_data *irq_data = _data; | |
593 | unsigned long controller_regs = irq_data->controller_regs; | |
6a23acf3 | 594 | const struct linux_prom_pci_registers *regs; |
2b1e5978 DM |
595 | unsigned long imap, iclr; |
596 | unsigned long imap_off, iclr_off; | |
597 | int inofixup = 0; | |
598 | int virt_irq; | |
599 | ||
600 | ino &= 0x3f; | |
601 | if (ino < SABRE_ONBOARD_IRQ_BASE) { | |
602 | /* PCI slot */ | |
603 | imap_off = sabre_pcislot_imap_offset(ino); | |
604 | } else { | |
605 | /* onboard device */ | |
606 | if (ino > SABRE_ONBOARD_IRQ_LAST) { | |
607 | prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino); | |
608 | prom_halt(); | |
609 | } | |
610 | imap_off = sabre_onboard_imap_offset(ino); | |
611 | } | |
612 | ||
613 | /* Now build the IRQ bucket. */ | |
614 | imap = controller_regs + imap_off; | |
2b1e5978 DM |
615 | |
616 | iclr_off = sabre_iclr_offset(ino); | |
617 | iclr = controller_regs + iclr_off; | |
2b1e5978 DM |
618 | |
619 | if ((ino & 0x20) == 0) | |
620 | inofixup = ino & 0x03; | |
621 | ||
622 | virt_irq = build_irq(inofixup, iclr, imap); | |
623 | ||
a23c3a86 DM |
624 | /* If the parent device is a PCI<->PCI bridge other than |
625 | * APB, we have to install a pre-handler to ensure that | |
626 | * all pending DMA is drained before the interrupt handler | |
627 | * is run. | |
628 | */ | |
2b1e5978 | 629 | regs = of_get_property(dp, "reg", NULL); |
9bbd952e | 630 | if (regs && sabre_device_needs_wsync(dp)) { |
2b1e5978 DM |
631 | irq_install_pre_handler(virt_irq, |
632 | sabre_wsync_handler, | |
633 | (void *) (long) regs->phys_hi, | |
a23c3a86 | 634 | (void *) irq_data); |
2b1e5978 DM |
635 | } |
636 | ||
637 | return virt_irq; | |
638 | } | |
639 | ||
c35a376d | 640 | static void __init sabre_irq_trans_init(struct device_node *dp) |
2b1e5978 | 641 | { |
6a23acf3 | 642 | const struct linux_prom64_registers *regs; |
2b1e5978 | 643 | struct sabre_irq_data *irq_data; |
6a23acf3 | 644 | const u32 *busrange; |
2b1e5978 DM |
645 | |
646 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
647 | dp->irq_trans->irq_build = sabre_irq_build; | |
648 | ||
649 | irq_data = prom_early_alloc(sizeof(struct sabre_irq_data)); | |
650 | ||
651 | regs = of_get_property(dp, "reg", NULL); | |
652 | irq_data->controller_regs = regs[0].phys_addr; | |
653 | ||
654 | busrange = of_get_property(dp, "bus-range", NULL); | |
655 | irq_data->pci_first_busno = busrange[0]; | |
656 | ||
657 | dp->irq_trans->data = irq_data; | |
658 | } | |
659 | ||
660 | /* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the | |
661 | * imap/iclr registers are per-PBM. | |
662 | */ | |
663 | #define SCHIZO_IMAP_BASE 0x1000UL | |
664 | #define SCHIZO_ICLR_BASE 0x1400UL | |
665 | ||
666 | static unsigned long schizo_imap_offset(unsigned long ino) | |
667 | { | |
668 | return SCHIZO_IMAP_BASE + (ino * 8UL); | |
669 | } | |
670 | ||
671 | static unsigned long schizo_iclr_offset(unsigned long ino) | |
672 | { | |
673 | return SCHIZO_ICLR_BASE + (ino * 8UL); | |
674 | } | |
675 | ||
676 | static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs, | |
677 | unsigned int ino) | |
678 | { | |
861fe906 DM |
679 | |
680 | return pbm_regs + schizo_iclr_offset(ino); | |
2b1e5978 DM |
681 | } |
682 | ||
683 | static unsigned long schizo_ino_to_imap(unsigned long pbm_regs, | |
684 | unsigned int ino) | |
685 | { | |
861fe906 | 686 | return pbm_regs + schizo_imap_offset(ino); |
2b1e5978 DM |
687 | } |
688 | ||
689 | #define schizo_read(__reg) \ | |
690 | ({ u64 __ret; \ | |
691 | __asm__ __volatile__("ldxa [%1] %2, %0" \ | |
692 | : "=r" (__ret) \ | |
693 | : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \ | |
694 | : "memory"); \ | |
695 | __ret; \ | |
696 | }) | |
697 | #define schizo_write(__reg, __val) \ | |
698 | __asm__ __volatile__("stxa %0, [%1] %2" \ | |
699 | : /* no outputs */ \ | |
700 | : "r" (__val), "r" (__reg), \ | |
701 | "i" (ASI_PHYS_BYPASS_EC_E) \ | |
702 | : "memory") | |
703 | ||
704 | static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2) | |
705 | { | |
706 | unsigned long sync_reg = (unsigned long) _arg2; | |
707 | u64 mask = 1UL << (ino & IMAP_INO); | |
708 | u64 val; | |
709 | int limit; | |
710 | ||
711 | schizo_write(sync_reg, mask); | |
712 | ||
713 | limit = 100000; | |
714 | val = 0; | |
715 | while (--limit) { | |
716 | val = schizo_read(sync_reg); | |
717 | if (!(val & mask)) | |
718 | break; | |
719 | } | |
720 | if (limit <= 0) { | |
721 | printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n", | |
722 | val, mask); | |
723 | } | |
724 | ||
725 | if (_arg1) { | |
726 | static unsigned char cacheline[64] | |
727 | __attribute__ ((aligned (64))); | |
728 | ||
729 | __asm__ __volatile__("rd %%fprs, %0\n\t" | |
730 | "or %0, %4, %1\n\t" | |
731 | "wr %1, 0x0, %%fprs\n\t" | |
732 | "stda %%f0, [%5] %6\n\t" | |
733 | "wr %0, 0x0, %%fprs\n\t" | |
734 | "membar #Sync" | |
735 | : "=&r" (mask), "=&r" (val) | |
736 | : "0" (mask), "1" (val), | |
737 | "i" (FPRS_FEF), "r" (&cacheline[0]), | |
738 | "i" (ASI_BLK_COMMIT_P)); | |
739 | } | |
740 | } | |
741 | ||
742 | struct schizo_irq_data { | |
743 | unsigned long pbm_regs; | |
744 | unsigned long sync_reg; | |
745 | u32 portid; | |
746 | int chip_version; | |
747 | }; | |
748 | ||
749 | static unsigned int schizo_irq_build(struct device_node *dp, | |
750 | unsigned int ino, | |
751 | void *_data) | |
752 | { | |
753 | struct schizo_irq_data *irq_data = _data; | |
754 | unsigned long pbm_regs = irq_data->pbm_regs; | |
755 | unsigned long imap, iclr; | |
756 | int ign_fixup; | |
757 | int virt_irq; | |
758 | int is_tomatillo; | |
759 | ||
760 | ino &= 0x3f; | |
761 | ||
762 | /* Now build the IRQ bucket. */ | |
763 | imap = schizo_ino_to_imap(pbm_regs, ino); | |
764 | iclr = schizo_ino_to_iclr(pbm_regs, ino); | |
765 | ||
766 | /* On Schizo, no inofixup occurs. This is because each | |
767 | * INO has it's own IMAP register. On Psycho and Sabre | |
768 | * there is only one IMAP register for each PCI slot even | |
769 | * though four different INOs can be generated by each | |
770 | * PCI slot. | |
771 | * | |
772 | * But, for JBUS variants (essentially, Tomatillo), we have | |
773 | * to fixup the lowest bit of the interrupt group number. | |
774 | */ | |
775 | ign_fixup = 0; | |
776 | ||
777 | is_tomatillo = (irq_data->sync_reg != 0UL); | |
778 | ||
779 | if (is_tomatillo) { | |
780 | if (irq_data->portid & 1) | |
781 | ign_fixup = (1 << 6); | |
782 | } | |
783 | ||
784 | virt_irq = build_irq(ign_fixup, iclr, imap); | |
785 | ||
786 | if (is_tomatillo) { | |
787 | irq_install_pre_handler(virt_irq, | |
788 | tomatillo_wsync_handler, | |
789 | ((irq_data->chip_version <= 4) ? | |
790 | (void *) 1 : (void *) 0), | |
791 | (void *) irq_data->sync_reg); | |
792 | } | |
793 | ||
794 | return virt_irq; | |
795 | } | |
796 | ||
c35a376d DM |
797 | static void __init __schizo_irq_trans_init(struct device_node *dp, |
798 | int is_tomatillo) | |
2b1e5978 | 799 | { |
6a23acf3 | 800 | const struct linux_prom64_registers *regs; |
2b1e5978 DM |
801 | struct schizo_irq_data *irq_data; |
802 | ||
803 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
804 | dp->irq_trans->irq_build = schizo_irq_build; | |
805 | ||
806 | irq_data = prom_early_alloc(sizeof(struct schizo_irq_data)); | |
807 | ||
808 | regs = of_get_property(dp, "reg", NULL); | |
809 | dp->irq_trans->data = irq_data; | |
810 | ||
811 | irq_data->pbm_regs = regs[0].phys_addr; | |
9001f285 DM |
812 | if (is_tomatillo) |
813 | irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL; | |
814 | else | |
815 | irq_data->sync_reg = 0UL; | |
2b1e5978 DM |
816 | irq_data->portid = of_getintprop_default(dp, "portid", 0); |
817 | irq_data->chip_version = of_getintprop_default(dp, "version#", 0); | |
818 | } | |
819 | ||
c35a376d | 820 | static void __init schizo_irq_trans_init(struct device_node *dp) |
9001f285 DM |
821 | { |
822 | __schizo_irq_trans_init(dp, 0); | |
823 | } | |
824 | ||
c35a376d | 825 | static void __init tomatillo_irq_trans_init(struct device_node *dp) |
9001f285 DM |
826 | { |
827 | __schizo_irq_trans_init(dp, 1); | |
828 | } | |
829 | ||
2b1e5978 DM |
830 | static unsigned int pci_sun4v_irq_build(struct device_node *dp, |
831 | unsigned int devino, | |
832 | void *_data) | |
833 | { | |
834 | u32 devhandle = (u32) (unsigned long) _data; | |
835 | ||
836 | return sun4v_build_irq(devhandle, devino); | |
837 | } | |
838 | ||
c35a376d | 839 | static void __init pci_sun4v_irq_trans_init(struct device_node *dp) |
2b1e5978 | 840 | { |
6a23acf3 | 841 | const struct linux_prom64_registers *regs; |
2b1e5978 DM |
842 | |
843 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
844 | dp->irq_trans->irq_build = pci_sun4v_irq_build; | |
845 | ||
846 | regs = of_get_property(dp, "reg", NULL); | |
847 | dp->irq_trans->data = (void *) (unsigned long) | |
848 | ((regs->phys_addr >> 32UL) & 0x0fffffff); | |
849 | } | |
861fe906 DM |
850 | |
851 | struct fire_irq_data { | |
852 | unsigned long pbm_regs; | |
853 | u32 portid; | |
854 | }; | |
855 | ||
856 | #define FIRE_IMAP_BASE 0x001000 | |
857 | #define FIRE_ICLR_BASE 0x001400 | |
858 | ||
859 | static unsigned long fire_imap_offset(unsigned long ino) | |
860 | { | |
861 | return FIRE_IMAP_BASE + (ino * 8UL); | |
862 | } | |
863 | ||
864 | static unsigned long fire_iclr_offset(unsigned long ino) | |
865 | { | |
866 | return FIRE_ICLR_BASE + (ino * 8UL); | |
867 | } | |
868 | ||
869 | static unsigned long fire_ino_to_iclr(unsigned long pbm_regs, | |
870 | unsigned int ino) | |
871 | { | |
872 | return pbm_regs + fire_iclr_offset(ino); | |
873 | } | |
874 | ||
875 | static unsigned long fire_ino_to_imap(unsigned long pbm_regs, | |
876 | unsigned int ino) | |
877 | { | |
878 | return pbm_regs + fire_imap_offset(ino); | |
879 | } | |
880 | ||
881 | static unsigned int fire_irq_build(struct device_node *dp, | |
882 | unsigned int ino, | |
883 | void *_data) | |
884 | { | |
885 | struct fire_irq_data *irq_data = _data; | |
886 | unsigned long pbm_regs = irq_data->pbm_regs; | |
887 | unsigned long imap, iclr; | |
888 | unsigned long int_ctrlr; | |
889 | ||
890 | ino &= 0x3f; | |
891 | ||
892 | /* Now build the IRQ bucket. */ | |
893 | imap = fire_ino_to_imap(pbm_regs, ino); | |
894 | iclr = fire_ino_to_iclr(pbm_regs, ino); | |
895 | ||
896 | /* Set the interrupt controller number. */ | |
897 | int_ctrlr = 1 << 6; | |
898 | upa_writeq(int_ctrlr, imap); | |
899 | ||
900 | /* The interrupt map registers do not have an INO field | |
901 | * like other chips do. They return zero in the INO | |
902 | * field, and the interrupt controller number is controlled | |
e5dd42e4 | 903 | * in bits 6 to 9. So in order for build_irq() to get |
861fe906 DM |
904 | * the INO right we pass it in as part of the fixup |
905 | * which will get added to the map register zero value | |
906 | * read by build_irq(). | |
907 | */ | |
908 | ino |= (irq_data->portid << 6); | |
909 | ino -= int_ctrlr; | |
910 | return build_irq(ino, iclr, imap); | |
911 | } | |
912 | ||
c35a376d | 913 | static void __init fire_irq_trans_init(struct device_node *dp) |
861fe906 DM |
914 | { |
915 | const struct linux_prom64_registers *regs; | |
916 | struct fire_irq_data *irq_data; | |
917 | ||
918 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
919 | dp->irq_trans->irq_build = fire_irq_build; | |
920 | ||
921 | irq_data = prom_early_alloc(sizeof(struct fire_irq_data)); | |
922 | ||
923 | regs = of_get_property(dp, "reg", NULL); | |
924 | dp->irq_trans->data = irq_data; | |
925 | ||
926 | irq_data->pbm_regs = regs[0].phys_addr; | |
927 | irq_data->portid = of_getintprop_default(dp, "portid", 0); | |
928 | } | |
2b1e5978 DM |
929 | #endif /* CONFIG_PCI */ |
930 | ||
931 | #ifdef CONFIG_SBUS | |
932 | /* INO number to IMAP register offset for SYSIO external IRQ's. | |
933 | * This should conform to both Sunfire/Wildfire server and Fusion | |
934 | * desktop designs. | |
935 | */ | |
936 | #define SYSIO_IMAP_SLOT0 0x2c04UL | |
937 | #define SYSIO_IMAP_SLOT1 0x2c0cUL | |
938 | #define SYSIO_IMAP_SLOT2 0x2c14UL | |
939 | #define SYSIO_IMAP_SLOT3 0x2c1cUL | |
940 | #define SYSIO_IMAP_SCSI 0x3004UL | |
941 | #define SYSIO_IMAP_ETH 0x300cUL | |
942 | #define SYSIO_IMAP_BPP 0x3014UL | |
943 | #define SYSIO_IMAP_AUDIO 0x301cUL | |
944 | #define SYSIO_IMAP_PFAIL 0x3024UL | |
945 | #define SYSIO_IMAP_KMS 0x302cUL | |
946 | #define SYSIO_IMAP_FLPY 0x3034UL | |
947 | #define SYSIO_IMAP_SHW 0x303cUL | |
948 | #define SYSIO_IMAP_KBD 0x3044UL | |
949 | #define SYSIO_IMAP_MS 0x304cUL | |
950 | #define SYSIO_IMAP_SER 0x3054UL | |
951 | #define SYSIO_IMAP_TIM0 0x3064UL | |
952 | #define SYSIO_IMAP_TIM1 0x306cUL | |
953 | #define SYSIO_IMAP_UE 0x3074UL | |
954 | #define SYSIO_IMAP_CE 0x307cUL | |
955 | #define SYSIO_IMAP_SBERR 0x3084UL | |
956 | #define SYSIO_IMAP_PMGMT 0x308cUL | |
957 | #define SYSIO_IMAP_GFX 0x3094UL | |
958 | #define SYSIO_IMAP_EUPA 0x309cUL | |
959 | ||
960 | #define bogon ((unsigned long) -1) | |
961 | static unsigned long sysio_irq_offsets[] = { | |
962 | /* SBUS Slot 0 --> 3, level 1 --> 7 */ | |
963 | SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, | |
964 | SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, | |
965 | SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, | |
966 | SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, | |
967 | SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, | |
968 | SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, | |
969 | SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, | |
970 | SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, | |
971 | ||
972 | /* Onboard devices (not relevant/used on SunFire). */ | |
973 | SYSIO_IMAP_SCSI, | |
974 | SYSIO_IMAP_ETH, | |
975 | SYSIO_IMAP_BPP, | |
976 | bogon, | |
977 | SYSIO_IMAP_AUDIO, | |
978 | SYSIO_IMAP_PFAIL, | |
979 | bogon, | |
980 | bogon, | |
981 | SYSIO_IMAP_KMS, | |
982 | SYSIO_IMAP_FLPY, | |
983 | SYSIO_IMAP_SHW, | |
984 | SYSIO_IMAP_KBD, | |
985 | SYSIO_IMAP_MS, | |
986 | SYSIO_IMAP_SER, | |
987 | bogon, | |
988 | bogon, | |
989 | SYSIO_IMAP_TIM0, | |
990 | SYSIO_IMAP_TIM1, | |
991 | bogon, | |
992 | bogon, | |
993 | SYSIO_IMAP_UE, | |
994 | SYSIO_IMAP_CE, | |
995 | SYSIO_IMAP_SBERR, | |
996 | SYSIO_IMAP_PMGMT, | |
46ba6d7d DM |
997 | SYSIO_IMAP_GFX, |
998 | SYSIO_IMAP_EUPA, | |
2b1e5978 DM |
999 | }; |
1000 | ||
1001 | #undef bogon | |
1002 | ||
1003 | #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets) | |
1004 | ||
1005 | /* Convert Interrupt Mapping register pointer to associated | |
1006 | * Interrupt Clear register pointer, SYSIO specific version. | |
1007 | */ | |
1008 | #define SYSIO_ICLR_UNUSED0 0x3400UL | |
1009 | #define SYSIO_ICLR_SLOT0 0x340cUL | |
1010 | #define SYSIO_ICLR_SLOT1 0x344cUL | |
1011 | #define SYSIO_ICLR_SLOT2 0x348cUL | |
1012 | #define SYSIO_ICLR_SLOT3 0x34ccUL | |
1013 | static unsigned long sysio_imap_to_iclr(unsigned long imap) | |
1014 | { | |
1015 | unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0; | |
1016 | return imap + diff; | |
1017 | } | |
1018 | ||
1019 | static unsigned int sbus_of_build_irq(struct device_node *dp, | |
1020 | unsigned int ino, | |
1021 | void *_data) | |
1022 | { | |
1023 | unsigned long reg_base = (unsigned long) _data; | |
6a23acf3 | 1024 | const struct linux_prom_registers *regs; |
2b1e5978 DM |
1025 | unsigned long imap, iclr; |
1026 | int sbus_slot = 0; | |
1027 | int sbus_level = 0; | |
1028 | ||
1029 | ino &= 0x3f; | |
1030 | ||
1031 | regs = of_get_property(dp, "reg", NULL); | |
1032 | if (regs) | |
1033 | sbus_slot = regs->which_io; | |
1034 | ||
1035 | if (ino < 0x20) | |
1036 | ino += (sbus_slot * 8); | |
1037 | ||
1038 | imap = sysio_irq_offsets[ino]; | |
1039 | if (imap == ((unsigned long)-1)) { | |
1040 | prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n", | |
1041 | ino); | |
1042 | prom_halt(); | |
1043 | } | |
1044 | imap += reg_base; | |
1045 | ||
1046 | /* SYSIO inconsistency. For external SLOTS, we have to select | |
1047 | * the right ICLR register based upon the lower SBUS irq level | |
1048 | * bits. | |
1049 | */ | |
1050 | if (ino >= 0x20) { | |
1051 | iclr = sysio_imap_to_iclr(imap); | |
1052 | } else { | |
1053 | sbus_level = ino & 0x7; | |
1054 | ||
1055 | switch(sbus_slot) { | |
1056 | case 0: | |
1057 | iclr = reg_base + SYSIO_ICLR_SLOT0; | |
1058 | break; | |
1059 | case 1: | |
1060 | iclr = reg_base + SYSIO_ICLR_SLOT1; | |
1061 | break; | |
1062 | case 2: | |
1063 | iclr = reg_base + SYSIO_ICLR_SLOT2; | |
1064 | break; | |
1065 | default: | |
1066 | case 3: | |
1067 | iclr = reg_base + SYSIO_ICLR_SLOT3; | |
1068 | break; | |
1069 | }; | |
1070 | ||
1071 | iclr += ((unsigned long)sbus_level - 1UL) * 8UL; | |
1072 | } | |
1073 | return build_irq(sbus_level, iclr, imap); | |
1074 | } | |
1075 | ||
c35a376d | 1076 | static void __init sbus_irq_trans_init(struct device_node *dp) |
2b1e5978 | 1077 | { |
6a23acf3 | 1078 | const struct linux_prom64_registers *regs; |
2b1e5978 DM |
1079 | |
1080 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
1081 | dp->irq_trans->irq_build = sbus_of_build_irq; | |
1082 | ||
1083 | regs = of_get_property(dp, "reg", NULL); | |
1084 | dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr; | |
1085 | } | |
1086 | #endif /* CONFIG_SBUS */ | |
1087 | ||
1088 | ||
1089 | static unsigned int central_build_irq(struct device_node *dp, | |
1090 | unsigned int ino, | |
1091 | void *_data) | |
1092 | { | |
1093 | struct device_node *central_dp = _data; | |
1094 | struct of_device *central_op = of_find_device_by_node(central_dp); | |
1095 | struct resource *res; | |
1096 | unsigned long imap, iclr; | |
1097 | u32 tmp; | |
1098 | ||
1099 | if (!strcmp(dp->name, "eeprom")) { | |
1100 | res = ¢ral_op->resource[5]; | |
1101 | } else if (!strcmp(dp->name, "zs")) { | |
1102 | res = ¢ral_op->resource[4]; | |
1103 | } else if (!strcmp(dp->name, "clock-board")) { | |
1104 | res = ¢ral_op->resource[3]; | |
1105 | } else { | |
1106 | return ino; | |
1107 | } | |
1108 | ||
1109 | imap = res->start + 0x00UL; | |
1110 | iclr = res->start + 0x10UL; | |
1111 | ||
1112 | /* Set the INO state to idle, and disable. */ | |
1113 | upa_writel(0, iclr); | |
1114 | upa_readl(iclr); | |
1115 | ||
1116 | tmp = upa_readl(imap); | |
1117 | tmp &= ~0x80000000; | |
1118 | upa_writel(tmp, imap); | |
1119 | ||
1120 | return build_irq(0, iclr, imap); | |
1121 | } | |
1122 | ||
c35a376d | 1123 | static void __init central_irq_trans_init(struct device_node *dp) |
2b1e5978 DM |
1124 | { |
1125 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
1126 | dp->irq_trans->irq_build = central_build_irq; | |
1127 | ||
1128 | dp->irq_trans->data = dp; | |
1129 | } | |
1130 | ||
1131 | struct irq_trans { | |
1132 | const char *name; | |
1133 | void (*init)(struct device_node *); | |
1134 | }; | |
1135 | ||
1136 | #ifdef CONFIG_PCI | |
c35a376d | 1137 | static struct irq_trans __initdata pci_irq_trans_table[] = { |
2b1e5978 DM |
1138 | { "SUNW,sabre", sabre_irq_trans_init }, |
1139 | { "pci108e,a000", sabre_irq_trans_init }, | |
1140 | { "pci108e,a001", sabre_irq_trans_init }, | |
1141 | { "SUNW,psycho", psycho_irq_trans_init }, | |
1142 | { "pci108e,8000", psycho_irq_trans_init }, | |
1143 | { "SUNW,schizo", schizo_irq_trans_init }, | |
1144 | { "pci108e,8001", schizo_irq_trans_init }, | |
1145 | { "SUNW,schizo+", schizo_irq_trans_init }, | |
1146 | { "pci108e,8002", schizo_irq_trans_init }, | |
9001f285 DM |
1147 | { "SUNW,tomatillo", tomatillo_irq_trans_init }, |
1148 | { "pci108e,a801", tomatillo_irq_trans_init }, | |
2b1e5978 | 1149 | { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init }, |
861fe906 | 1150 | { "pciex108e,80f0", fire_irq_trans_init }, |
2b1e5978 DM |
1151 | }; |
1152 | #endif | |
1153 | ||
6e990b50 DM |
1154 | static unsigned int sun4v_vdev_irq_build(struct device_node *dp, |
1155 | unsigned int devino, | |
1156 | void *_data) | |
1157 | { | |
1158 | u32 devhandle = (u32) (unsigned long) _data; | |
1159 | ||
1160 | return sun4v_build_irq(devhandle, devino); | |
1161 | } | |
1162 | ||
c35a376d | 1163 | static void __init sun4v_vdev_irq_trans_init(struct device_node *dp) |
6e990b50 | 1164 | { |
6a23acf3 | 1165 | const struct linux_prom64_registers *regs; |
6e990b50 DM |
1166 | |
1167 | dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller)); | |
1168 | dp->irq_trans->irq_build = sun4v_vdev_irq_build; | |
1169 | ||
1170 | regs = of_get_property(dp, "reg", NULL); | |
1171 | dp->irq_trans->data = (void *) (unsigned long) | |
1172 | ((regs->phys_addr >> 32UL) & 0x0fffffff); | |
1173 | } | |
1174 | ||
c35a376d | 1175 | static void __init irq_trans_init(struct device_node *dp) |
2b1e5978 | 1176 | { |
7233589d | 1177 | #ifdef CONFIG_PCI |
4130a4b2 | 1178 | const char *model; |
2b1e5978 | 1179 | int i; |
7233589d | 1180 | #endif |
2b1e5978 | 1181 | |
4130a4b2 | 1182 | #ifdef CONFIG_PCI |
2b1e5978 DM |
1183 | model = of_get_property(dp, "model", NULL); |
1184 | if (!model) | |
1185 | model = of_get_property(dp, "compatible", NULL); | |
4130a4b2 DM |
1186 | if (model) { |
1187 | for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) { | |
1188 | struct irq_trans *t = &pci_irq_trans_table[i]; | |
2b1e5978 | 1189 | |
4130a4b2 DM |
1190 | if (!strcmp(model, t->name)) |
1191 | return t->init(dp); | |
1192 | } | |
2b1e5978 DM |
1193 | } |
1194 | #endif | |
1195 | #ifdef CONFIG_SBUS | |
1196 | if (!strcmp(dp->name, "sbus") || | |
1197 | !strcmp(dp->name, "sbi")) | |
1198 | return sbus_irq_trans_init(dp); | |
1199 | #endif | |
4130a4b2 DM |
1200 | if (!strcmp(dp->name, "fhc") && |
1201 | !strcmp(dp->parent->name, "central")) | |
1202 | return central_irq_trans_init(dp); | |
6e990b50 DM |
1203 | if (!strcmp(dp->name, "virtual-devices")) |
1204 | return sun4v_vdev_irq_trans_init(dp); | |
2b1e5978 DM |
1205 | } |
1206 | ||
372b07bb DM |
1207 | static int is_root_node(const struct device_node *dp) |
1208 | { | |
1209 | if (!dp) | |
1210 | return 0; | |
1211 | ||
1212 | return (dp->parent == NULL); | |
1213 | } | |
1214 | ||
1215 | /* The following routines deal with the black magic of fully naming a | |
1216 | * node. | |
1217 | * | |
1218 | * Certain well known named nodes are just the simple name string. | |
1219 | * | |
1220 | * Actual devices have an address specifier appended to the base name | |
1221 | * string, like this "foo@addr". The "addr" can be in any number of | |
1222 | * formats, and the platform plus the type of the node determine the | |
1223 | * format and how it is constructed. | |
1224 | * | |
1225 | * For children of the ROOT node, the naming convention is fixed and | |
1226 | * determined by whether this is a sun4u or sun4v system. | |
1227 | * | |
1228 | * For children of other nodes, it is bus type specific. So | |
1229 | * we walk up the tree until we discover a "device_type" property | |
1230 | * we recognize and we go from there. | |
1231 | * | |
1232 | * As an example, the boot device on my workstation has a full path: | |
1233 | * | |
1234 | * /pci@1e,600000/ide@d/disk@0,0:c | |
1235 | */ | |
1236 | static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf) | |
1237 | { | |
1238 | struct linux_prom64_registers *regs; | |
1239 | struct property *rprop; | |
1240 | u32 high_bits, low_bits, type; | |
1241 | ||
1242 | rprop = of_find_property(dp, "reg", NULL); | |
1243 | if (!rprop) | |
1244 | return; | |
1245 | ||
1246 | regs = rprop->value; | |
1247 | if (!is_root_node(dp->parent)) { | |
1248 | sprintf(tmp_buf, "%s@%x,%x", | |
1249 | dp->name, | |
1250 | (unsigned int) (regs->phys_addr >> 32UL), | |
1251 | (unsigned int) (regs->phys_addr & 0xffffffffUL)); | |
1252 | return; | |
1253 | } | |
1254 | ||
1255 | type = regs->phys_addr >> 60UL; | |
1256 | high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL; | |
1257 | low_bits = (regs->phys_addr & 0xffffffffUL); | |
1258 | ||
1259 | if (type == 0 || type == 8) { | |
1260 | const char *prefix = (type == 0) ? "m" : "i"; | |
1261 | ||
1262 | if (low_bits) | |
1263 | sprintf(tmp_buf, "%s@%s%x,%x", | |
1264 | dp->name, prefix, | |
1265 | high_bits, low_bits); | |
1266 | else | |
1267 | sprintf(tmp_buf, "%s@%s%x", | |
1268 | dp->name, | |
1269 | prefix, | |
1270 | high_bits); | |
1271 | } else if (type == 12) { | |
1272 | sprintf(tmp_buf, "%s@%x", | |
1273 | dp->name, high_bits); | |
1274 | } | |
1275 | } | |
1276 | ||
1277 | static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf) | |
1278 | { | |
1279 | struct linux_prom64_registers *regs; | |
1280 | struct property *prop; | |
1281 | ||
1282 | prop = of_find_property(dp, "reg", NULL); | |
1283 | if (!prop) | |
1284 | return; | |
1285 | ||
1286 | regs = prop->value; | |
1287 | if (!is_root_node(dp->parent)) { | |
1288 | sprintf(tmp_buf, "%s@%x,%x", | |
1289 | dp->name, | |
1290 | (unsigned int) (regs->phys_addr >> 32UL), | |
1291 | (unsigned int) (regs->phys_addr & 0xffffffffUL)); | |
1292 | return; | |
1293 | } | |
1294 | ||
1295 | prop = of_find_property(dp, "upa-portid", NULL); | |
1296 | if (!prop) | |
1297 | prop = of_find_property(dp, "portid", NULL); | |
1298 | if (prop) { | |
1299 | unsigned long mask = 0xffffffffUL; | |
1300 | ||
1301 | if (tlb_type >= cheetah) | |
1302 | mask = 0x7fffff; | |
1303 | ||
1304 | sprintf(tmp_buf, "%s@%x,%x", | |
1305 | dp->name, | |
1306 | *(u32 *)prop->value, | |
1307 | (unsigned int) (regs->phys_addr & mask)); | |
1308 | } | |
1309 | } | |
1310 | ||
1311 | /* "name@slot,offset" */ | |
1312 | static void __init sbus_path_component(struct device_node *dp, char *tmp_buf) | |
1313 | { | |
1314 | struct linux_prom_registers *regs; | |
1315 | struct property *prop; | |
1316 | ||
1317 | prop = of_find_property(dp, "reg", NULL); | |
1318 | if (!prop) | |
1319 | return; | |
1320 | ||
1321 | regs = prop->value; | |
1322 | sprintf(tmp_buf, "%s@%x,%x", | |
1323 | dp->name, | |
1324 | regs->which_io, | |
1325 | regs->phys_addr); | |
1326 | } | |
1327 | ||
1328 | /* "name@devnum[,func]" */ | |
1329 | static void __init pci_path_component(struct device_node *dp, char *tmp_buf) | |
1330 | { | |
1331 | struct linux_prom_pci_registers *regs; | |
1332 | struct property *prop; | |
1333 | unsigned int devfn; | |
1334 | ||
1335 | prop = of_find_property(dp, "reg", NULL); | |
1336 | if (!prop) | |
1337 | return; | |
1338 | ||
1339 | regs = prop->value; | |
1340 | devfn = (regs->phys_hi >> 8) & 0xff; | |
1341 | if (devfn & 0x07) { | |
1342 | sprintf(tmp_buf, "%s@%x,%x", | |
1343 | dp->name, | |
1344 | devfn >> 3, | |
1345 | devfn & 0x07); | |
1346 | } else { | |
1347 | sprintf(tmp_buf, "%s@%x", | |
1348 | dp->name, | |
1349 | devfn >> 3); | |
1350 | } | |
1351 | } | |
1352 | ||
1353 | /* "name@UPA_PORTID,offset" */ | |
1354 | static void __init upa_path_component(struct device_node *dp, char *tmp_buf) | |
1355 | { | |
1356 | struct linux_prom64_registers *regs; | |
1357 | struct property *prop; | |
1358 | ||
1359 | prop = of_find_property(dp, "reg", NULL); | |
1360 | if (!prop) | |
1361 | return; | |
1362 | ||
1363 | regs = prop->value; | |
1364 | ||
1365 | prop = of_find_property(dp, "upa-portid", NULL); | |
1366 | if (!prop) | |
1367 | return; | |
1368 | ||
1369 | sprintf(tmp_buf, "%s@%x,%x", | |
1370 | dp->name, | |
1371 | *(u32 *) prop->value, | |
1372 | (unsigned int) (regs->phys_addr & 0xffffffffUL)); | |
1373 | } | |
1374 | ||
1375 | /* "name@reg" */ | |
1376 | static void __init vdev_path_component(struct device_node *dp, char *tmp_buf) | |
1377 | { | |
1378 | struct property *prop; | |
1379 | u32 *regs; | |
1380 | ||
1381 | prop = of_find_property(dp, "reg", NULL); | |
1382 | if (!prop) | |
1383 | return; | |
1384 | ||
1385 | regs = prop->value; | |
1386 | ||
1387 | sprintf(tmp_buf, "%s@%x", dp->name, *regs); | |
1388 | } | |
1389 | ||
1390 | /* "name@addrhi,addrlo" */ | |
1391 | static void __init ebus_path_component(struct device_node *dp, char *tmp_buf) | |
1392 | { | |
1393 | struct linux_prom64_registers *regs; | |
1394 | struct property *prop; | |
1395 | ||
1396 | prop = of_find_property(dp, "reg", NULL); | |
1397 | if (!prop) | |
1398 | return; | |
1399 | ||
1400 | regs = prop->value; | |
1401 | ||
1402 | sprintf(tmp_buf, "%s@%x,%x", | |
1403 | dp->name, | |
1404 | (unsigned int) (regs->phys_addr >> 32UL), | |
1405 | (unsigned int) (regs->phys_addr & 0xffffffffUL)); | |
1406 | } | |
1407 | ||
1408 | /* "name@bus,addr" */ | |
1409 | static void __init i2c_path_component(struct device_node *dp, char *tmp_buf) | |
1410 | { | |
1411 | struct property *prop; | |
1412 | u32 *regs; | |
1413 | ||
1414 | prop = of_find_property(dp, "reg", NULL); | |
1415 | if (!prop) | |
1416 | return; | |
1417 | ||
1418 | regs = prop->value; | |
1419 | ||
1420 | /* This actually isn't right... should look at the #address-cells | |
1421 | * property of the i2c bus node etc. etc. | |
1422 | */ | |
1423 | sprintf(tmp_buf, "%s@%x,%x", | |
1424 | dp->name, regs[0], regs[1]); | |
1425 | } | |
1426 | ||
1427 | /* "name@reg0[,reg1]" */ | |
1428 | static void __init usb_path_component(struct device_node *dp, char *tmp_buf) | |
1429 | { | |
1430 | struct property *prop; | |
1431 | u32 *regs; | |
1432 | ||
1433 | prop = of_find_property(dp, "reg", NULL); | |
1434 | if (!prop) | |
1435 | return; | |
1436 | ||
1437 | regs = prop->value; | |
1438 | ||
1439 | if (prop->length == sizeof(u32) || regs[1] == 1) { | |
1440 | sprintf(tmp_buf, "%s@%x", | |
1441 | dp->name, regs[0]); | |
1442 | } else { | |
1443 | sprintf(tmp_buf, "%s@%x,%x", | |
1444 | dp->name, regs[0], regs[1]); | |
1445 | } | |
1446 | } | |
1447 | ||
1448 | /* "name@reg0reg1[,reg2reg3]" */ | |
1449 | static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf) | |
1450 | { | |
1451 | struct property *prop; | |
1452 | u32 *regs; | |
1453 | ||
1454 | prop = of_find_property(dp, "reg", NULL); | |
1455 | if (!prop) | |
1456 | return; | |
1457 | ||
1458 | regs = prop->value; | |
1459 | ||
1460 | if (regs[2] || regs[3]) { | |
1461 | sprintf(tmp_buf, "%s@%08x%08x,%04x%08x", | |
1462 | dp->name, regs[0], regs[1], regs[2], regs[3]); | |
1463 | } else { | |
1464 | sprintf(tmp_buf, "%s@%08x%08x", | |
1465 | dp->name, regs[0], regs[1]); | |
1466 | } | |
1467 | } | |
1468 | ||
1469 | static void __init __build_path_component(struct device_node *dp, char *tmp_buf) | |
1470 | { | |
1471 | struct device_node *parent = dp->parent; | |
1472 | ||
1473 | if (parent != NULL) { | |
1474 | if (!strcmp(parent->type, "pci") || | |
1475 | !strcmp(parent->type, "pciex")) | |
1476 | return pci_path_component(dp, tmp_buf); | |
1477 | if (!strcmp(parent->type, "sbus")) | |
1478 | return sbus_path_component(dp, tmp_buf); | |
1479 | if (!strcmp(parent->type, "upa")) | |
1480 | return upa_path_component(dp, tmp_buf); | |
1481 | if (!strcmp(parent->type, "ebus")) | |
1482 | return ebus_path_component(dp, tmp_buf); | |
1483 | if (!strcmp(parent->name, "usb") || | |
1484 | !strcmp(parent->name, "hub")) | |
1485 | return usb_path_component(dp, tmp_buf); | |
1486 | if (!strcmp(parent->type, "i2c")) | |
1487 | return i2c_path_component(dp, tmp_buf); | |
1488 | if (!strcmp(parent->type, "firewire")) | |
1489 | return ieee1394_path_component(dp, tmp_buf); | |
1490 | if (!strcmp(parent->type, "virtual-devices")) | |
1491 | return vdev_path_component(dp, tmp_buf); | |
1492 | ||
1493 | /* "isa" is handled with platform naming */ | |
1494 | } | |
1495 | ||
1496 | /* Use platform naming convention. */ | |
1497 | if (tlb_type == hypervisor) | |
1498 | return sun4v_path_component(dp, tmp_buf); | |
1499 | else | |
1500 | return sun4u_path_component(dp, tmp_buf); | |
1501 | } | |
1502 | ||
1503 | static char * __init build_path_component(struct device_node *dp) | |
1504 | { | |
1505 | char tmp_buf[64], *n; | |
1506 | ||
1507 | tmp_buf[0] = '\0'; | |
1508 | __build_path_component(dp, tmp_buf); | |
1509 | if (tmp_buf[0] == '\0') | |
1510 | strcpy(tmp_buf, dp->name); | |
1511 | ||
1512 | n = prom_early_alloc(strlen(tmp_buf) + 1); | |
1513 | strcpy(n, tmp_buf); | |
1514 | ||
1515 | return n; | |
1516 | } | |
1517 | ||
1518 | static char * __init build_full_name(struct device_node *dp) | |
1519 | { | |
1520 | int len, ourlen, plen; | |
1521 | char *n; | |
1522 | ||
1523 | plen = strlen(dp->parent->full_name); | |
1524 | ourlen = strlen(dp->path_component_name); | |
1525 | len = ourlen + plen + 2; | |
1526 | ||
1527 | n = prom_early_alloc(len); | |
1528 | strcpy(n, dp->parent->full_name); | |
1529 | if (!is_root_node(dp->parent)) { | |
1530 | strcpy(n + plen, "/"); | |
1531 | plen++; | |
1532 | } | |
1533 | strcpy(n + plen, dp->path_component_name); | |
1534 | ||
1535 | return n; | |
1536 | } | |
1537 | ||
87b385da DM |
1538 | static unsigned int unique_id; |
1539 | ||
1540 | static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len) | |
372b07bb DM |
1541 | { |
1542 | static struct property *tmp = NULL; | |
1543 | struct property *p; | |
1544 | ||
1545 | if (tmp) { | |
1546 | p = tmp; | |
1547 | memset(p, 0, sizeof(*p) + 32); | |
1548 | tmp = NULL; | |
87b385da | 1549 | } else { |
372b07bb | 1550 | p = prom_early_alloc(sizeof(struct property) + 32); |
87b385da DM |
1551 | p->unique_id = unique_id++; |
1552 | } | |
372b07bb DM |
1553 | |
1554 | p->name = (char *) (p + 1); | |
87b385da DM |
1555 | if (special_name) { |
1556 | strcpy(p->name, special_name); | |
1557 | p->length = special_len; | |
1558 | p->value = prom_early_alloc(special_len); | |
1559 | memcpy(p->value, special_val, special_len); | |
372b07bb | 1560 | } else { |
87b385da DM |
1561 | if (prev == NULL) { |
1562 | prom_firstprop(node, p->name); | |
1563 | } else { | |
1564 | prom_nextprop(node, prev, p->name); | |
1565 | } | |
1566 | if (strlen(p->name) == 0) { | |
1567 | tmp = p; | |
1568 | return NULL; | |
1569 | } | |
1570 | p->length = prom_getproplen(node, p->name); | |
1571 | if (p->length <= 0) { | |
1572 | p->length = 0; | |
1573 | } else { | |
1574 | p->value = prom_early_alloc(p->length + 1); | |
1575 | prom_getproperty(node, p->name, p->value, p->length); | |
1576 | ((unsigned char *)p->value)[p->length] = '\0'; | |
1577 | } | |
372b07bb DM |
1578 | } |
1579 | return p; | |
1580 | } | |
1581 | ||
1582 | static struct property * __init build_prop_list(phandle node) | |
1583 | { | |
1584 | struct property *head, *tail; | |
1585 | ||
87b385da DM |
1586 | head = tail = build_one_prop(node, NULL, |
1587 | ".node", &node, sizeof(node)); | |
1588 | ||
1589 | tail->next = build_one_prop(node, NULL, NULL, NULL, 0); | |
1590 | tail = tail->next; | |
372b07bb | 1591 | while(tail) { |
87b385da DM |
1592 | tail->next = build_one_prop(node, tail->name, |
1593 | NULL, NULL, 0); | |
372b07bb DM |
1594 | tail = tail->next; |
1595 | } | |
1596 | ||
1597 | return head; | |
1598 | } | |
1599 | ||
1600 | static char * __init get_one_property(phandle node, const char *name) | |
1601 | { | |
1602 | char *buf = "<NULL>"; | |
1603 | int len; | |
1604 | ||
1605 | len = prom_getproplen(node, name); | |
1606 | if (len > 0) { | |
1607 | buf = prom_early_alloc(len); | |
1608 | prom_getproperty(node, name, buf, len); | |
1609 | } | |
1610 | ||
1611 | return buf; | |
1612 | } | |
1613 | ||
4130a4b2 | 1614 | static struct device_node * __init create_node(phandle node, struct device_node *parent) |
372b07bb DM |
1615 | { |
1616 | struct device_node *dp; | |
1617 | ||
1618 | if (!node) | |
1619 | return NULL; | |
1620 | ||
1621 | dp = prom_early_alloc(sizeof(*dp)); | |
87b385da | 1622 | dp->unique_id = unique_id++; |
4130a4b2 | 1623 | dp->parent = parent; |
372b07bb DM |
1624 | |
1625 | kref_init(&dp->kref); | |
1626 | ||
1627 | dp->name = get_one_property(node, "name"); | |
1628 | dp->type = get_one_property(node, "device_type"); | |
1629 | dp->node = node; | |
1630 | ||
372b07bb DM |
1631 | dp->properties = build_prop_list(node); |
1632 | ||
2b1e5978 DM |
1633 | irq_trans_init(dp); |
1634 | ||
372b07bb DM |
1635 | return dp; |
1636 | } | |
1637 | ||
1638 | static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp) | |
1639 | { | |
aa5242e7 | 1640 | struct device_node *ret = NULL, *prev_sibling = NULL; |
372b07bb DM |
1641 | struct device_node *dp; |
1642 | ||
aa5242e7 DM |
1643 | while (1) { |
1644 | dp = create_node(node, parent); | |
1645 | if (!dp) | |
1646 | break; | |
1647 | ||
1648 | if (prev_sibling) | |
1649 | prev_sibling->sibling = dp; | |
1650 | ||
1651 | if (!ret) | |
1652 | ret = dp; | |
1653 | prev_sibling = dp; | |
1654 | ||
372b07bb DM |
1655 | *(*nextp) = dp; |
1656 | *nextp = &dp->allnext; | |
1657 | ||
372b07bb DM |
1658 | dp->path_component_name = build_path_component(dp); |
1659 | dp->full_name = build_full_name(dp); | |
1660 | ||
1661 | dp->child = build_tree(dp, prom_getchild(node), nextp); | |
1662 | ||
aa5242e7 | 1663 | node = prom_getsibling(node); |
372b07bb DM |
1664 | } |
1665 | ||
aa5242e7 | 1666 | return ret; |
372b07bb DM |
1667 | } |
1668 | ||
5cbc3073 DM |
1669 | static const char *get_mid_prop(void) |
1670 | { | |
1671 | return (tlb_type == spitfire ? "upa-portid" : "portid"); | |
1672 | } | |
1673 | ||
1674 | struct device_node *of_find_node_by_cpuid(int cpuid) | |
1675 | { | |
1676 | struct device_node *dp; | |
1677 | const char *mid_prop = get_mid_prop(); | |
1678 | ||
1679 | for_each_node_by_type(dp, "cpu") { | |
1680 | int id = of_getintprop_default(dp, mid_prop, -1); | |
1681 | const char *this_mid_prop = mid_prop; | |
1682 | ||
1683 | if (id < 0) { | |
1684 | this_mid_prop = "cpuid"; | |
1685 | id = of_getintprop_default(dp, this_mid_prop, -1); | |
1686 | } | |
1687 | ||
1688 | if (id < 0) { | |
1689 | prom_printf("OF: Serious problem, cpu lacks " | |
1690 | "%s property", this_mid_prop); | |
1691 | prom_halt(); | |
1692 | } | |
1693 | if (cpuid == id) | |
1694 | return dp; | |
1695 | } | |
1696 | return NULL; | |
1697 | } | |
1698 | ||
1699 | static void __init of_fill_in_cpu_data(void) | |
1700 | { | |
1701 | struct device_node *dp; | |
1702 | const char *mid_prop = get_mid_prop(); | |
1703 | ||
1704 | ncpus_probed = 0; | |
1705 | for_each_node_by_type(dp, "cpu") { | |
1706 | int cpuid = of_getintprop_default(dp, mid_prop, -1); | |
1707 | const char *this_mid_prop = mid_prop; | |
1708 | struct device_node *portid_parent; | |
1709 | int portid = -1; | |
1710 | ||
1711 | portid_parent = NULL; | |
1712 | if (cpuid < 0) { | |
1713 | this_mid_prop = "cpuid"; | |
1714 | cpuid = of_getintprop_default(dp, this_mid_prop, -1); | |
1715 | if (cpuid >= 0) { | |
1716 | int limit = 2; | |
1717 | ||
1718 | portid_parent = dp; | |
1719 | while (limit--) { | |
1720 | portid_parent = portid_parent->parent; | |
1721 | if (!portid_parent) | |
1722 | break; | |
1723 | portid = of_getintprop_default(portid_parent, | |
1724 | "portid", -1); | |
1725 | if (portid >= 0) | |
1726 | break; | |
1727 | } | |
1728 | } | |
1729 | } | |
1730 | ||
1731 | if (cpuid < 0) { | |
1732 | prom_printf("OF: Serious problem, cpu lacks " | |
1733 | "%s property", this_mid_prop); | |
1734 | prom_halt(); | |
1735 | } | |
1736 | ||
1737 | ncpus_probed++; | |
1738 | ||
1739 | #ifdef CONFIG_SMP | |
1740 | if (cpuid >= NR_CPUS) | |
1741 | continue; | |
1742 | #else | |
1743 | /* On uniprocessor we only want the values for the | |
1744 | * real physical cpu the kernel booted onto, however | |
1745 | * cpu_data() only has one entry at index 0. | |
1746 | */ | |
1747 | if (cpuid != real_hard_smp_processor_id()) | |
1748 | continue; | |
1749 | cpuid = 0; | |
1750 | #endif | |
1751 | ||
1752 | cpu_data(cpuid).clock_tick = | |
1753 | of_getintprop_default(dp, "clock-frequency", 0); | |
1754 | ||
1755 | if (portid_parent) { | |
1756 | cpu_data(cpuid).dcache_size = | |
1757 | of_getintprop_default(dp, "l1-dcache-size", | |
1758 | 16 * 1024); | |
1759 | cpu_data(cpuid).dcache_line_size = | |
1760 | of_getintprop_default(dp, "l1-dcache-line-size", | |
1761 | 32); | |
1762 | cpu_data(cpuid).icache_size = | |
1763 | of_getintprop_default(dp, "l1-icache-size", | |
1764 | 8 * 1024); | |
1765 | cpu_data(cpuid).icache_line_size = | |
1766 | of_getintprop_default(dp, "l1-icache-line-size", | |
1767 | 32); | |
1768 | cpu_data(cpuid).ecache_size = | |
1769 | of_getintprop_default(dp, "l2-cache-size", 0); | |
1770 | cpu_data(cpuid).ecache_line_size = | |
1771 | of_getintprop_default(dp, "l2-cache-line-size", 0); | |
1772 | if (!cpu_data(cpuid).ecache_size || | |
1773 | !cpu_data(cpuid).ecache_line_size) { | |
1774 | cpu_data(cpuid).ecache_size = | |
1775 | of_getintprop_default(portid_parent, | |
1776 | "l2-cache-size", | |
1777 | (4 * 1024 * 1024)); | |
1778 | cpu_data(cpuid).ecache_line_size = | |
1779 | of_getintprop_default(portid_parent, | |
1780 | "l2-cache-line-size", 64); | |
1781 | } | |
1782 | ||
1783 | cpu_data(cpuid).core_id = portid + 1; | |
1784 | } else { | |
1785 | cpu_data(cpuid).dcache_size = | |
1786 | of_getintprop_default(dp, "dcache-size", 16 * 1024); | |
1787 | cpu_data(cpuid).dcache_line_size = | |
1788 | of_getintprop_default(dp, "dcache-line-size", 32); | |
1789 | ||
1790 | cpu_data(cpuid).icache_size = | |
1791 | of_getintprop_default(dp, "icache-size", 16 * 1024); | |
1792 | cpu_data(cpuid).icache_line_size = | |
1793 | of_getintprop_default(dp, "icache-line-size", 32); | |
1794 | ||
1795 | cpu_data(cpuid).ecache_size = | |
1796 | of_getintprop_default(dp, "ecache-size", | |
1797 | (4 * 1024 * 1024)); | |
1798 | cpu_data(cpuid).ecache_line_size = | |
1799 | of_getintprop_default(dp, "ecache-line-size", 64); | |
1800 | ||
1801 | cpu_data(cpuid).core_id = 0; | |
1802 | } | |
f78eae2e | 1803 | cpu_data(cpuid).proc_id = -1; |
5cbc3073 DM |
1804 | |
1805 | #ifdef CONFIG_SMP | |
1806 | cpu_set(cpuid, cpu_present_map); | |
1807 | cpu_set(cpuid, phys_cpu_present_map); | |
1808 | #endif | |
1809 | } | |
1810 | ||
1811 | smp_fill_in_sib_core_maps(); | |
1812 | } | |
1813 | ||
372b07bb DM |
1814 | void __init prom_build_devicetree(void) |
1815 | { | |
1816 | struct device_node **nextp; | |
1817 | ||
4130a4b2 | 1818 | allnodes = create_node(prom_root_node, NULL); |
372b07bb DM |
1819 | allnodes->path_component_name = ""; |
1820 | allnodes->full_name = "/"; | |
1821 | ||
1822 | nextp = &allnodes->allnext; | |
1823 | allnodes->child = build_tree(allnodes, | |
1824 | prom_getchild(allnodes->node), | |
1825 | &nextp); | |
1826 | printk("PROM: Built device tree with %u bytes of memory.\n", | |
1827 | prom_early_allocated); | |
5cbc3073 DM |
1828 | |
1829 | if (tlb_type != hypervisor) | |
1830 | of_fill_in_cpu_data(); | |
372b07bb | 1831 | } |