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1da177e4 LT |
1 | /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $ |
2 | * time.c: UltraSparc timer and TOD clock support. | |
3 | * | |
4 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) | |
5 | * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) | |
6 | * | |
7 | * Based largely on code which is: | |
8 | * | |
9 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) | |
10 | */ | |
11 | ||
1da177e4 LT |
12 | #include <linux/errno.h> |
13 | #include <linux/module.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/param.h> | |
17 | #include <linux/string.h> | |
18 | #include <linux/mm.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/time.h> | |
21 | #include <linux/timex.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/mc146818rtc.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/profile.h> | |
27 | #include <linux/bcd.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/cpufreq.h> | |
30 | #include <linux/percpu.h> | |
31 | #include <linux/profile.h> | |
8ba706a9 DM |
32 | #include <linux/miscdevice.h> |
33 | #include <linux/rtc.h> | |
1da177e4 LT |
34 | |
35 | #include <asm/oplib.h> | |
36 | #include <asm/mostek.h> | |
37 | #include <asm/timer.h> | |
38 | #include <asm/irq.h> | |
39 | #include <asm/io.h> | |
ff0d2fc6 DM |
40 | #include <asm/prom.h> |
41 | #include <asm/of_device.h> | |
1da177e4 LT |
42 | #include <asm/starfire.h> |
43 | #include <asm/smp.h> | |
44 | #include <asm/sections.h> | |
45 | #include <asm/cpudata.h> | |
8ba706a9 | 46 | #include <asm/uaccess.h> |
07f8e5f3 | 47 | #include <asm/prom.h> |
1da177e4 LT |
48 | |
49 | DEFINE_SPINLOCK(mostek_lock); | |
50 | DEFINE_SPINLOCK(rtc_lock); | |
ef0299bf | 51 | void __iomem *mstk48t02_regs = NULL; |
1da177e4 LT |
52 | #ifdef CONFIG_PCI |
53 | unsigned long ds1287_regs = 0UL; | |
54 | #endif | |
55 | ||
ef0299bf AV |
56 | static void __iomem *mstk48t08_regs; |
57 | static void __iomem *mstk48t59_regs; | |
1da177e4 LT |
58 | |
59 | static int set_rtc_mmss(unsigned long); | |
60 | ||
1da177e4 LT |
61 | #define TICK_PRIV_BIT (1UL << 63) |
62 | ||
63 | #ifdef CONFIG_SMP | |
64 | unsigned long profile_pc(struct pt_regs *regs) | |
65 | { | |
66 | unsigned long pc = instruction_pointer(regs); | |
67 | ||
68 | if (in_lock_functions(pc)) | |
69 | return regs->u_regs[UREG_RETPC]; | |
70 | return pc; | |
71 | } | |
72 | EXPORT_SYMBOL(profile_pc); | |
73 | #endif | |
74 | ||
75 | static void tick_disable_protection(void) | |
76 | { | |
77 | /* Set things up so user can access tick register for profiling | |
78 | * purposes. Also workaround BB_ERRATA_1 by doing a dummy | |
79 | * read back of %tick after writing it. | |
80 | */ | |
81 | __asm__ __volatile__( | |
82 | " ba,pt %%xcc, 1f\n" | |
83 | " nop\n" | |
84 | " .align 64\n" | |
85 | "1: rd %%tick, %%g2\n" | |
86 | " add %%g2, 6, %%g2\n" | |
87 | " andn %%g2, %0, %%g2\n" | |
88 | " wrpr %%g2, 0, %%tick\n" | |
89 | " rdpr %%tick, %%g0" | |
90 | : /* no outputs */ | |
91 | : "r" (TICK_PRIV_BIT) | |
92 | : "g2"); | |
93 | } | |
94 | ||
95 | static void tick_init_tick(unsigned long offset) | |
96 | { | |
97 | tick_disable_protection(); | |
98 | ||
99 | __asm__ __volatile__( | |
100 | " rd %%tick, %%g1\n" | |
101 | " andn %%g1, %1, %%g1\n" | |
102 | " ba,pt %%xcc, 1f\n" | |
103 | " add %%g1, %0, %%g1\n" | |
104 | " .align 64\n" | |
105 | "1: wr %%g1, 0x0, %%tick_cmpr\n" | |
106 | " rd %%tick_cmpr, %%g0" | |
107 | : /* no outputs */ | |
108 | : "r" (offset), "r" (TICK_PRIV_BIT) | |
109 | : "g1"); | |
110 | } | |
111 | ||
112 | static unsigned long tick_get_tick(void) | |
113 | { | |
114 | unsigned long ret; | |
115 | ||
116 | __asm__ __volatile__("rd %%tick, %0\n\t" | |
117 | "mov %0, %0" | |
118 | : "=r" (ret)); | |
119 | ||
120 | return ret & ~TICK_PRIV_BIT; | |
121 | } | |
122 | ||
123 | static unsigned long tick_get_compare(void) | |
124 | { | |
125 | unsigned long ret; | |
126 | ||
127 | __asm__ __volatile__("rd %%tick_cmpr, %0\n\t" | |
128 | "mov %0, %0" | |
129 | : "=r" (ret)); | |
130 | ||
131 | return ret; | |
132 | } | |
133 | ||
134 | static unsigned long tick_add_compare(unsigned long adj) | |
135 | { | |
136 | unsigned long new_compare; | |
137 | ||
138 | /* Workaround for Spitfire Errata (#54 I think??), I discovered | |
139 | * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch | |
140 | * number 103640. | |
141 | * | |
142 | * On Blackbird writes to %tick_cmpr can fail, the | |
143 | * workaround seems to be to execute the wr instruction | |
144 | * at the start of an I-cache line, and perform a dummy | |
145 | * read back from %tick_cmpr right after writing to it. -DaveM | |
146 | */ | |
147 | __asm__ __volatile__("rd %%tick_cmpr, %0\n\t" | |
148 | "ba,pt %%xcc, 1f\n\t" | |
149 | " add %0, %1, %0\n\t" | |
150 | ".align 64\n" | |
151 | "1:\n\t" | |
152 | "wr %0, 0, %%tick_cmpr\n\t" | |
153 | "rd %%tick_cmpr, %%g0" | |
154 | : "=&r" (new_compare) | |
155 | : "r" (adj)); | |
156 | ||
157 | return new_compare; | |
158 | } | |
159 | ||
160 | static unsigned long tick_add_tick(unsigned long adj, unsigned long offset) | |
161 | { | |
162 | unsigned long new_tick, tmp; | |
163 | ||
164 | /* Also need to handle Blackbird bug here too. */ | |
165 | __asm__ __volatile__("rd %%tick, %0\n\t" | |
166 | "add %0, %2, %0\n\t" | |
167 | "wrpr %0, 0, %%tick\n\t" | |
168 | "andn %0, %4, %1\n\t" | |
169 | "ba,pt %%xcc, 1f\n\t" | |
170 | " add %1, %3, %1\n\t" | |
171 | ".align 64\n" | |
172 | "1:\n\t" | |
173 | "wr %1, 0, %%tick_cmpr\n\t" | |
174 | "rd %%tick_cmpr, %%g0" | |
175 | : "=&r" (new_tick), "=&r" (tmp) | |
176 | : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT)); | |
177 | ||
178 | return new_tick; | |
179 | } | |
180 | ||
d369ddd2 | 181 | static struct sparc64_tick_ops tick_operations __read_mostly = { |
1da177e4 LT |
182 | .init_tick = tick_init_tick, |
183 | .get_tick = tick_get_tick, | |
184 | .get_compare = tick_get_compare, | |
185 | .add_tick = tick_add_tick, | |
186 | .add_compare = tick_add_compare, | |
187 | .softint_mask = 1UL << 0, | |
188 | }; | |
189 | ||
fc321495 DM |
190 | struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations; |
191 | ||
1da177e4 LT |
192 | static void stick_init_tick(unsigned long offset) |
193 | { | |
7aa62645 DM |
194 | /* Writes to the %tick and %stick register are not |
195 | * allowed on sun4v. The Hypervisor controls that | |
196 | * bit, per-strand. | |
197 | */ | |
198 | if (tlb_type != hypervisor) { | |
199 | tick_disable_protection(); | |
200 | ||
201 | /* Let the user get at STICK too. */ | |
202 | __asm__ __volatile__( | |
203 | " rd %%asr24, %%g2\n" | |
204 | " andn %%g2, %0, %%g2\n" | |
205 | " wr %%g2, 0, %%asr24" | |
206 | : /* no outputs */ | |
207 | : "r" (TICK_PRIV_BIT) | |
208 | : "g1", "g2"); | |
209 | } | |
1da177e4 LT |
210 | |
211 | __asm__ __volatile__( | |
212 | " rd %%asr24, %%g1\n" | |
213 | " andn %%g1, %1, %%g1\n" | |
214 | " add %%g1, %0, %%g1\n" | |
215 | " wr %%g1, 0x0, %%asr25" | |
216 | : /* no outputs */ | |
217 | : "r" (offset), "r" (TICK_PRIV_BIT) | |
218 | : "g1"); | |
219 | } | |
220 | ||
221 | static unsigned long stick_get_tick(void) | |
222 | { | |
223 | unsigned long ret; | |
224 | ||
225 | __asm__ __volatile__("rd %%asr24, %0" | |
226 | : "=r" (ret)); | |
227 | ||
228 | return ret & ~TICK_PRIV_BIT; | |
229 | } | |
230 | ||
231 | static unsigned long stick_get_compare(void) | |
232 | { | |
233 | unsigned long ret; | |
234 | ||
235 | __asm__ __volatile__("rd %%asr25, %0" | |
236 | : "=r" (ret)); | |
237 | ||
238 | return ret; | |
239 | } | |
240 | ||
241 | static unsigned long stick_add_tick(unsigned long adj, unsigned long offset) | |
242 | { | |
243 | unsigned long new_tick, tmp; | |
244 | ||
245 | __asm__ __volatile__("rd %%asr24, %0\n\t" | |
246 | "add %0, %2, %0\n\t" | |
247 | "wr %0, 0, %%asr24\n\t" | |
248 | "andn %0, %4, %1\n\t" | |
249 | "add %1, %3, %1\n\t" | |
250 | "wr %1, 0, %%asr25" | |
251 | : "=&r" (new_tick), "=&r" (tmp) | |
252 | : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT)); | |
253 | ||
254 | return new_tick; | |
255 | } | |
256 | ||
257 | static unsigned long stick_add_compare(unsigned long adj) | |
258 | { | |
259 | unsigned long new_compare; | |
260 | ||
261 | __asm__ __volatile__("rd %%asr25, %0\n\t" | |
262 | "add %0, %1, %0\n\t" | |
263 | "wr %0, 0, %%asr25" | |
264 | : "=&r" (new_compare) | |
265 | : "r" (adj)); | |
266 | ||
267 | return new_compare; | |
268 | } | |
269 | ||
d369ddd2 | 270 | static struct sparc64_tick_ops stick_operations __read_mostly = { |
1da177e4 LT |
271 | .init_tick = stick_init_tick, |
272 | .get_tick = stick_get_tick, | |
273 | .get_compare = stick_get_compare, | |
274 | .add_tick = stick_add_tick, | |
275 | .add_compare = stick_add_compare, | |
276 | .softint_mask = 1UL << 16, | |
277 | }; | |
278 | ||
279 | /* On Hummingbird the STICK/STICK_CMPR register is implemented | |
280 | * in I/O space. There are two 64-bit registers each, the | |
281 | * first holds the low 32-bits of the value and the second holds | |
282 | * the high 32-bits. | |
283 | * | |
284 | * Since STICK is constantly updating, we have to access it carefully. | |
285 | * | |
286 | * The sequence we use to read is: | |
9eb3394b RM |
287 | * 1) read high |
288 | * 2) read low | |
289 | * 3) read high again, if it rolled re-read both low and high again. | |
1da177e4 LT |
290 | * |
291 | * Writing STICK safely is also tricky: | |
292 | * 1) write low to zero | |
293 | * 2) write high | |
294 | * 3) write low | |
295 | */ | |
296 | #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL | |
297 | #define HBIRD_STICK_ADDR 0x1fe0000f070UL | |
298 | ||
299 | static unsigned long __hbird_read_stick(void) | |
300 | { | |
301 | unsigned long ret, tmp1, tmp2, tmp3; | |
9eb3394b | 302 | unsigned long addr = HBIRD_STICK_ADDR+8; |
1da177e4 | 303 | |
9eb3394b RM |
304 | __asm__ __volatile__("ldxa [%1] %5, %2\n" |
305 | "1:\n\t" | |
1da177e4 | 306 | "sub %1, 0x8, %1\n\t" |
9eb3394b RM |
307 | "ldxa [%1] %5, %3\n\t" |
308 | "add %1, 0x8, %1\n\t" | |
1da177e4 LT |
309 | "ldxa [%1] %5, %4\n\t" |
310 | "cmp %4, %2\n\t" | |
9eb3394b RM |
311 | "bne,a,pn %%xcc, 1b\n\t" |
312 | " mov %4, %2\n\t" | |
313 | "sllx %4, 32, %4\n\t" | |
1da177e4 LT |
314 | "or %3, %4, %0\n\t" |
315 | : "=&r" (ret), "=&r" (addr), | |
316 | "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3) | |
317 | : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr)); | |
318 | ||
319 | return ret; | |
320 | } | |
321 | ||
322 | static unsigned long __hbird_read_compare(void) | |
323 | { | |
324 | unsigned long low, high; | |
325 | unsigned long addr = HBIRD_STICKCMP_ADDR; | |
326 | ||
327 | __asm__ __volatile__("ldxa [%2] %3, %0\n\t" | |
328 | "add %2, 0x8, %2\n\t" | |
329 | "ldxa [%2] %3, %1" | |
330 | : "=&r" (low), "=&r" (high), "=&r" (addr) | |
331 | : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr)); | |
332 | ||
333 | return (high << 32UL) | low; | |
334 | } | |
335 | ||
336 | static void __hbird_write_stick(unsigned long val) | |
337 | { | |
338 | unsigned long low = (val & 0xffffffffUL); | |
339 | unsigned long high = (val >> 32UL); | |
340 | unsigned long addr = HBIRD_STICK_ADDR; | |
341 | ||
342 | __asm__ __volatile__("stxa %%g0, [%0] %4\n\t" | |
343 | "add %0, 0x8, %0\n\t" | |
344 | "stxa %3, [%0] %4\n\t" | |
345 | "sub %0, 0x8, %0\n\t" | |
346 | "stxa %2, [%0] %4" | |
347 | : "=&r" (addr) | |
348 | : "0" (addr), "r" (low), "r" (high), | |
349 | "i" (ASI_PHYS_BYPASS_EC_E)); | |
350 | } | |
351 | ||
352 | static void __hbird_write_compare(unsigned long val) | |
353 | { | |
354 | unsigned long low = (val & 0xffffffffUL); | |
355 | unsigned long high = (val >> 32UL); | |
356 | unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL; | |
357 | ||
358 | __asm__ __volatile__("stxa %3, [%0] %4\n\t" | |
359 | "sub %0, 0x8, %0\n\t" | |
360 | "stxa %2, [%0] %4" | |
361 | : "=&r" (addr) | |
362 | : "0" (addr), "r" (low), "r" (high), | |
363 | "i" (ASI_PHYS_BYPASS_EC_E)); | |
364 | } | |
365 | ||
366 | static void hbtick_init_tick(unsigned long offset) | |
367 | { | |
368 | unsigned long val; | |
369 | ||
370 | tick_disable_protection(); | |
371 | ||
372 | /* XXX This seems to be necessary to 'jumpstart' Hummingbird | |
373 | * XXX into actually sending STICK interrupts. I think because | |
374 | * XXX of how we store %tick_cmpr in head.S this somehow resets the | |
375 | * XXX {TICK + STICK} interrupt mux. -DaveM | |
376 | */ | |
377 | __hbird_write_stick(__hbird_read_stick()); | |
378 | ||
379 | val = __hbird_read_stick() & ~TICK_PRIV_BIT; | |
380 | __hbird_write_compare(val + offset); | |
381 | } | |
382 | ||
383 | static unsigned long hbtick_get_tick(void) | |
384 | { | |
385 | return __hbird_read_stick() & ~TICK_PRIV_BIT; | |
386 | } | |
387 | ||
388 | static unsigned long hbtick_get_compare(void) | |
389 | { | |
390 | return __hbird_read_compare(); | |
391 | } | |
392 | ||
393 | static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset) | |
394 | { | |
395 | unsigned long val; | |
396 | ||
397 | val = __hbird_read_stick() + adj; | |
398 | __hbird_write_stick(val); | |
399 | ||
400 | val &= ~TICK_PRIV_BIT; | |
401 | __hbird_write_compare(val + offset); | |
402 | ||
403 | return val; | |
404 | } | |
405 | ||
406 | static unsigned long hbtick_add_compare(unsigned long adj) | |
407 | { | |
408 | unsigned long val = __hbird_read_compare() + adj; | |
409 | ||
410 | val &= ~TICK_PRIV_BIT; | |
411 | __hbird_write_compare(val); | |
412 | ||
413 | return val; | |
414 | } | |
415 | ||
d369ddd2 | 416 | static struct sparc64_tick_ops hbtick_operations __read_mostly = { |
1da177e4 LT |
417 | .init_tick = hbtick_init_tick, |
418 | .get_tick = hbtick_get_tick, | |
419 | .get_compare = hbtick_get_compare, | |
420 | .add_tick = hbtick_add_tick, | |
421 | .add_compare = hbtick_add_compare, | |
422 | .softint_mask = 1UL << 0, | |
423 | }; | |
424 | ||
425 | /* timer_interrupt() needs to keep up the real-time clock, | |
426 | * as well as call the "do_timer()" routine every clocktick | |
427 | * | |
428 | * NOTE: On SUN5 systems the ticker interrupt comes in using 2 | |
429 | * interrupts, one at level14 and one with softint bit 0. | |
430 | */ | |
d369ddd2 | 431 | unsigned long timer_tick_offset __read_mostly; |
1da177e4 | 432 | |
d369ddd2 | 433 | static unsigned long timer_ticks_per_nsec_quotient __read_mostly; |
1da177e4 LT |
434 | |
435 | #define TICK_SIZE (tick_nsec / 1000) | |
436 | ||
437 | static inline void timer_check_rtc(void) | |
438 | { | |
439 | /* last time the cmos clock got updated */ | |
440 | static long last_rtc_update; | |
441 | ||
442 | /* Determine when to update the Mostek clock. */ | |
b149ee22 | 443 | if (ntp_synced() && |
1da177e4 LT |
444 | xtime.tv_sec > last_rtc_update + 660 && |
445 | (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && | |
446 | (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { | |
447 | if (set_rtc_mmss(xtime.tv_sec) == 0) | |
448 | last_rtc_update = xtime.tv_sec; | |
449 | else | |
450 | last_rtc_update = xtime.tv_sec - 600; | |
451 | /* do it again in 60 s */ | |
452 | } | |
453 | } | |
454 | ||
fd0504c3 | 455 | irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs) |
1da177e4 | 456 | { |
d369ddd2 | 457 | unsigned long ticks, compare, pstate; |
1da177e4 LT |
458 | |
459 | write_seqlock(&xtime_lock); | |
460 | ||
461 | do { | |
462 | #ifndef CONFIG_SMP | |
463 | profile_tick(CPU_PROFILING, regs); | |
464 | update_process_times(user_mode(regs)); | |
465 | #endif | |
3171a030 | 466 | do_timer(1); |
1da177e4 LT |
467 | |
468 | /* Guarantee that the following sequences execute | |
469 | * uninterrupted. | |
470 | */ | |
471 | __asm__ __volatile__("rdpr %%pstate, %0\n\t" | |
472 | "wrpr %0, %1, %%pstate" | |
473 | : "=r" (pstate) | |
474 | : "i" (PSTATE_IE)); | |
475 | ||
d369ddd2 | 476 | compare = tick_ops->add_compare(timer_tick_offset); |
1da177e4 LT |
477 | ticks = tick_ops->get_tick(); |
478 | ||
479 | /* Restore PSTATE_IE. */ | |
480 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" | |
481 | : /* no outputs */ | |
482 | : "r" (pstate)); | |
d369ddd2 | 483 | } while (time_after_eq(ticks, compare)); |
1da177e4 LT |
484 | |
485 | timer_check_rtc(); | |
486 | ||
487 | write_sequnlock(&xtime_lock); | |
488 | ||
489 | return IRQ_HANDLED; | |
490 | } | |
491 | ||
492 | #ifdef CONFIG_SMP | |
493 | void timer_tick_interrupt(struct pt_regs *regs) | |
494 | { | |
495 | write_seqlock(&xtime_lock); | |
496 | ||
3171a030 | 497 | do_timer(1); |
1da177e4 | 498 | |
1da177e4 LT |
499 | timer_check_rtc(); |
500 | ||
501 | write_sequnlock(&xtime_lock); | |
502 | } | |
503 | #endif | |
504 | ||
505 | /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */ | |
506 | static void __init kick_start_clock(void) | |
507 | { | |
ef0299bf | 508 | void __iomem *regs = mstk48t02_regs; |
1da177e4 LT |
509 | u8 sec, tmp; |
510 | int i, count; | |
511 | ||
512 | prom_printf("CLOCK: Clock was stopped. Kick start "); | |
513 | ||
514 | spin_lock_irq(&mostek_lock); | |
515 | ||
516 | /* Turn on the kick start bit to start the oscillator. */ | |
517 | tmp = mostek_read(regs + MOSTEK_CREG); | |
518 | tmp |= MSTK_CREG_WRITE; | |
519 | mostek_write(regs + MOSTEK_CREG, tmp); | |
520 | tmp = mostek_read(regs + MOSTEK_SEC); | |
521 | tmp &= ~MSTK_STOP; | |
522 | mostek_write(regs + MOSTEK_SEC, tmp); | |
523 | tmp = mostek_read(regs + MOSTEK_HOUR); | |
524 | tmp |= MSTK_KICK_START; | |
525 | mostek_write(regs + MOSTEK_HOUR, tmp); | |
526 | tmp = mostek_read(regs + MOSTEK_CREG); | |
527 | tmp &= ~MSTK_CREG_WRITE; | |
528 | mostek_write(regs + MOSTEK_CREG, tmp); | |
529 | ||
530 | spin_unlock_irq(&mostek_lock); | |
531 | ||
532 | /* Delay to allow the clock oscillator to start. */ | |
533 | sec = MSTK_REG_SEC(regs); | |
534 | for (i = 0; i < 3; i++) { | |
535 | while (sec == MSTK_REG_SEC(regs)) | |
536 | for (count = 0; count < 100000; count++) | |
537 | /* nothing */ ; | |
538 | prom_printf("."); | |
539 | sec = MSTK_REG_SEC(regs); | |
540 | } | |
541 | prom_printf("\n"); | |
542 | ||
543 | spin_lock_irq(&mostek_lock); | |
544 | ||
545 | /* Turn off kick start and set a "valid" time and date. */ | |
546 | tmp = mostek_read(regs + MOSTEK_CREG); | |
547 | tmp |= MSTK_CREG_WRITE; | |
548 | mostek_write(regs + MOSTEK_CREG, tmp); | |
549 | tmp = mostek_read(regs + MOSTEK_HOUR); | |
550 | tmp &= ~MSTK_KICK_START; | |
551 | mostek_write(regs + MOSTEK_HOUR, tmp); | |
552 | MSTK_SET_REG_SEC(regs,0); | |
553 | MSTK_SET_REG_MIN(regs,0); | |
554 | MSTK_SET_REG_HOUR(regs,0); | |
555 | MSTK_SET_REG_DOW(regs,5); | |
556 | MSTK_SET_REG_DOM(regs,1); | |
557 | MSTK_SET_REG_MONTH(regs,8); | |
558 | MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO); | |
559 | tmp = mostek_read(regs + MOSTEK_CREG); | |
560 | tmp &= ~MSTK_CREG_WRITE; | |
561 | mostek_write(regs + MOSTEK_CREG, tmp); | |
562 | ||
563 | spin_unlock_irq(&mostek_lock); | |
564 | ||
565 | /* Ensure the kick start bit is off. If it isn't, turn it off. */ | |
566 | while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) { | |
567 | prom_printf("CLOCK: Kick start still on!\n"); | |
568 | ||
569 | spin_lock_irq(&mostek_lock); | |
570 | ||
571 | tmp = mostek_read(regs + MOSTEK_CREG); | |
572 | tmp |= MSTK_CREG_WRITE; | |
573 | mostek_write(regs + MOSTEK_CREG, tmp); | |
574 | ||
575 | tmp = mostek_read(regs + MOSTEK_HOUR); | |
576 | tmp &= ~MSTK_KICK_START; | |
577 | mostek_write(regs + MOSTEK_HOUR, tmp); | |
578 | ||
579 | tmp = mostek_read(regs + MOSTEK_CREG); | |
580 | tmp &= ~MSTK_CREG_WRITE; | |
581 | mostek_write(regs + MOSTEK_CREG, tmp); | |
582 | ||
583 | spin_unlock_irq(&mostek_lock); | |
584 | } | |
585 | ||
586 | prom_printf("CLOCK: Kick start procedure successful.\n"); | |
587 | } | |
588 | ||
589 | /* Return nonzero if the clock chip battery is low. */ | |
590 | static int __init has_low_battery(void) | |
591 | { | |
ef0299bf | 592 | void __iomem *regs = mstk48t02_regs; |
1da177e4 LT |
593 | u8 data1, data2; |
594 | ||
595 | spin_lock_irq(&mostek_lock); | |
596 | ||
597 | data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */ | |
598 | mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */ | |
599 | data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */ | |
600 | mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */ | |
601 | ||
602 | spin_unlock_irq(&mostek_lock); | |
603 | ||
604 | return (data1 == data2); /* Was the write blocked? */ | |
605 | } | |
606 | ||
607 | /* Probe for the real time clock chip. */ | |
608 | static void __init set_system_time(void) | |
609 | { | |
610 | unsigned int year, mon, day, hour, min, sec; | |
ef0299bf | 611 | void __iomem *mregs = mstk48t02_regs; |
1da177e4 LT |
612 | #ifdef CONFIG_PCI |
613 | unsigned long dregs = ds1287_regs; | |
614 | #else | |
615 | unsigned long dregs = 0UL; | |
616 | #endif | |
617 | u8 tmp; | |
618 | ||
619 | if (!mregs && !dregs) { | |
620 | prom_printf("Something wrong, clock regs not mapped yet.\n"); | |
621 | prom_halt(); | |
622 | } | |
623 | ||
624 | if (mregs) { | |
625 | spin_lock_irq(&mostek_lock); | |
626 | ||
627 | /* Traditional Mostek chip. */ | |
628 | tmp = mostek_read(mregs + MOSTEK_CREG); | |
629 | tmp |= MSTK_CREG_READ; | |
630 | mostek_write(mregs + MOSTEK_CREG, tmp); | |
631 | ||
632 | sec = MSTK_REG_SEC(mregs); | |
633 | min = MSTK_REG_MIN(mregs); | |
634 | hour = MSTK_REG_HOUR(mregs); | |
635 | day = MSTK_REG_DOM(mregs); | |
636 | mon = MSTK_REG_MONTH(mregs); | |
637 | year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) ); | |
638 | } else { | |
1da177e4 LT |
639 | /* Dallas 12887 RTC chip. */ |
640 | ||
1da177e4 LT |
641 | do { |
642 | sec = CMOS_READ(RTC_SECONDS); | |
643 | min = CMOS_READ(RTC_MINUTES); | |
644 | hour = CMOS_READ(RTC_HOURS); | |
645 | day = CMOS_READ(RTC_DAY_OF_MONTH); | |
646 | mon = CMOS_READ(RTC_MONTH); | |
647 | year = CMOS_READ(RTC_YEAR); | |
648 | } while (sec != CMOS_READ(RTC_SECONDS)); | |
3dedf53b | 649 | |
1da177e4 LT |
650 | if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
651 | BCD_TO_BIN(sec); | |
652 | BCD_TO_BIN(min); | |
653 | BCD_TO_BIN(hour); | |
654 | BCD_TO_BIN(day); | |
655 | BCD_TO_BIN(mon); | |
656 | BCD_TO_BIN(year); | |
657 | } | |
658 | if ((year += 1900) < 1970) | |
659 | year += 100; | |
660 | } | |
661 | ||
662 | xtime.tv_sec = mktime(year, mon, day, hour, min, sec); | |
663 | xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | |
664 | set_normalized_timespec(&wall_to_monotonic, | |
665 | -xtime.tv_sec, -xtime.tv_nsec); | |
666 | ||
667 | if (mregs) { | |
668 | tmp = mostek_read(mregs + MOSTEK_CREG); | |
669 | tmp &= ~MSTK_CREG_READ; | |
670 | mostek_write(mregs + MOSTEK_CREG, tmp); | |
671 | ||
672 | spin_unlock_irq(&mostek_lock); | |
673 | } | |
674 | } | |
675 | ||
4bdff414 DM |
676 | /* davem suggests we keep this within the 4M locked kernel image */ |
677 | static u32 starfire_get_time(void) | |
678 | { | |
679 | static char obp_gettod[32]; | |
680 | static u32 unix_tod; | |
681 | ||
682 | sprintf(obp_gettod, "h# %08x unix-gettod", | |
683 | (unsigned int) (long) &unix_tod); | |
684 | prom_feval(obp_gettod); | |
685 | ||
686 | return unix_tod; | |
687 | } | |
688 | ||
8ba706a9 DM |
689 | static int starfire_set_time(u32 val) |
690 | { | |
691 | /* Do nothing, time is set using the service processor | |
692 | * console on this platform. | |
693 | */ | |
694 | return 0; | |
695 | } | |
696 | ||
4bdff414 DM |
697 | static u32 hypervisor_get_time(void) |
698 | { | |
699 | register unsigned long func asm("%o5"); | |
700 | register unsigned long arg0 asm("%o0"); | |
701 | register unsigned long arg1 asm("%o1"); | |
702 | int retries = 10000; | |
703 | ||
704 | retry: | |
705 | func = HV_FAST_TOD_GET; | |
706 | arg0 = 0; | |
707 | arg1 = 0; | |
708 | __asm__ __volatile__("ta %6" | |
709 | : "=&r" (func), "=&r" (arg0), "=&r" (arg1) | |
710 | : "0" (func), "1" (arg0), "2" (arg1), | |
711 | "i" (HV_FAST_TRAP)); | |
712 | if (arg0 == HV_EOK) | |
713 | return arg1; | |
714 | if (arg0 == HV_EWOULDBLOCK) { | |
715 | if (--retries > 0) { | |
716 | udelay(100); | |
717 | goto retry; | |
718 | } | |
719 | printk(KERN_WARNING "SUN4V: tod_get() timed out.\n"); | |
720 | return 0; | |
721 | } | |
722 | printk(KERN_WARNING "SUN4V: tod_get() not supported.\n"); | |
723 | return 0; | |
724 | } | |
725 | ||
8ba706a9 DM |
726 | static int hypervisor_set_time(u32 secs) |
727 | { | |
728 | register unsigned long func asm("%o5"); | |
729 | register unsigned long arg0 asm("%o0"); | |
730 | int retries = 10000; | |
731 | ||
732 | retry: | |
733 | func = HV_FAST_TOD_SET; | |
734 | arg0 = secs; | |
735 | __asm__ __volatile__("ta %4" | |
736 | : "=&r" (func), "=&r" (arg0) | |
737 | : "0" (func), "1" (arg0), | |
738 | "i" (HV_FAST_TRAP)); | |
739 | if (arg0 == HV_EOK) | |
740 | return 0; | |
741 | if (arg0 == HV_EWOULDBLOCK) { | |
742 | if (--retries > 0) { | |
743 | udelay(100); | |
744 | goto retry; | |
745 | } | |
746 | printk(KERN_WARNING "SUN4V: tod_set() timed out.\n"); | |
747 | return -EAGAIN; | |
748 | } | |
749 | printk(KERN_WARNING "SUN4V: tod_set() not supported.\n"); | |
750 | return -EOPNOTSUPP; | |
751 | } | |
752 | ||
690c8fd3 DM |
753 | static int __init clock_model_matches(char *model) |
754 | { | |
755 | if (strcmp(model, "mk48t02") && | |
756 | strcmp(model, "mk48t08") && | |
757 | strcmp(model, "mk48t59") && | |
758 | strcmp(model, "m5819") && | |
759 | strcmp(model, "m5819p") && | |
760 | strcmp(model, "m5823") && | |
761 | strcmp(model, "ds1287")) | |
762 | return 0; | |
763 | ||
764 | return 1; | |
765 | } | |
766 | ||
ee5caf0e | 767 | static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match) |
690c8fd3 | 768 | { |
ee5caf0e DM |
769 | struct device_node *dp = op->node; |
770 | char *model = of_get_property(dp, "model", NULL); | |
771 | unsigned long size, flags; | |
772 | void __iomem *regs; | |
690c8fd3 | 773 | |
ee5caf0e DM |
774 | if (!model || !clock_model_matches(model)) |
775 | return -ENODEV; | |
690c8fd3 | 776 | |
91521485 DM |
777 | /* On an Enterprise system there can be multiple mostek clocks. |
778 | * We should only match the one that is on the central FHC bus. | |
779 | */ | |
c3a8b85f DM |
780 | if (!strcmp(dp->parent->name, "fhc") && |
781 | strcmp(dp->parent->parent->name, "central") != 0) | |
91521485 DM |
782 | return -ENODEV; |
783 | ||
ee5caf0e DM |
784 | size = (op->resource[0].end - op->resource[0].start) + 1; |
785 | regs = of_ioremap(&op->resource[0], 0, size, "clock"); | |
786 | if (!regs) | |
787 | return -ENOMEM; | |
690c8fd3 | 788 | |
7233589d | 789 | #ifdef CONFIG_PCI |
690c8fd3 DM |
790 | if (!strcmp(model, "ds1287") || |
791 | !strcmp(model, "m5819") || | |
792 | !strcmp(model, "m5819p") || | |
793 | !strcmp(model, "m5823")) { | |
ee5caf0e | 794 | ds1287_regs = (unsigned long) regs; |
7233589d RD |
795 | } else |
796 | #endif | |
797 | if (model[5] == '0' && model[6] == '2') { | |
ee5caf0e DM |
798 | mstk48t02_regs = regs; |
799 | } else if(model[5] == '0' && model[6] == '8') { | |
800 | mstk48t08_regs = regs; | |
801 | mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02; | |
690c8fd3 | 802 | } else { |
ee5caf0e | 803 | mstk48t59_regs = regs; |
690c8fd3 DM |
804 | mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02; |
805 | } | |
690c8fd3 | 806 | |
ee5caf0e | 807 | printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs); |
690c8fd3 | 808 | |
ee5caf0e | 809 | local_irq_save(flags); |
690c8fd3 | 810 | |
ee5caf0e DM |
811 | if (mstk48t02_regs != NULL) { |
812 | /* Report a low battery voltage condition. */ | |
813 | if (has_low_battery()) | |
814 | prom_printf("NVRAM: Low battery voltage!\n"); | |
690c8fd3 | 815 | |
ee5caf0e DM |
816 | /* Kick start the clock if it is completely stopped. */ |
817 | if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP) | |
818 | kick_start_clock(); | |
690c8fd3 DM |
819 | } |
820 | ||
ee5caf0e DM |
821 | set_system_time(); |
822 | ||
823 | local_irq_restore(flags); | |
690c8fd3 DM |
824 | |
825 | return 0; | |
826 | } | |
690c8fd3 | 827 | |
ee5caf0e DM |
828 | static struct of_device_id clock_match[] = { |
829 | { | |
830 | .name = "eeprom", | |
831 | }, | |
832 | { | |
833 | .name = "rtc", | |
834 | }, | |
835 | {}, | |
836 | }; | |
690c8fd3 | 837 | |
ee5caf0e DM |
838 | static struct of_platform_driver clock_driver = { |
839 | .name = "clock", | |
840 | .match_table = clock_match, | |
841 | .probe = clock_probe, | |
842 | }; | |
690c8fd3 | 843 | |
ee5caf0e | 844 | static int __init clock_init(void) |
690c8fd3 | 845 | { |
1da177e4 | 846 | if (this_is_starfire) { |
4bdff414 DM |
847 | xtime.tv_sec = starfire_get_time(); |
848 | xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | |
849 | set_normalized_timespec(&wall_to_monotonic, | |
850 | -xtime.tv_sec, -xtime.tv_nsec); | |
ee5caf0e | 851 | return 0; |
4bdff414 DM |
852 | } |
853 | if (tlb_type == hypervisor) { | |
854 | xtime.tv_sec = hypervisor_get_time(); | |
1da177e4 LT |
855 | xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); |
856 | set_normalized_timespec(&wall_to_monotonic, | |
857 | -xtime.tv_sec, -xtime.tv_nsec); | |
ee5caf0e | 858 | return 0; |
1da177e4 LT |
859 | } |
860 | ||
ee5caf0e | 861 | return of_register_driver(&clock_driver, &of_bus_type); |
1da177e4 LT |
862 | } |
863 | ||
ee5caf0e DM |
864 | /* Must be after subsys_initcall() so that busses are probed. Must |
865 | * be before device_initcall() because things like the RTC driver | |
866 | * need to see the clock registers. | |
867 | */ | |
868 | fs_initcall(clock_init); | |
869 | ||
1da177e4 LT |
870 | /* This is gets the master TICK_INT timer going. */ |
871 | static unsigned long sparc64_init_timers(void) | |
872 | { | |
07f8e5f3 DM |
873 | struct device_node *dp; |
874 | struct property *prop; | |
1da177e4 | 875 | unsigned long clock; |
1da177e4 LT |
876 | #ifdef CONFIG_SMP |
877 | extern void smp_tick_init(void); | |
878 | #endif | |
879 | ||
07f8e5f3 | 880 | dp = of_find_node_by_path("/"); |
1da177e4 LT |
881 | if (tlb_type == spitfire) { |
882 | unsigned long ver, manuf, impl; | |
883 | ||
884 | __asm__ __volatile__ ("rdpr %%ver, %0" | |
885 | : "=&r" (ver)); | |
886 | manuf = ((ver >> 48) & 0xffff); | |
887 | impl = ((ver >> 32) & 0xffff); | |
888 | if (manuf == 0x17 && impl == 0x13) { | |
889 | /* Hummingbird, aka Ultra-IIe */ | |
890 | tick_ops = &hbtick_operations; | |
07f8e5f3 | 891 | prop = of_find_property(dp, "stick-frequency", NULL); |
1da177e4 LT |
892 | } else { |
893 | tick_ops = &tick_operations; | |
07f8e5f3 DM |
894 | cpu_find_by_instance(0, &dp, NULL); |
895 | prop = of_find_property(dp, "clock-frequency", NULL); | |
1da177e4 LT |
896 | } |
897 | } else { | |
898 | tick_ops = &stick_operations; | |
07f8e5f3 | 899 | prop = of_find_property(dp, "stick-frequency", NULL); |
1da177e4 | 900 | } |
07f8e5f3 | 901 | clock = *(unsigned int *) prop->value; |
1da177e4 LT |
902 | timer_tick_offset = clock / HZ; |
903 | ||
904 | #ifdef CONFIG_SMP | |
905 | smp_tick_init(); | |
906 | #endif | |
907 | ||
908 | return clock; | |
909 | } | |
910 | ||
fd0504c3 | 911 | static void sparc64_start_timers(void) |
1da177e4 LT |
912 | { |
913 | unsigned long pstate; | |
1da177e4 LT |
914 | |
915 | /* Guarantee that the following sequences execute | |
916 | * uninterrupted. | |
917 | */ | |
918 | __asm__ __volatile__("rdpr %%pstate, %0\n\t" | |
919 | "wrpr %0, %1, %%pstate" | |
920 | : "=r" (pstate) | |
921 | : "i" (PSTATE_IE)); | |
922 | ||
923 | tick_ops->init_tick(timer_tick_offset); | |
924 | ||
925 | /* Restore PSTATE_IE. */ | |
926 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" | |
927 | : /* no outputs */ | |
928 | : "r" (pstate)); | |
1da177e4 LT |
929 | } |
930 | ||
931 | struct freq_table { | |
1da177e4 LT |
932 | unsigned long clock_tick_ref; |
933 | unsigned int ref_freq; | |
934 | }; | |
3763be32 | 935 | static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 }; |
1da177e4 LT |
936 | |
937 | unsigned long sparc64_get_clock_tick(unsigned int cpu) | |
938 | { | |
939 | struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); | |
940 | ||
941 | if (ft->clock_tick_ref) | |
942 | return ft->clock_tick_ref; | |
943 | return cpu_data(cpu).clock_tick; | |
944 | } | |
945 | ||
946 | #ifdef CONFIG_CPU_FREQ | |
947 | ||
948 | static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val, | |
949 | void *data) | |
950 | { | |
951 | struct cpufreq_freqs *freq = data; | |
952 | unsigned int cpu = freq->cpu; | |
953 | struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); | |
954 | ||
955 | if (!ft->ref_freq) { | |
956 | ft->ref_freq = freq->old; | |
1da177e4 LT |
957 | ft->clock_tick_ref = cpu_data(cpu).clock_tick; |
958 | } | |
959 | if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || | |
960 | (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) || | |
961 | (val == CPUFREQ_RESUMECHANGE)) { | |
1da177e4 LT |
962 | cpu_data(cpu).clock_tick = |
963 | cpufreq_scale(ft->clock_tick_ref, | |
964 | ft->ref_freq, | |
965 | freq->new); | |
966 | } | |
967 | ||
968 | return 0; | |
969 | } | |
970 | ||
971 | static struct notifier_block sparc64_cpufreq_notifier_block = { | |
972 | .notifier_call = sparc64_cpufreq_notifier | |
973 | }; | |
974 | ||
975 | #endif /* CONFIG_CPU_FREQ */ | |
976 | ||
977 | static struct time_interpolator sparc64_cpu_interpolator = { | |
978 | .source = TIME_SOURCE_CPU, | |
979 | .shift = 16, | |
980 | .mask = 0xffffffffffffffffLL | |
981 | }; | |
982 | ||
983 | /* The quotient formula is taken from the IA64 port. */ | |
e17ba8f5 | 984 | #define SPARC64_NSEC_PER_CYC_SHIFT 10UL |
1da177e4 LT |
985 | void __init time_init(void) |
986 | { | |
987 | unsigned long clock = sparc64_init_timers(); | |
988 | ||
989 | sparc64_cpu_interpolator.frequency = clock; | |
990 | register_time_interpolator(&sparc64_cpu_interpolator); | |
991 | ||
992 | /* Now that the interpolator is registered, it is | |
993 | * safe to start the timer ticking. | |
994 | */ | |
fd0504c3 | 995 | sparc64_start_timers(); |
1da177e4 LT |
996 | |
997 | timer_ticks_per_nsec_quotient = | |
998 | (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) + | |
999 | (clock / 2)) / clock); | |
1000 | ||
1001 | #ifdef CONFIG_CPU_FREQ | |
1002 | cpufreq_register_notifier(&sparc64_cpufreq_notifier_block, | |
1003 | CPUFREQ_TRANSITION_NOTIFIER); | |
1004 | #endif | |
1005 | } | |
1006 | ||
1007 | unsigned long long sched_clock(void) | |
1008 | { | |
1009 | unsigned long ticks = tick_ops->get_tick(); | |
1010 | ||
1011 | return (ticks * timer_ticks_per_nsec_quotient) | |
1012 | >> SPARC64_NSEC_PER_CYC_SHIFT; | |
1013 | } | |
1014 | ||
1015 | static int set_rtc_mmss(unsigned long nowtime) | |
1016 | { | |
1017 | int real_seconds, real_minutes, chip_minutes; | |
ef0299bf | 1018 | void __iomem *mregs = mstk48t02_regs; |
1da177e4 LT |
1019 | #ifdef CONFIG_PCI |
1020 | unsigned long dregs = ds1287_regs; | |
1021 | #else | |
1022 | unsigned long dregs = 0UL; | |
1023 | #endif | |
1024 | unsigned long flags; | |
1025 | u8 tmp; | |
1026 | ||
1027 | /* | |
1028 | * Not having a register set can lead to trouble. | |
1029 | * Also starfire doesn't have a tod clock. | |
1030 | */ | |
1031 | if (!mregs && !dregs) | |
1032 | return -1; | |
1033 | ||
1034 | if (mregs) { | |
1035 | spin_lock_irqsave(&mostek_lock, flags); | |
1036 | ||
1037 | /* Read the current RTC minutes. */ | |
1038 | tmp = mostek_read(mregs + MOSTEK_CREG); | |
1039 | tmp |= MSTK_CREG_READ; | |
1040 | mostek_write(mregs + MOSTEK_CREG, tmp); | |
1041 | ||
1042 | chip_minutes = MSTK_REG_MIN(mregs); | |
1043 | ||
1044 | tmp = mostek_read(mregs + MOSTEK_CREG); | |
1045 | tmp &= ~MSTK_CREG_READ; | |
1046 | mostek_write(mregs + MOSTEK_CREG, tmp); | |
1047 | ||
1048 | /* | |
1049 | * since we're only adjusting minutes and seconds, | |
1050 | * don't interfere with hour overflow. This avoids | |
1051 | * messing with unknown time zones but requires your | |
1052 | * RTC not to be off by more than 15 minutes | |
1053 | */ | |
1054 | real_seconds = nowtime % 60; | |
1055 | real_minutes = nowtime / 60; | |
1056 | if (((abs(real_minutes - chip_minutes) + 15)/30) & 1) | |
1057 | real_minutes += 30; /* correct for half hour time zone */ | |
1058 | real_minutes %= 60; | |
1059 | ||
1060 | if (abs(real_minutes - chip_minutes) < 30) { | |
1061 | tmp = mostek_read(mregs + MOSTEK_CREG); | |
1062 | tmp |= MSTK_CREG_WRITE; | |
1063 | mostek_write(mregs + MOSTEK_CREG, tmp); | |
1064 | ||
1065 | MSTK_SET_REG_SEC(mregs,real_seconds); | |
1066 | MSTK_SET_REG_MIN(mregs,real_minutes); | |
1067 | ||
1068 | tmp = mostek_read(mregs + MOSTEK_CREG); | |
1069 | tmp &= ~MSTK_CREG_WRITE; | |
1070 | mostek_write(mregs + MOSTEK_CREG, tmp); | |
1071 | ||
1072 | spin_unlock_irqrestore(&mostek_lock, flags); | |
1073 | ||
1074 | return 0; | |
1075 | } else { | |
1076 | spin_unlock_irqrestore(&mostek_lock, flags); | |
1077 | ||
1078 | return -1; | |
1079 | } | |
1080 | } else { | |
1081 | int retval = 0; | |
1082 | unsigned char save_control, save_freq_select; | |
1083 | ||
1084 | /* Stolen from arch/i386/kernel/time.c, see there for | |
1085 | * credits and descriptive comments. | |
1086 | */ | |
1087 | spin_lock_irqsave(&rtc_lock, flags); | |
1088 | save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */ | |
1089 | CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); | |
1090 | ||
1091 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */ | |
1092 | CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); | |
1093 | ||
1094 | chip_minutes = CMOS_READ(RTC_MINUTES); | |
1095 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) | |
1096 | BCD_TO_BIN(chip_minutes); | |
1097 | real_seconds = nowtime % 60; | |
1098 | real_minutes = nowtime / 60; | |
1099 | if (((abs(real_minutes - chip_minutes) + 15)/30) & 1) | |
1100 | real_minutes += 30; | |
1101 | real_minutes %= 60; | |
1102 | ||
1103 | if (abs(real_minutes - chip_minutes) < 30) { | |
1104 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | |
1105 | BIN_TO_BCD(real_seconds); | |
1106 | BIN_TO_BCD(real_minutes); | |
1107 | } | |
1108 | CMOS_WRITE(real_seconds,RTC_SECONDS); | |
1109 | CMOS_WRITE(real_minutes,RTC_MINUTES); | |
1110 | } else { | |
1111 | printk(KERN_WARNING | |
1112 | "set_rtc_mmss: can't update from %d to %d\n", | |
1113 | chip_minutes, real_minutes); | |
1114 | retval = -1; | |
1115 | } | |
1116 | ||
1117 | CMOS_WRITE(save_control, RTC_CONTROL); | |
1118 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); | |
1119 | spin_unlock_irqrestore(&rtc_lock, flags); | |
1120 | ||
1121 | return retval; | |
1122 | } | |
1123 | } | |
8ba706a9 DM |
1124 | |
1125 | #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */ | |
1126 | static unsigned char mini_rtc_status; /* bitmapped status byte. */ | |
1127 | ||
1128 | /* months start at 0 now */ | |
1129 | static unsigned char days_in_mo[] = | |
1130 | {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}; | |
1131 | ||
1132 | #define FEBRUARY 2 | |
1133 | #define STARTOFTIME 1970 | |
1134 | #define SECDAY 86400L | |
1135 | #define SECYR (SECDAY * 365) | |
1136 | #define leapyear(year) ((year) % 4 == 0 && \ | |
1137 | ((year) % 100 != 0 || (year) % 400 == 0)) | |
1138 | #define days_in_year(a) (leapyear(a) ? 366 : 365) | |
1139 | #define days_in_month(a) (month_days[(a) - 1]) | |
1140 | ||
1141 | static int month_days[12] = { | |
1142 | 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 | |
1143 | }; | |
1144 | ||
1145 | /* | |
1146 | * This only works for the Gregorian calendar - i.e. after 1752 (in the UK) | |
1147 | */ | |
1148 | static void GregorianDay(struct rtc_time * tm) | |
1149 | { | |
1150 | int leapsToDate; | |
1151 | int lastYear; | |
1152 | int day; | |
1153 | int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 }; | |
1154 | ||
1155 | lastYear = tm->tm_year - 1; | |
1156 | ||
1157 | /* | |
1158 | * Number of leap corrections to apply up to end of last year | |
1159 | */ | |
1160 | leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400; | |
1161 | ||
1162 | /* | |
1163 | * This year is a leap year if it is divisible by 4 except when it is | |
1164 | * divisible by 100 unless it is divisible by 400 | |
1165 | * | |
1166 | * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was | |
1167 | */ | |
1168 | day = tm->tm_mon > 2 && leapyear(tm->tm_year); | |
1169 | ||
1170 | day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] + | |
1171 | tm->tm_mday; | |
1172 | ||
1173 | tm->tm_wday = day % 7; | |
1174 | } | |
1175 | ||
1176 | static void to_tm(int tim, struct rtc_time *tm) | |
1177 | { | |
1178 | register int i; | |
1179 | register long hms, day; | |
1180 | ||
1181 | day = tim / SECDAY; | |
1182 | hms = tim % SECDAY; | |
1183 | ||
1184 | /* Hours, minutes, seconds are easy */ | |
1185 | tm->tm_hour = hms / 3600; | |
1186 | tm->tm_min = (hms % 3600) / 60; | |
1187 | tm->tm_sec = (hms % 3600) % 60; | |
1188 | ||
1189 | /* Number of years in days */ | |
1190 | for (i = STARTOFTIME; day >= days_in_year(i); i++) | |
1191 | day -= days_in_year(i); | |
1192 | tm->tm_year = i; | |
1193 | ||
1194 | /* Number of months in days left */ | |
1195 | if (leapyear(tm->tm_year)) | |
1196 | days_in_month(FEBRUARY) = 29; | |
1197 | for (i = 1; day >= days_in_month(i); i++) | |
1198 | day -= days_in_month(i); | |
1199 | days_in_month(FEBRUARY) = 28; | |
1200 | tm->tm_mon = i; | |
1201 | ||
1202 | /* Days are what is left over (+1) from all that. */ | |
1203 | tm->tm_mday = day + 1; | |
1204 | ||
1205 | /* | |
1206 | * Determine the day of week | |
1207 | */ | |
1208 | GregorianDay(tm); | |
1209 | } | |
1210 | ||
1211 | /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970, | |
1212 | * aka Unix time. So we have to convert to/from rtc_time. | |
1213 | */ | |
1214 | static inline void mini_get_rtc_time(struct rtc_time *time) | |
1215 | { | |
1216 | unsigned long flags; | |
1217 | u32 seconds; | |
1218 | ||
1219 | spin_lock_irqsave(&rtc_lock, flags); | |
1220 | seconds = 0; | |
1221 | if (this_is_starfire) | |
1222 | seconds = starfire_get_time(); | |
1223 | else if (tlb_type == hypervisor) | |
1224 | seconds = hypervisor_get_time(); | |
1225 | spin_unlock_irqrestore(&rtc_lock, flags); | |
1226 | ||
1227 | to_tm(seconds, time); | |
c4f8ef77 DM |
1228 | time->tm_year -= 1900; |
1229 | time->tm_mon -= 1; | |
8ba706a9 DM |
1230 | } |
1231 | ||
1232 | static inline int mini_set_rtc_time(struct rtc_time *time) | |
1233 | { | |
1234 | u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1, | |
1235 | time->tm_mday, time->tm_hour, | |
1236 | time->tm_min, time->tm_sec); | |
1237 | unsigned long flags; | |
1238 | int err; | |
1239 | ||
1240 | spin_lock_irqsave(&rtc_lock, flags); | |
1241 | err = -ENODEV; | |
1242 | if (this_is_starfire) | |
1243 | err = starfire_set_time(seconds); | |
1244 | else if (tlb_type == hypervisor) | |
1245 | err = hypervisor_set_time(seconds); | |
1246 | spin_unlock_irqrestore(&rtc_lock, flags); | |
1247 | ||
1248 | return err; | |
1249 | } | |
1250 | ||
1251 | static int mini_rtc_ioctl(struct inode *inode, struct file *file, | |
1252 | unsigned int cmd, unsigned long arg) | |
1253 | { | |
1254 | struct rtc_time wtime; | |
1255 | void __user *argp = (void __user *)arg; | |
1256 | ||
1257 | switch (cmd) { | |
1258 | ||
1259 | case RTC_PLL_GET: | |
1260 | return -EINVAL; | |
1261 | ||
1262 | case RTC_PLL_SET: | |
1263 | return -EINVAL; | |
1264 | ||
1265 | case RTC_UIE_OFF: /* disable ints from RTC updates. */ | |
1266 | return 0; | |
1267 | ||
1268 | case RTC_UIE_ON: /* enable ints for RTC updates. */ | |
1269 | return -EINVAL; | |
1270 | ||
1271 | case RTC_RD_TIME: /* Read the time/date from RTC */ | |
1272 | /* this doesn't get week-day, who cares */ | |
1273 | memset(&wtime, 0, sizeof(wtime)); | |
1274 | mini_get_rtc_time(&wtime); | |
1275 | ||
1276 | return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0; | |
1277 | ||
1278 | case RTC_SET_TIME: /* Set the RTC */ | |
1279 | { | |
1280 | int year; | |
1281 | unsigned char leap_yr; | |
1282 | ||
1283 | if (!capable(CAP_SYS_TIME)) | |
1284 | return -EACCES; | |
1285 | ||
1286 | if (copy_from_user(&wtime, argp, sizeof(wtime))) | |
1287 | return -EFAULT; | |
1288 | ||
1289 | year = wtime.tm_year + 1900; | |
1290 | leap_yr = ((!(year % 4) && (year % 100)) || | |
1291 | !(year % 400)); | |
1292 | ||
1293 | if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || (wtime.tm_mday < 1)) | |
1294 | return -EINVAL; | |
1295 | ||
1296 | if (wtime.tm_mday < 0 || wtime.tm_mday > | |
1297 | (days_in_mo[wtime.tm_mon] + ((wtime.tm_mon == 1) && leap_yr))) | |
1298 | return -EINVAL; | |
1299 | ||
1300 | if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 || | |
1301 | wtime.tm_min < 0 || wtime.tm_min >= 60 || | |
1302 | wtime.tm_sec < 0 || wtime.tm_sec >= 60) | |
1303 | return -EINVAL; | |
1304 | ||
1305 | return mini_set_rtc_time(&wtime); | |
1306 | } | |
1307 | } | |
1308 | ||
1309 | return -EINVAL; | |
1310 | } | |
1311 | ||
1312 | static int mini_rtc_open(struct inode *inode, struct file *file) | |
1313 | { | |
1314 | if (mini_rtc_status & RTC_IS_OPEN) | |
1315 | return -EBUSY; | |
1316 | ||
1317 | mini_rtc_status |= RTC_IS_OPEN; | |
1318 | ||
1319 | return 0; | |
1320 | } | |
1321 | ||
1322 | static int mini_rtc_release(struct inode *inode, struct file *file) | |
1323 | { | |
1324 | mini_rtc_status &= ~RTC_IS_OPEN; | |
1325 | return 0; | |
1326 | } | |
1327 | ||
1328 | ||
1329 | static struct file_operations mini_rtc_fops = { | |
1330 | .owner = THIS_MODULE, | |
1331 | .ioctl = mini_rtc_ioctl, | |
1332 | .open = mini_rtc_open, | |
1333 | .release = mini_rtc_release, | |
1334 | }; | |
1335 | ||
1336 | static struct miscdevice rtc_mini_dev = | |
1337 | { | |
1338 | .minor = RTC_MINOR, | |
1339 | .name = "rtc", | |
1340 | .fops = &mini_rtc_fops, | |
1341 | }; | |
1342 | ||
1343 | static int __init rtc_mini_init(void) | |
1344 | { | |
1345 | int retval; | |
1346 | ||
1347 | if (tlb_type != hypervisor && !this_is_starfire) | |
1348 | return -ENODEV; | |
1349 | ||
1350 | printk(KERN_INFO "Mini RTC Driver\n"); | |
1351 | ||
1352 | retval = misc_register(&rtc_mini_dev); | |
1353 | if (retval < 0) | |
1354 | return retval; | |
1355 | ||
1356 | return 0; | |
1357 | } | |
1358 | ||
1359 | static void __exit rtc_mini_exit(void) | |
1360 | { | |
1361 | misc_deregister(&rtc_mini_dev); | |
1362 | } | |
1363 | ||
1364 | ||
1365 | module_init(rtc_mini_init); | |
1366 | module_exit(rtc_mini_exit); |