[deliverable/linux.git] / arch / tile / kernel / traps.c

/*
 * Copyright 2010 Tilera Corporation. All Rights Reserved.
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License
 *   as published by the Free Software Foundation, version 2.
 *
 *   This program is distributed in the hope that it will be useful, but
 *   WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 *   NON INFRINGEMENT.  See the GNU General Public License for
 *   more details.
 */

#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/kprobes.h>
#include <linux/kdebug.h>
#include <linux/module.h>
#include <linux/reboot.h>
#include <linux/uaccess.h>
#include <linux/ptrace.h>
#include <asm/stack.h>
#include <asm/traps.h>
#include <asm/setup.h>

#include <arch/interrupts.h>
#include <arch/spr_def.h>
#include <arch/opcode.h>

void __init trap_init(void)
{
	/* Nothing needed here since we link code at .intrpt */
}

int unaligned_fixup = 1;

static int __init setup_unaligned_fixup(char *str)
{
	/*
	 * Say "=-1" to completely disable it.  If you just do "=0", we
	 * will still parse the instruction, then fire a SIGBUS with
	 * the correct address from inside the single_step code.
	 */
	if (kstrtoint(str, 0, &unaligned_fixup) != 0)
		return 0;

	pr_info("Fixups for unaligned data accesses are %s\n",
	       unaligned_fixup >= 0 ?
	       (unaligned_fixup ? "enabled" : "disabled") :
	       "completely disabled");
	return 1;
}
__setup("unaligned_fixup=", setup_unaligned_fixup);

#if CHIP_HAS_TILE_DMA()

static int dma_disabled;

static int __init nodma(char *str)
{
	pr_info("User-space DMA is disabled\n");
	dma_disabled = 1;
	return 1;
}
__setup("nodma", nodma);

/* How to decode SPR_GPV_REASON */
#define IRET_ERROR (1U << 31)
#define MT_ERROR   (1U << 30)
#define MF_ERROR   (1U << 29)
#define SPR_INDEX  ((1U << 15) - 1)
#define SPR_MPL_SHIFT  9  /* starting bit position for MPL encoded in SPR */

/*
 * See if this GPV is just to notify the kernel of SPR use and we can
 * retry the user instruction after adjusting some MPLs suitably.
 */
static int retry_gpv(unsigned int gpv_reason)
{
	int mpl;

	if (gpv_reason & IRET_ERROR)
		return 0;

	BUG_ON((gpv_reason & (MT_ERROR|MF_ERROR)) == 0);
	mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
	if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
		/* User is turning on DMA. Allow it and retry. */
		printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
		       current->pid, current->comm);
		BUG_ON(current->thread.tile_dma_state.enabled);
		current->thread.tile_dma_state.enabled = 1;
		grant_dma_mpls();
		return 1;
	}

	return 0;
}

#endif /* CHIP_HAS_TILE_DMA() */

extern tile_bundle_bits bpt_code;

asm(".pushsection .rodata.bpt_code,\"a\";"
    ".align 8;"
    "bpt_code: bpt;"
    ".size bpt_code,.-bpt_code;"
    ".popsection");

static int special_ill(tile_bundle_bits bundle, int *sigp, int *codep)
{
	int sig, code, maxcode;

	if (bundle == bpt_code) {
		*sigp = SIGTRAP;
		*codep = TRAP_BRKPT;
		return 1;
	}

	/* If it's a "raise" bundle, then "ill" must be in pipe X1. */
#ifdef __tilegx__
	if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
		return 0;
	if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
		return 0;
	if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
		return 0;
	if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
		return 0;
#else
	if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
		return 0;
	if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
		return 0;
	if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
		return 0;
	if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
		return 0;
#endif

	/* Check that the magic distinguishers are set to mean "raise". */
	if (get_Dest_X1(bundle) != 29 || get_SrcA_X1(bundle) != 37)
		return 0;

	/* There must be an "addli zero, zero, VAL" in X0. */
	if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
		return 0;
	if (get_Dest_X0(bundle) != TREG_ZERO)
		return 0;
	if (get_SrcA_X0(bundle) != TREG_ZERO)
		return 0;

	/*
	 * Validate the proposed signal number and si_code value.
	 * Note that we embed these in the static instruction itself
	 * so that we perturb the register state as little as possible
	 * at the time of the actual fault; it's unlikely you'd ever
	 * need to dynamically choose which kind of fault to raise
	 * from user space.
	 */
	sig = get_Imm16_X0(bundle) & 0x3f;
	switch (sig) {
	case SIGILL:
		maxcode = NSIGILL;
		break;
	case SIGFPE:
		maxcode = NSIGFPE;
		break;
	case SIGSEGV:
		maxcode = NSIGSEGV;
		break;
	case SIGBUS:
		maxcode = NSIGBUS;
		break;
	case SIGTRAP:
		maxcode = NSIGTRAP;
		break;
	default:
		return 0;
	}
	code = (get_Imm16_X0(bundle) >> 6) & 0xf;
	if (code <= 0 || code > maxcode)
		return 0;

	/* Make it the requested signal. */
	*sigp = sig;
	*codep = code | __SI_FAULT;
	return 1;
}

static const char *const int_name[] = {
	[INT_MEM_ERROR] = "Memory error",
	[INT_ILL] = "Illegal instruction",
	[INT_GPV] = "General protection violation",
	[INT_UDN_ACCESS] = "UDN access",
	[INT_IDN_ACCESS] = "IDN access",
#if CHIP_HAS_SN()
	[INT_SN_ACCESS] = "SN access",
#endif
	[INT_SWINT_3] = "Software interrupt 3",
	[INT_SWINT_2] = "Software interrupt 2",
	[INT_SWINT_0] = "Software interrupt 0",
	[INT_UNALIGN_DATA] = "Unaligned data",
	[INT_DOUBLE_FAULT] = "Double fault",
#ifdef __tilegx__
	[INT_ILL_TRANS] = "Illegal virtual address",
#endif
};

static int do_bpt(struct pt_regs *regs)
{
	unsigned long bundle, bcode, bpt;

	bundle = *(unsigned long *)instruction_pointer(regs);

	/*
	 * bpt shoule be { bpt; nop }, which is 0x286a44ae51485000ULL.
	 * we encode the unused least significant bits for other purpose.
	 */
	bpt = bundle & ~((1ULL << 12) - 1);
	if (bpt != TILE_BPT_BUNDLE)
		return 0;

	bcode = bundle & ((1ULL << 12) - 1);
	/*
	 * notify the kprobe handlers, if instruction is likely to
	 * pertain to them.
	 */
	switch (bcode) {
	/* breakpoint_insn */
	case 0:
		notify_die(DIE_BREAK, "debug", regs, bundle,
			INT_ILL, SIGTRAP);
		break;
	/* compiled_bpt */
	case DIE_COMPILED_BPT:
		notify_die(DIE_COMPILED_BPT, "debug", regs, bundle,
			INT_ILL, SIGTRAP);
		break;
	/* breakpoint2_insn */
	case DIE_SSTEPBP:
		notify_die(DIE_SSTEPBP, "single_step", regs, bundle,
			INT_ILL, SIGTRAP);
		break;
	default:
		return 0;
	}

	return 1;
}

void __kprobes do_trap(struct pt_regs *regs, int fault_num,
		       unsigned long reason)
{
	siginfo_t info = { 0 };
	int signo, code;
	unsigned long address = 0;
	tile_bundle_bits instr;
	int is_kernel = !user_mode(regs);

	/* Handle breakpoints, etc. */
	if (is_kernel && fault_num == INT_ILL && do_bpt(regs))
		return;

	/* Re-enable interrupts, if they were previously enabled. */
	if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
		local_irq_enable();

	/*
	 * If it hits in kernel mode and we can't fix it up, just exit the
	 * current process and hope for the best.
	 */
	if (is_kernel) {
		const char *name;
		char buf[100];
		if (fixup_exception(regs))  /* ILL_TRANS or UNALIGN_DATA */
			return;
		if (fault_num >= 0 &&
		    fault_num < sizeof(int_name)/sizeof(int_name[0]) &&
		    int_name[fault_num] != NULL)
			name = int_name[fault_num];
		else
			name = "Unknown interrupt";
		if (fault_num == INT_GPV)
			snprintf(buf, sizeof(buf), "; GPV_REASON %#lx", reason);
#ifdef __tilegx__
		else if (fault_num == INT_ILL_TRANS)
			snprintf(buf, sizeof(buf), "; address %#lx", reason);
#endif
		else
			buf[0] = '\0';
		pr_alert("Kernel took bad trap %d (%s) at PC %#lx%s\n",
			 fault_num, name, regs->pc, buf);
		show_regs(regs);
		do_exit(SIGKILL);  /* FIXME: implement i386 die() */
		return;
	}

	switch (fault_num) {
	case INT_MEM_ERROR:
		signo = SIGBUS;
		code = BUS_OBJERR;
		break;
	case INT_ILL:
		if (copy_from_user(&instr, (void __user *)regs->pc,
				   sizeof(instr))) {
			pr_err("Unreadable instruction for INT_ILL:"
			       " %#lx\n", regs->pc);
			do_exit(SIGKILL);
			return;
		}
		if (!special_ill(instr, &signo, &code)) {
			signo = SIGILL;
			code = ILL_ILLOPC;
		}
		address = regs->pc;
		break;
	case INT_GPV:
#if CHIP_HAS_TILE_DMA()
		if (retry_gpv(reason))
			return;
#endif
		/*FALLTHROUGH*/
	case INT_UDN_ACCESS:
	case INT_IDN_ACCESS:
#if CHIP_HAS_SN()
	case INT_SN_ACCESS:
#endif
		signo = SIGILL;
		code = ILL_PRVREG;
		address = regs->pc;
		break;
	case INT_SWINT_3:
	case INT_SWINT_2:
	case INT_SWINT_0:
		signo = SIGILL;
		code = ILL_ILLTRP;
		address = regs->pc;
		break;
	case INT_UNALIGN_DATA:
#ifndef __tilegx__  /* Emulated support for single step debugging */
		if (unaligned_fixup >= 0) {
			struct single_step_state *state =
				current_thread_info()->step_state;
			if (!state ||
			    (void __user *)(regs->pc) != state->buffer) {
				single_step_once(regs);
				return;
			}
		}
#endif
		signo = SIGBUS;
		code = BUS_ADRALN;
		address = 0;
		break;
	case INT_DOUBLE_FAULT:
		/*
		 * For double fault, "reason" is actually passed as
		 * SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
		 * we can provide the original fault number rather than
		 * the uninteresting "INT_DOUBLE_FAULT" so the user can
		 * learn what actually struck while PL0 ICS was set.
		 */
		fault_num = reason;
		signo = SIGILL;
		code = ILL_DBLFLT;
		address = regs->pc;
		break;
#ifdef __tilegx__
	case INT_ILL_TRANS: {
		/* Avoid a hardware erratum with the return address stack. */
		fill_ra_stack();

		signo = SIGSEGV;
		address = reason;
		code = SEGV_MAPERR;
		break;
	}
#endif
	default:
		panic("Unexpected do_trap interrupt number %d", fault_num);
		return;
	}

	info.si_signo = signo;
	info.si_code = code;
	info.si_addr = (void __user *)address;
	if (signo == SIGILL)
		info.si_trapno = fault_num;
	if (signo != SIGTRAP)
		trace_unhandled_signal("trap", regs, address, signo);
	force_sig_info(signo, &info, current);
}

void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
{
	_dump_stack(dummy, pc, lr, sp, r52);
	pr_emerg("Double fault: exiting\n");
	machine_halt();
}
Commit	Line	Data
867e359b CM	1	/*
	2	* Copyright 2010 Tilera Corporation. All Rights Reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation, version 2.
	7	*
	8	* This program is distributed in the hope that it will be useful, but
	9	* WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
	11	* NON INFRINGEMENT. See the GNU General Public License for
	12	* more details.
	13	*/
	14
	15	#include <linux/sched.h>
	16	#include <linux/kernel.h>
	17	#include <linux/kprobes.h>
3fa17c39	18	#include <linux/kdebug.h>
867e359b CM	19	#include <linux/module.h>
	20	#include <linux/reboot.h>
	21	#include <linux/uaccess.h>
	22	#include <linux/ptrace.h>
0707ad30 CM	23	#include <asm/stack.h>
0707ad30 CM	24	#include <asm/traps.h>
bd119c69	25	#include <asm/setup.h>
867e359b CM	26
	27	#include <arch/interrupts.h>
	28	#include <arch/spr_def.h>
eb7c792d	29	#include <arch/opcode.h>
867e359b CM	30
	31	void __init trap_init(void)
	32	{
acbde1db	33	/* Nothing needed here since we link code at .intrpt */
867e359b CM	34	}
	35
	36	int unaligned_fixup = 1;
	37
	38	static int __init setup_unaligned_fixup(char *str)
	39	{
	40	/*
	41	* Say "=-1" to completely disable it. If you just do "=0", we
	42	* will still parse the instruction, then fire a SIGBUS with
	43	* the correct address from inside the single_step code.
	44	*/
b2dfa048	45	if (kstrtoint(str, 0, &unaligned_fixup) != 0)
867e359b	46	return 0;
b2dfa048	47
0707ad30	48	pr_info("Fixups for unaligned data accesses are %s\n",
867e359b CM	49	unaligned_fixup >= 0 ?
	50	(unaligned_fixup ? "enabled" : "disabled") :
	51	"completely disabled");
	52	return 1;
	53	}
	54	__setup("unaligned_fixup=", setup_unaligned_fixup);
	55
	56	#if CHIP_HAS_TILE_DMA()
	57
	58	static int dma_disabled;
	59
	60	static int __init nodma(char *str)
	61	{
0707ad30	62	pr_info("User-space DMA is disabled\n");
867e359b CM	63	dma_disabled = 1;
	64	return 1;
	65	}
	66	__setup("nodma", nodma);
	67
	68	/* How to decode SPR_GPV_REASON */
	69	#define IRET_ERROR (1U << 31)
	70	#define MT_ERROR (1U << 30)
	71	#define MF_ERROR (1U << 29)
	72	#define SPR_INDEX ((1U << 15) - 1)
	73	#define SPR_MPL_SHIFT 9 /* starting bit position for MPL encoded in SPR */
	74
	75	/*
	76	* See if this GPV is just to notify the kernel of SPR use and we can
	77	* retry the user instruction after adjusting some MPLs suitably.
	78	*/
	79	static int retry_gpv(unsigned int gpv_reason)
	80	{
	81	int mpl;
	82
	83	if (gpv_reason & IRET_ERROR)
	84	return 0;
	85
	86	BUG_ON((gpv_reason & (MT_ERROR\|MF_ERROR)) == 0);
	87	mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
	88	if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
	89	/* User is turning on DMA. Allow it and retry. */
	90	printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
	91	current->pid, current->comm);
	92	BUG_ON(current->thread.tile_dma_state.enabled);
	93	current->thread.tile_dma_state.enabled = 1;
	94	grant_dma_mpls();
	95	return 1;
	96	}
	97
	98	return 0;
	99	}
	100
	101	#endif /* CHIP_HAS_TILE_DMA() */
	102
a0099303	103	extern tile_bundle_bits bpt_code;
0707ad30 CM	104
	105	asm(".pushsection .rodata.bpt_code,\"a\";"
	106	".align 8;"
	107	"bpt_code: bpt;"
	108	".size bpt_code,.-bpt_code;"
	109	".popsection");
	110
a0099303	111	static int special_ill(tile_bundle_bits bundle, int sigp, int codep)
0707ad30 CM	112	{
	113	int sig, code, maxcode;
	114
	115	if (bundle == bpt_code) {
	116	*sigp = SIGTRAP;
	117	*codep = TRAP_BRKPT;
	118	return 1;
	119	}
	120
	121	/* If it's a "raise" bundle, then "ill" must be in pipe X1. */
	122	#ifdef __tilegx__
	123	if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
	124	return 0;
1fcbe027 CM	125	if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
	126	return 0;
	127	if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
0707ad30 CM	128	return 0;
	129	if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
	130	return 0;
	131	#else
eb7c792d	132	if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
0707ad30 CM	133	return 0;
	134	if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
	135	return 0;
	136	if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
	137	return 0;
	138	if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
	139	return 0;
	140	#endif
	141
	142	/* Check that the magic distinguishers are set to mean "raise". */
	143	if (get_Dest_X1(bundle) != 29 \|\| get_SrcA_X1(bundle) != 37)
	144	return 0;
	145
	146	/* There must be an "addli zero, zero, VAL" in X0. */
	147	if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
	148	return 0;
	149	if (get_Dest_X0(bundle) != TREG_ZERO)
	150	return 0;
	151	if (get_SrcA_X0(bundle) != TREG_ZERO)
	152	return 0;
	153
	154	/*
	155	* Validate the proposed signal number and si_code value.
	156	* Note that we embed these in the static instruction itself
	157	* so that we perturb the register state as little as possible
	158	* at the time of the actual fault; it's unlikely you'd ever
	159	* need to dynamically choose which kind of fault to raise
	160	* from user space.
	161	*/
	162	sig = get_Imm16_X0(bundle) & 0x3f;
	163	switch (sig) {
	164	case SIGILL:
	165	maxcode = NSIGILL;
	166	break;
	167	case SIGFPE:
	168	maxcode = NSIGFPE;
	169	break;
	170	case SIGSEGV:
	171	maxcode = NSIGSEGV;
	172	break;
	173	case SIGBUS:
	174	maxcode = NSIGBUS;
	175	break;
	176	case SIGTRAP:
	177	maxcode = NSIGTRAP;
	178	break;
	179	default:
	180	return 0;
	181	}
	182	code = (get_Imm16_X0(bundle) >> 6) & 0xf;
	183	if (code <= 0 \|\| code > maxcode)
	184	return 0;
	185
	186	/* Make it the requested signal. */
	187	*sigp = sig;
	188	*codep = code \| __SI_FAULT;
	189	return 1;
	190	}
	191
c6f696f6 CM	192	static const char *const int_name[] = {
	193	[INT_MEM_ERROR] = "Memory error",
	194	[INT_ILL] = "Illegal instruction",
	195	[INT_GPV] = "General protection violation",
	196	[INT_UDN_ACCESS] = "UDN access",
	197	[INT_IDN_ACCESS] = "IDN access",
	198	#if CHIP_HAS_SN()
	199	[INT_SN_ACCESS] = "SN access",
	200	#endif
	201	[INT_SWINT_3] = "Software interrupt 3",
	202	[INT_SWINT_2] = "Software interrupt 2",
	203	[INT_SWINT_0] = "Software interrupt 0",
	204	[INT_UNALIGN_DATA] = "Unaligned data",
	205	[INT_DOUBLE_FAULT] = "Double fault",
	206	#ifdef __tilegx__
	207	[INT_ILL_TRANS] = "Illegal virtual address",
	208	#endif
	209	};
	210
3fa17c39 TL	211	static int do_bpt(struct pt_regs *regs)
	212	{
	213	unsigned long bundle, bcode, bpt;
	214
	215	bundle = (unsigned long )instruction_pointer(regs);
	216
	217	/*
	218	* bpt shoule be { bpt; nop }, which is 0x286a44ae51485000ULL.
	219	* we encode the unused least significant bits for other purpose.
	220	*/
	221	bpt = bundle & ~((1ULL << 12) - 1);
	222	if (bpt != TILE_BPT_BUNDLE)
	223	return 0;
	224
	225	bcode = bundle & ((1ULL << 12) - 1);
	226	/*
	227	* notify the kprobe handlers, if instruction is likely to
	228	* pertain to them.
	229	*/
	230	switch (bcode) {
	231	/* breakpoint_insn */
	232	case 0:
	233	notify_die(DIE_BREAK, "debug", regs, bundle,
	234	INT_ILL, SIGTRAP);
	235	break;
8157107b CM	236	/* compiled_bpt */
	237	case DIE_COMPILED_BPT:
	238	notify_die(DIE_COMPILED_BPT, "debug", regs, bundle,
	239	INT_ILL, SIGTRAP);
	240	break;
3fa17c39 TL	241	/* breakpoint2_insn */
	242	case DIE_SSTEPBP:
	243	notify_die(DIE_SSTEPBP, "single_step", regs, bundle,
	244	INT_ILL, SIGTRAP);
	245	break;
	246	default:
	247	return 0;
	248	}
	249
	250	return 1;
	251	}
	252
867e359b CM	253	void __kprobes do_trap(struct pt_regs *regs, int fault_num,
	254	unsigned long reason)
	255	{
	256	siginfo_t info = { 0 };
	257	int signo, code;
a714ffff	258	unsigned long address = 0;
a0099303	259	tile_bundle_bits instr;
3fa17c39 TL	260	int is_kernel = !user_mode(regs);
	261
	262	/* Handle breakpoints, etc. */
	263	if (is_kernel && fault_num == INT_ILL && do_bpt(regs))
	264	return;
867e359b	265
70d2b595 CM	266	/* Re-enable interrupts, if they were previously enabled. */
	267	if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
	268	local_irq_enable();
867e359b CM	269
	270	/*
	271	* If it hits in kernel mode and we can't fix it up, just exit the
	272	* current process and hope for the best.
	273	*/
3fa17c39	274	if (is_kernel) {
c6f696f6	275	const char *name;
70d2b595 CM	276	char buf[100];
70d2b595 CM	277	if (fixup_exception(regs)) /* ILL_TRANS or UNALIGN_DATA */
867e359b	278	return;
c6f696f6 CM	279	if (fault_num >= 0 &&
	280	fault_num < sizeof(int_name)/sizeof(int_name[0]) &&
	281	int_name[fault_num] != NULL)
	282	name = int_name[fault_num];
	283	else
	284	name = "Unknown interrupt";
867e359b	285	if (fault_num == INT_GPV)
70d2b595 CM	286	snprintf(buf, sizeof(buf), "; GPV_REASON %#lx", reason);
	287	#ifdef __tilegx__
	288	else if (fault_num == INT_ILL_TRANS)
	289	snprintf(buf, sizeof(buf), "; address %#lx", reason);
	290	#endif
	291	else
	292	buf[0] = '\0';
	293	pr_alert("Kernel took bad trap %d (%s) at PC %#lx%s\n",
	294	fault_num, name, regs->pc, buf);
867e359b CM	295	show_regs(regs);
	296	do_exit(SIGKILL); /* FIXME: implement i386 die() */
	297	return;
	298	}
	299
	300	switch (fault_num) {
a714ffff CM	301	case INT_MEM_ERROR:
	302	signo = SIGBUS;
	303	code = BUS_OBJERR;
	304	break;
867e359b	305	case INT_ILL:
0707ad30 CM	306	if (copy_from_user(&instr, (void __user *)regs->pc,
	307	sizeof(instr))) {
	308	pr_err("Unreadable instruction for INT_ILL:"
867e359b CM	309	" %#lx\n", regs->pc);
	310	do_exit(SIGKILL);
	311	return;
	312	}
0707ad30	313	if (!special_ill(instr, &signo, &code)) {
867e359b CM	314	signo = SIGILL;
	315	code = ILL_ILLOPC;
	316	}
	317	address = regs->pc;
	318	break;
	319	case INT_GPV:
	320	#if CHIP_HAS_TILE_DMA()
	321	if (retry_gpv(reason))
	322	return;
	323	#endif
	324	/FALLTHROUGH/
	325	case INT_UDN_ACCESS:
	326	case INT_IDN_ACCESS:
	327	#if CHIP_HAS_SN()
	328	case INT_SN_ACCESS:
	329	#endif
	330	signo = SIGILL;
	331	code = ILL_PRVREG;
	332	address = regs->pc;
	333	break;
	334	case INT_SWINT_3:
	335	case INT_SWINT_2:
	336	case INT_SWINT_0:
	337	signo = SIGILL;
	338	code = ILL_ILLTRP;
	339	address = regs->pc;
	340	break;
	341	case INT_UNALIGN_DATA:
233325b9	342	#ifndef __tilegx__ /* Emulated support for single step debugging */
867e359b CM	343	if (unaligned_fixup >= 0) {
	344	struct single_step_state *state =
	345	current_thread_info()->step_state;
0707ad30 CM	346	if (!state \|\|
0707ad30 CM	347	(void __user *)(regs->pc) != state->buffer) {
867e359b CM	348	single_step_once(regs);
	349	return;
	350	}
	351	}
	352	#endif
	353	signo = SIGBUS;
	354	code = BUS_ADRALN;
	355	address = 0;
	356	break;
	357	case INT_DOUBLE_FAULT:
	358	/*
	359	* For double fault, "reason" is actually passed as
a78c942d	360	* SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
867e359b CM	361	* we can provide the original fault number rather than
	362	* the uninteresting "INT_DOUBLE_FAULT" so the user can
	363	* learn what actually struck while PL0 ICS was set.
	364	*/
	365	fault_num = reason;
	366	signo = SIGILL;
	367	code = ILL_DBLFLT;
	368	address = regs->pc;
	369	break;
	370	#ifdef __tilegx__
e1723538 CM	371	case INT_ILL_TRANS: {
	372	/* Avoid a hardware erratum with the return address stack. */
	373	fill_ra_stack();
	374
867e359b	375	signo = SIGSEGV;
70d2b595	376	address = reason;
867e359b	377	code = SEGV_MAPERR;
867e359b	378	break;
e1723538	379	}
867e359b CM	380	#endif
	381	default:
	382	panic("Unexpected do_trap interrupt number %d", fault_num);
	383	return;
	384	}
	385
	386	info.si_signo = signo;
	387	info.si_code = code;
0707ad30	388	info.si_addr = (void __user *)address;
867e359b CM	389	if (signo == SIGILL)
867e359b CM	390	info.si_trapno = fault_num;
a714ffff CM	391	if (signo != SIGTRAP)
a714ffff CM	392	trace_unhandled_signal("trap", regs, address, signo);
867e359b CM	393	force_sig_info(signo, &info, current);
	394	}
	395
867e359b CM	396	void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
	397	{
	398	_dump_stack(dummy, pc, lr, sp, r52);
0707ad30	399	pr_emerg("Double fault: exiting\n");
867e359b CM	400	machine_halt();
867e359b CM	401	}