Commit | Line | Data |
---|---|---|
85977376 PBG |
1 | menu "Host processor type and features" |
2 | ||
7a78a172 | 3 | source "arch/x86/Kconfig.cpu" |
85977376 PBG |
4 | |
5 | endmenu | |
6 | ||
c45166be PBG |
7 | config UML_X86 |
8 | bool | |
9 | default y | |
10 | ||
54d67ee2 | 11 | config X86_32 |
e17c6d56 DW |
12 | bool |
13 | default y | |
14 | select HAVE_AOUT | |
54d67ee2 JD |
15 | |
16 | config RWSEM_XCHGADD_ALGORITHM | |
17 | def_bool y | |
18 | ||
c45166be | 19 | config 64BIT |
1da177e4 LT |
20 | bool |
21 | default n | |
22 | ||
1da177e4 | 23 | config 3_LEVEL_PGTABLES |
ce2d2aed | 24 | bool "Three-level pagetables (EXPERIMENTAL)" |
1da177e4 | 25 | default n |
ce2d2aed | 26 | depends on EXPERIMENTAL |
1da177e4 LT |
27 | help |
28 | Three-level pagetables will let UML have more than 4G of physical | |
29 | memory. All the memory that can't be mapped directly will be treated | |
30 | as high memory. | |
31 | ||
ce2d2aed PBG |
32 | However, this it experimental on 32-bit architectures, so if unsure say |
33 | N (on x86-64 it's automatically enabled, instead, as it's safe there). | |
34 | ||
1da177e4 LT |
35 | config ARCH_HAS_SC_SIGNALS |
36 | bool | |
37 | default y | |
38 | ||
39 | config ARCH_REUSE_HOST_VSYSCALL_AREA | |
40 | bool | |
41 | default y | |
f214ef3e AM |
42 | |
43 | config GENERIC_HWEIGHT | |
44 | bool | |
45 | default y |