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10c9c10c G |
1 | /* |
2 | * linux/arch/unicore32/mm/flush.c | |
3 | * | |
4 | * Code specific to PKUnity SoC and UniCore ISA | |
5 | * | |
6 | * Copyright (C) 2001-2010 GUAN Xue-tao | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | #include <linux/module.h> | |
13 | #include <linux/mm.h> | |
14 | #include <linux/pagemap.h> | |
15 | ||
16 | #include <asm/cacheflush.h> | |
10c9c10c G |
17 | #include <asm/tlbflush.h> |
18 | ||
19 | void flush_cache_mm(struct mm_struct *mm) | |
20 | { | |
21 | } | |
22 | ||
23 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | |
24 | unsigned long end) | |
25 | { | |
26 | if (vma->vm_flags & VM_EXEC) | |
27 | __flush_icache_all(); | |
28 | } | |
29 | ||
30 | void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, | |
31 | unsigned long pfn) | |
32 | { | |
33 | } | |
34 | ||
35 | static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | |
36 | unsigned long uaddr, void *kaddr, unsigned long len) | |
37 | { | |
38 | /* VIPT non-aliasing D-cache */ | |
39 | if (vma->vm_flags & VM_EXEC) { | |
40 | unsigned long addr = (unsigned long)kaddr; | |
41 | ||
42 | __cpuc_coherent_kern_range(addr, addr + len); | |
43 | } | |
44 | } | |
45 | ||
46 | /* | |
47 | * Copy user data from/to a page which is mapped into a different | |
48 | * processes address space. Really, we want to allow our "user | |
49 | * space" model to handle this. | |
50 | * | |
51 | * Note that this code needs to run on the current CPU. | |
52 | */ | |
53 | void copy_to_user_page(struct vm_area_struct *vma, struct page *page, | |
54 | unsigned long uaddr, void *dst, const void *src, | |
55 | unsigned long len) | |
56 | { | |
57 | memcpy(dst, src, len); | |
58 | flush_ptrace_access(vma, page, uaddr, dst, len); | |
59 | } | |
60 | ||
61 | void __flush_dcache_page(struct address_space *mapping, struct page *page) | |
62 | { | |
63 | /* | |
64 | * Writeback any data associated with the kernel mapping of this | |
65 | * page. This ensures that data in the physical page is mutually | |
66 | * coherent with the kernels mapping. | |
67 | */ | |
68 | __cpuc_flush_kern_dcache_area(page_address(page), PAGE_SIZE); | |
69 | } | |
70 | ||
71 | /* | |
72 | * Ensure cache coherency between kernel mapping and userspace mapping | |
73 | * of this page. | |
74 | */ | |
75 | void flush_dcache_page(struct page *page) | |
76 | { | |
77 | struct address_space *mapping; | |
78 | ||
79 | /* | |
80 | * The zero page is never written to, so never has any dirty | |
81 | * cache lines, and therefore never needs to be flushed. | |
82 | */ | |
83 | if (page == ZERO_PAGE(0)) | |
84 | return; | |
85 | ||
86 | mapping = page_mapping(page); | |
87 | ||
88 | if (mapping && !mapping_mapped(mapping)) | |
89 | clear_bit(PG_dcache_clean, &page->flags); | |
90 | else { | |
91 | __flush_dcache_page(mapping, page); | |
92 | if (mapping) | |
93 | __flush_icache_all(); | |
94 | set_bit(PG_dcache_clean, &page->flags); | |
95 | } | |
96 | } | |
97 | EXPORT_SYMBOL(flush_dcache_page); |