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56372b0b G |
1 | /* |
2 | * linux/arch/unicore32/mm/mmu.c | |
3 | * | |
4 | * Code specific to PKUnity SoC and UniCore ISA | |
5 | * | |
6 | * Copyright (C) 2001-2010 GUAN Xue-tao | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | #include <linux/module.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/errno.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/mman.h> | |
17 | #include <linux/nodemask.h> | |
18 | #include <linux/memblock.h> | |
19 | #include <linux/fs.h> | |
20 | #include <linux/bootmem.h> | |
21 | #include <linux/io.h> | |
22 | ||
23 | #include <asm/cputype.h> | |
24 | #include <asm/sections.h> | |
25 | #include <asm/setup.h> | |
26 | #include <asm/sizes.h> | |
27 | #include <asm/tlb.h> | |
1c16d242 | 28 | #include <asm/memblock.h> |
56372b0b G |
29 | |
30 | #include <mach/map.h> | |
31 | ||
32 | #include "mm.h" | |
33 | ||
56372b0b G |
34 | /* |
35 | * empty_zero_page is a special page that is used for | |
36 | * zero-initialized data and COW. | |
37 | */ | |
38 | struct page *empty_zero_page; | |
39 | EXPORT_SYMBOL(empty_zero_page); | |
40 | ||
41 | /* | |
42 | * The pmd table for the upper-most set of pages. | |
43 | */ | |
44 | pmd_t *top_pmd; | |
45 | ||
46 | pgprot_t pgprot_user; | |
47 | EXPORT_SYMBOL(pgprot_user); | |
48 | ||
49 | pgprot_t pgprot_kernel; | |
50 | EXPORT_SYMBOL(pgprot_kernel); | |
51 | ||
52 | static int __init noalign_setup(char *__unused) | |
53 | { | |
54 | cr_alignment &= ~CR_A; | |
55 | cr_no_alignment &= ~CR_A; | |
56 | set_cr(cr_alignment); | |
57 | return 1; | |
58 | } | |
59 | __setup("noalign", noalign_setup); | |
60 | ||
61 | void adjust_cr(unsigned long mask, unsigned long set) | |
62 | { | |
63 | unsigned long flags; | |
64 | ||
65 | mask &= ~CR_A; | |
66 | ||
67 | set &= mask; | |
68 | ||
69 | local_irq_save(flags); | |
70 | ||
71 | cr_no_alignment = (cr_no_alignment & ~mask) | set; | |
72 | cr_alignment = (cr_alignment & ~mask) | set; | |
73 | ||
74 | set_cr((get_cr() & ~mask) | set); | |
75 | ||
76 | local_irq_restore(flags); | |
77 | } | |
78 | ||
79 | struct map_desc { | |
80 | unsigned long virtual; | |
81 | unsigned long pfn; | |
82 | unsigned long length; | |
83 | unsigned int type; | |
84 | }; | |
85 | ||
86 | #define PROT_PTE_DEVICE (PTE_PRESENT | PTE_YOUNG | \ | |
87 | PTE_DIRTY | PTE_READ | PTE_WRITE) | |
88 | #define PROT_SECT_DEVICE (PMD_TYPE_SECT | PMD_PRESENT | \ | |
89 | PMD_SECT_READ | PMD_SECT_WRITE) | |
90 | ||
91 | static struct mem_type mem_types[] = { | |
92 | [MT_DEVICE] = { /* Strongly ordered */ | |
93 | .prot_pte = PROT_PTE_DEVICE, | |
94 | .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, | |
95 | .prot_sect = PROT_SECT_DEVICE, | |
96 | }, | |
97 | /* | |
98 | * MT_KUSER: pte for vecpage -- cacheable, | |
99 | * and sect for unigfx mmap -- noncacheable | |
100 | */ | |
101 | [MT_KUSER] = { | |
102 | .prot_pte = PTE_PRESENT | PTE_YOUNG | PTE_DIRTY | | |
103 | PTE_CACHEABLE | PTE_READ | PTE_EXEC, | |
104 | .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, | |
105 | .prot_sect = PROT_SECT_DEVICE, | |
106 | }, | |
107 | [MT_HIGH_VECTORS] = { | |
108 | .prot_pte = PTE_PRESENT | PTE_YOUNG | PTE_DIRTY | | |
109 | PTE_CACHEABLE | PTE_READ | PTE_WRITE | | |
110 | PTE_EXEC, | |
111 | .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, | |
112 | }, | |
113 | [MT_MEMORY] = { | |
114 | .prot_pte = PTE_PRESENT | PTE_YOUNG | PTE_DIRTY | | |
115 | PTE_WRITE | PTE_EXEC, | |
116 | .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, | |
117 | .prot_sect = PMD_TYPE_SECT | PMD_PRESENT | PMD_SECT_CACHEABLE | | |
118 | PMD_SECT_READ | PMD_SECT_WRITE | PMD_SECT_EXEC, | |
119 | }, | |
120 | [MT_ROM] = { | |
121 | .prot_sect = PMD_TYPE_SECT | PMD_PRESENT | PMD_SECT_CACHEABLE | | |
122 | PMD_SECT_READ, | |
123 | }, | |
124 | }; | |
125 | ||
126 | const struct mem_type *get_mem_type(unsigned int type) | |
127 | { | |
128 | return type < ARRAY_SIZE(mem_types) ? &mem_types[type] : NULL; | |
129 | } | |
130 | EXPORT_SYMBOL(get_mem_type); | |
131 | ||
132 | /* | |
133 | * Adjust the PMD section entries according to the CPU in use. | |
134 | */ | |
135 | static void __init build_mem_type_table(void) | |
136 | { | |
137 | pgprot_user = __pgprot(PTE_PRESENT | PTE_YOUNG | PTE_CACHEABLE); | |
138 | pgprot_kernel = __pgprot(PTE_PRESENT | PTE_YOUNG | | |
139 | PTE_DIRTY | PTE_READ | PTE_WRITE | | |
140 | PTE_EXEC | PTE_CACHEABLE); | |
141 | } | |
142 | ||
143 | #define vectors_base() (vectors_high() ? 0xffff0000 : 0) | |
144 | ||
145 | static void __init *early_alloc(unsigned long sz) | |
146 | { | |
147 | void *ptr = __va(memblock_alloc(sz, sz)); | |
148 | memset(ptr, 0, sz); | |
149 | return ptr; | |
150 | } | |
151 | ||
152 | static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, | |
153 | unsigned long prot) | |
154 | { | |
155 | if (pmd_none(*pmd)) { | |
156 | pte_t *pte = early_alloc(PTRS_PER_PTE * sizeof(pte_t)); | |
157 | __pmd_populate(pmd, __pa(pte) | prot); | |
158 | } | |
159 | BUG_ON(pmd_bad(*pmd)); | |
160 | return pte_offset_kernel(pmd, addr); | |
161 | } | |
162 | ||
163 | static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr, | |
164 | unsigned long end, unsigned long pfn, | |
165 | const struct mem_type *type) | |
166 | { | |
167 | pte_t *pte = early_pte_alloc(pmd, addr, type->prot_l1); | |
168 | do { | |
169 | set_pte(pte, pfn_pte(pfn, __pgprot(type->prot_pte))); | |
170 | pfn++; | |
171 | } while (pte++, addr += PAGE_SIZE, addr != end); | |
172 | } | |
173 | ||
174 | static void __init alloc_init_section(pgd_t *pgd, unsigned long addr, | |
175 | unsigned long end, unsigned long phys, | |
176 | const struct mem_type *type) | |
177 | { | |
178 | pmd_t *pmd = pmd_offset((pud_t *)pgd, addr); | |
179 | ||
180 | /* | |
181 | * Try a section mapping - end, addr and phys must all be aligned | |
182 | * to a section boundary. | |
183 | */ | |
184 | if (((addr | end | phys) & ~SECTION_MASK) == 0) { | |
185 | pmd_t *p = pmd; | |
186 | ||
187 | do { | |
188 | set_pmd(pmd, __pmd(phys | type->prot_sect)); | |
189 | phys += SECTION_SIZE; | |
190 | } while (pmd++, addr += SECTION_SIZE, addr != end); | |
191 | ||
192 | flush_pmd_entry(p); | |
193 | } else { | |
194 | /* | |
195 | * No need to loop; pte's aren't interested in the | |
196 | * individual L1 entries. | |
197 | */ | |
198 | alloc_init_pte(pmd, addr, end, __phys_to_pfn(phys), type); | |
199 | } | |
200 | } | |
201 | ||
202 | /* | |
203 | * Create the page directory entries and any necessary | |
204 | * page tables for the mapping specified by `md'. We | |
205 | * are able to cope here with varying sizes and address | |
206 | * offsets, and we take full advantage of sections. | |
207 | */ | |
208 | static void __init create_mapping(struct map_desc *md) | |
209 | { | |
210 | unsigned long phys, addr, length, end; | |
211 | const struct mem_type *type; | |
212 | pgd_t *pgd; | |
213 | ||
214 | if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { | |
215 | printk(KERN_WARNING "BUG: not creating mapping for " | |
216 | "0x%08llx at 0x%08lx in user region\n", | |
217 | __pfn_to_phys((u64)md->pfn), md->virtual); | |
218 | return; | |
219 | } | |
220 | ||
221 | if ((md->type == MT_DEVICE || md->type == MT_ROM) && | |
222 | md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { | |
223 | printk(KERN_WARNING "BUG: mapping for 0x%08llx at 0x%08lx " | |
224 | "overlaps vmalloc space\n", | |
225 | __pfn_to_phys((u64)md->pfn), md->virtual); | |
226 | } | |
227 | ||
228 | type = &mem_types[md->type]; | |
229 | ||
230 | addr = md->virtual & PAGE_MASK; | |
231 | phys = (unsigned long)__pfn_to_phys(md->pfn); | |
232 | length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); | |
233 | ||
234 | if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) { | |
235 | printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " | |
236 | "be mapped using pages, ignoring.\n", | |
237 | __pfn_to_phys(md->pfn), addr); | |
238 | return; | |
239 | } | |
240 | ||
241 | pgd = pgd_offset_k(addr); | |
242 | end = addr + length; | |
243 | do { | |
244 | unsigned long next = pgd_addr_end(addr, end); | |
245 | ||
246 | alloc_init_section(pgd, addr, next, phys, type); | |
247 | ||
248 | phys += next - addr; | |
249 | addr = next; | |
250 | } while (pgd++, addr != end); | |
251 | } | |
252 | ||
253 | static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_128M); | |
254 | ||
255 | /* | |
256 | * vmalloc=size forces the vmalloc area to be exactly 'size' | |
257 | * bytes. This can be used to increase (or decrease) the vmalloc | |
258 | * area - the default is 128m. | |
259 | */ | |
260 | static int __init early_vmalloc(char *arg) | |
261 | { | |
262 | unsigned long vmalloc_reserve = memparse(arg, NULL); | |
263 | ||
264 | if (vmalloc_reserve < SZ_16M) { | |
265 | vmalloc_reserve = SZ_16M; | |
266 | printk(KERN_WARNING | |
267 | "vmalloc area too small, limiting to %luMB\n", | |
268 | vmalloc_reserve >> 20); | |
269 | } | |
270 | ||
271 | if (vmalloc_reserve > VMALLOC_END - (PAGE_OFFSET + SZ_32M)) { | |
272 | vmalloc_reserve = VMALLOC_END - (PAGE_OFFSET + SZ_32M); | |
273 | printk(KERN_WARNING | |
274 | "vmalloc area is too big, limiting to %luMB\n", | |
275 | vmalloc_reserve >> 20); | |
276 | } | |
277 | ||
278 | vmalloc_min = (void *)(VMALLOC_END - vmalloc_reserve); | |
279 | return 0; | |
280 | } | |
281 | early_param("vmalloc", early_vmalloc); | |
282 | ||
283 | static phys_addr_t lowmem_limit __initdata = SZ_1G; | |
284 | ||
285 | static void __init sanity_check_meminfo(void) | |
286 | { | |
287 | int i, j; | |
288 | ||
289 | lowmem_limit = __pa(vmalloc_min - 1) + 1; | |
290 | memblock_set_current_limit(lowmem_limit); | |
291 | ||
292 | for (i = 0, j = 0; i < meminfo.nr_banks; i++) { | |
293 | struct membank *bank = &meminfo.bank[j]; | |
294 | *bank = meminfo.bank[i]; | |
295 | j++; | |
296 | } | |
297 | meminfo.nr_banks = j; | |
298 | } | |
299 | ||
300 | static inline void prepare_page_table(void) | |
301 | { | |
302 | unsigned long addr; | |
303 | phys_addr_t end; | |
304 | ||
305 | /* | |
306 | * Clear out all the mappings below the kernel image. | |
307 | */ | |
308 | for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE) | |
309 | pmd_clear(pmd_off_k(addr)); | |
310 | ||
311 | for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE) | |
312 | pmd_clear(pmd_off_k(addr)); | |
313 | ||
314 | /* | |
315 | * Find the end of the first block of lowmem. | |
316 | */ | |
317 | end = memblock.memory.regions[0].base + memblock.memory.regions[0].size; | |
318 | if (end >= lowmem_limit) | |
319 | end = lowmem_limit; | |
320 | ||
321 | /* | |
322 | * Clear out all the kernel space mappings, except for the first | |
323 | * memory bank, up to the end of the vmalloc region. | |
324 | */ | |
325 | for (addr = __phys_to_virt(end); | |
326 | addr < VMALLOC_END; addr += PGDIR_SIZE) | |
327 | pmd_clear(pmd_off_k(addr)); | |
328 | } | |
329 | ||
330 | /* | |
331 | * Reserve the special regions of memory | |
332 | */ | |
333 | void __init uc32_mm_memblock_reserve(void) | |
334 | { | |
335 | /* | |
336 | * Reserve the page tables. These are already in use, | |
337 | * and can only be in node 0. | |
338 | */ | |
339 | memblock_reserve(__pa(swapper_pg_dir), PTRS_PER_PGD * sizeof(pgd_t)); | |
56372b0b G |
340 | } |
341 | ||
342 | /* | |
343 | * Set up device the mappings. Since we clear out the page tables for all | |
344 | * mappings above VMALLOC_END, we will remove any debug device mappings. | |
345 | * This means you have to be careful how you debug this function, or any | |
346 | * called function. This means you can't use any function or debugging | |
347 | * method which may touch any device, otherwise the kernel _will_ crash. | |
348 | */ | |
349 | static void __init devicemaps_init(void) | |
350 | { | |
351 | struct map_desc map; | |
352 | unsigned long addr; | |
353 | void *vectors; | |
354 | ||
355 | /* | |
356 | * Allocate the vector page early. | |
357 | */ | |
358 | vectors = early_alloc(PAGE_SIZE); | |
359 | ||
360 | for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE) | |
361 | pmd_clear(pmd_off_k(addr)); | |
362 | ||
56372b0b G |
363 | /* |
364 | * Create a mapping for the machine vectors at the high-vectors | |
365 | * location (0xffff0000). If we aren't using high-vectors, also | |
366 | * create a mapping at the low-vectors virtual address. | |
367 | */ | |
368 | map.pfn = __phys_to_pfn(virt_to_phys(vectors)); | |
369 | map.virtual = VECTORS_BASE; | |
370 | map.length = PAGE_SIZE; | |
371 | map.type = MT_HIGH_VECTORS; | |
372 | create_mapping(&map); | |
373 | ||
374 | /* | |
375 | * Create a mapping for the kuser page at the special | |
376 | * location (0xbfff0000) to the same vectors location. | |
377 | */ | |
378 | map.pfn = __phys_to_pfn(virt_to_phys(vectors)); | |
379 | map.virtual = KUSER_VECPAGE_BASE; | |
380 | map.length = PAGE_SIZE; | |
381 | map.type = MT_KUSER; | |
382 | create_mapping(&map); | |
383 | ||
384 | /* | |
385 | * Finally flush the caches and tlb to ensure that we're in a | |
386 | * consistent state wrt the writebuffer. This also ensures that | |
387 | * any write-allocated cache lines in the vector page are written | |
388 | * back. After this point, we can start to touch devices again. | |
389 | */ | |
390 | local_flush_tlb_all(); | |
391 | flush_cache_all(); | |
392 | } | |
393 | ||
394 | static void __init map_lowmem(void) | |
395 | { | |
396 | struct memblock_region *reg; | |
397 | ||
398 | /* Map all the lowmem memory banks. */ | |
399 | for_each_memblock(memory, reg) { | |
400 | phys_addr_t start = reg->base; | |
401 | phys_addr_t end = start + reg->size; | |
402 | struct map_desc map; | |
403 | ||
404 | if (end > lowmem_limit) | |
405 | end = lowmem_limit; | |
406 | if (start >= end) | |
407 | break; | |
408 | ||
409 | map.pfn = __phys_to_pfn(start); | |
410 | map.virtual = __phys_to_virt(start); | |
411 | map.length = end - start; | |
412 | map.type = MT_MEMORY; | |
413 | ||
414 | create_mapping(&map); | |
415 | } | |
416 | } | |
417 | ||
418 | /* | |
419 | * paging_init() sets up the page tables, initialises the zone memory | |
420 | * maps, and sets up the zero page, bad page and bad page tables. | |
421 | */ | |
422 | void __init paging_init(void) | |
423 | { | |
424 | void *zero_page; | |
425 | ||
426 | build_mem_type_table(); | |
427 | sanity_check_meminfo(); | |
428 | prepare_page_table(); | |
429 | map_lowmem(); | |
430 | devicemaps_init(); | |
431 | ||
432 | top_pmd = pmd_off_k(0xffff0000); | |
433 | ||
434 | /* allocate the zero page. */ | |
435 | zero_page = early_alloc(PAGE_SIZE); | |
436 | ||
437 | bootmem_init(); | |
438 | ||
439 | empty_zero_page = virt_to_page(zero_page); | |
440 | __flush_dcache_page(NULL, empty_zero_page); | |
441 | } | |
442 | ||
443 | /* | |
444 | * In order to soft-boot, we need to insert a 1:1 mapping in place of | |
445 | * the user-mode pages. This will then ensure that we have predictable | |
446 | * results when turning the mmu off | |
447 | */ | |
c97a7008 | 448 | void setup_mm_for_reboot(void) |
56372b0b G |
449 | { |
450 | unsigned long base_pmdval; | |
451 | pgd_t *pgd; | |
452 | int i; | |
453 | ||
454 | /* | |
455 | * We need to access to user-mode page tables here. For kernel threads | |
456 | * we don't have any user-mode mappings so we use the context that we | |
457 | * "borrowed". | |
458 | */ | |
459 | pgd = current->active_mm->pgd; | |
460 | ||
461 | base_pmdval = PMD_SECT_WRITE | PMD_SECT_READ | PMD_TYPE_SECT; | |
462 | ||
463 | for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) { | |
464 | unsigned long pmdval = (i << PGDIR_SHIFT) | base_pmdval; | |
465 | pmd_t *pmd; | |
466 | ||
467 | pmd = pmd_off(pgd, i << PGDIR_SHIFT); | |
468 | set_pmd(pmd, __pmd(pmdval)); | |
469 | flush_pmd_entry(pmd); | |
470 | } | |
471 | ||
472 | local_flush_tlb_all(); | |
473 | } | |
474 | ||
475 | /* | |
476 | * Take care of architecture specific things when placing a new PTE into | |
477 | * a page table, or changing an existing PTE. Basically, there are two | |
478 | * things that we need to take care of: | |
479 | * | |
480 | * 1. If PG_dcache_clean is not set for the page, we need to ensure | |
481 | * that any cache entries for the kernels virtual memory | |
482 | * range are written back to the page. | |
483 | * 2. If we have multiple shared mappings of the same space in | |
484 | * an object, we need to deal with the cache aliasing issues. | |
485 | * | |
486 | * Note that the pte lock will be held. | |
487 | */ | |
488 | void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, | |
489 | pte_t *ptep) | |
490 | { | |
491 | unsigned long pfn = pte_pfn(*ptep); | |
492 | struct address_space *mapping; | |
493 | struct page *page; | |
494 | ||
495 | if (!pfn_valid(pfn)) | |
496 | return; | |
497 | ||
498 | /* | |
499 | * The zero page is never written to, so never has any dirty | |
500 | * cache lines, and therefore never needs to be flushed. | |
501 | */ | |
502 | page = pfn_to_page(pfn); | |
503 | if (page == ZERO_PAGE(0)) | |
504 | return; | |
505 | ||
506 | mapping = page_mapping(page); | |
507 | if (!test_and_set_bit(PG_dcache_clean, &page->flags)) | |
508 | __flush_dcache_page(mapping, page); | |
509 | if (mapping) | |
510 | if (vma->vm_flags & VM_EXEC) | |
511 | __flush_icache_all(); | |
512 | } |