Commit | Line | Data |
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96d55b88 | 1 | # Put here option for CPU selection and depending optimization |
96d55b88 PBG |
2 | choice |
3 | prompt "Processor family" | |
1032c0ba SR |
4 | default M686 if X86_32 |
5 | default GENERIC_CPU if X86_64 | |
96d55b88 | 6 | |
eb068e78 PA |
7 | config M486 |
8 | bool "486" | |
9 | depends on X86_32 | |
96d55b88 | 10 | ---help--- |
eb068e78 PA |
11 | This is the processor type of your CPU. This information is |
12 | used for optimizing purposes. In order to compile a kernel | |
13 | that can run on all supported x86 CPU types (albeit not | |
14 | optimally fast), you can specify "486" here. | |
15 | ||
16 | Note that the 386 is no longer supported, this includes | |
17 | AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2, | |
11af32b6 | 18 | UMC 486SX-S and the NexGen Nx586. |
96d55b88 PBG |
19 | |
20 | The kernel will not necessarily run on earlier architectures than | |
21 | the one you have chosen, e.g. a Pentium optimized kernel will run on | |
22 | a PPro, but not necessarily on a i486. | |
23 | ||
24 | Here are the settings recommended for greatest speed: | |
96d55b88 PBG |
25 | - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or |
26 | SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S. | |
27 | - "586" for generic Pentium CPUs lacking the TSC | |
28 | (time stamp counter) register. | |
29 | - "Pentium-Classic" for the Intel Pentium. | |
30 | - "Pentium-MMX" for the Intel Pentium MMX. | |
31 | - "Pentium-Pro" for the Intel Pentium Pro. | |
32 | - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron. | |
33 | - "Pentium-III" for the Intel Pentium III or Coppermine Celeron. | |
34 | - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron. | |
35 | - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D). | |
36 | - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird). | |
37 | - "Crusoe" for the Transmeta Crusoe series. | |
38 | - "Efficeon" for the Transmeta Efficeon series. | |
39 | - "Winchip-C6" for original IDT Winchip. | |
69d45dd1 | 40 | - "Winchip-2" for IDT Winchips with 3dNow! capabilities. |
96d55b88 | 41 | - "GeodeGX1" for Geode GX1 (Cyrix MediaGX). |
f90b8116 | 42 | - "Geode GX/LX" For AMD Geode GX and LX processors. |
96d55b88 | 43 | - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3. |
48a1204c | 44 | - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above). |
0949be35 | 45 | - "VIA C7" for VIA C7. |
96d55b88 | 46 | |
eb068e78 | 47 | If you don't know what to do, choose "486". |
96d55b88 PBG |
48 | |
49 | config M586 | |
50 | bool "586/K5/5x86/6x86/6x86MX" | |
1032c0ba | 51 | depends on X86_32 |
8f9ca475 | 52 | ---help--- |
96d55b88 PBG |
53 | Select this for an 586 or 686 series processor such as the AMD K5, |
54 | the Cyrix 5x86, 6x86 and 6x86MX. This choice does not | |
55 | assume the RDTSC (Read Time Stamp Counter) instruction. | |
56 | ||
57 | config M586TSC | |
58 | bool "Pentium-Classic" | |
1032c0ba | 59 | depends on X86_32 |
8f9ca475 | 60 | ---help--- |
96d55b88 PBG |
61 | Select this for a Pentium Classic processor with the RDTSC (Read |
62 | Time Stamp Counter) instruction for benchmarking. | |
63 | ||
64 | config M586MMX | |
65 | bool "Pentium-MMX" | |
1032c0ba | 66 | depends on X86_32 |
8f9ca475 | 67 | ---help--- |
96d55b88 PBG |
68 | Select this for a Pentium with the MMX graphics/multimedia |
69 | extended instructions. | |
70 | ||
71 | config M686 | |
72 | bool "Pentium-Pro" | |
1032c0ba | 73 | depends on X86_32 |
8f9ca475 | 74 | ---help--- |
96d55b88 PBG |
75 | Select this for Intel Pentium Pro chips. This enables the use of |
76 | Pentium Pro extended instructions, and disables the init-time guard | |
77 | against the f00f bug found in earlier Pentiums. | |
78 | ||
79 | config MPENTIUMII | |
80 | bool "Pentium-II/Celeron(pre-Coppermine)" | |
1032c0ba | 81 | depends on X86_32 |
8f9ca475 | 82 | ---help--- |
96d55b88 PBG |
83 | Select this for Intel chips based on the Pentium-II and |
84 | pre-Coppermine Celeron core. This option enables an unaligned | |
85 | copy optimization, compiles the kernel with optimization flags | |
86 | tailored for the chip, and applies any applicable Pentium Pro | |
87 | optimizations. | |
88 | ||
89 | config MPENTIUMIII | |
90 | bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" | |
1032c0ba | 91 | depends on X86_32 |
8f9ca475 | 92 | ---help--- |
96d55b88 PBG |
93 | Select this for Intel chips based on the Pentium-III and |
94 | Celeron-Coppermine core. This option enables use of some | |
95 | extended prefetch instructions in addition to the Pentium II | |
96 | extensions. | |
97 | ||
98 | config MPENTIUMM | |
99 | bool "Pentium M" | |
1032c0ba | 100 | depends on X86_32 |
8f9ca475 | 101 | ---help--- |
96d55b88 PBG |
102 | Select this for Intel Pentium M (not Pentium-4 M) |
103 | notebook chips. | |
104 | ||
105 | config MPENTIUM4 | |
c55d92d1 | 106 | bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" |
1032c0ba | 107 | depends on X86_32 |
8f9ca475 | 108 | ---help--- |
96d55b88 | 109 | Select this for Intel Pentium 4 chips. This includes the |
75e3808b OP |
110 | Pentium 4, Pentium D, P4-based Celeron and Xeon, and |
111 | Pentium-4 M (not Pentium M) chips. This option enables compile | |
112 | flags optimized for the chip, uses the correct cache line size, and | |
113 | applies any applicable optimizations. | |
114 | ||
115 | CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 ) | |
116 | ||
117 | Select this for: | |
118 | Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename: | |
119 | -Willamette | |
120 | -Northwood | |
121 | -Mobile Pentium 4 | |
122 | -Mobile Pentium 4 M | |
123 | -Extreme Edition (Gallatin) | |
124 | -Prescott | |
125 | -Prescott 2M | |
126 | -Cedar Mill | |
127 | -Presler | |
128 | -Smithfiled | |
129 | Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename: | |
130 | -Foster | |
131 | -Prestonia | |
132 | -Gallatin | |
133 | -Nocona | |
134 | -Irwindale | |
135 | -Cranford | |
136 | -Potomac | |
137 | -Paxville | |
138 | -Dempsey | |
139 | ||
96d55b88 PBG |
140 | |
141 | config MK6 | |
142 | bool "K6/K6-II/K6-III" | |
1032c0ba | 143 | depends on X86_32 |
8f9ca475 | 144 | ---help--- |
96d55b88 PBG |
145 | Select this for an AMD K6-family processor. Enables use of |
146 | some extended instructions, and passes appropriate optimization | |
147 | flags to GCC. | |
148 | ||
149 | config MK7 | |
150 | bool "Athlon/Duron/K7" | |
1032c0ba | 151 | depends on X86_32 |
8f9ca475 | 152 | ---help--- |
96d55b88 PBG |
153 | Select this for an AMD Athlon K7-family processor. Enables use of |
154 | some extended instructions, and passes appropriate optimization | |
155 | flags to GCC. | |
156 | ||
157 | config MK8 | |
158 | bool "Opteron/Athlon64/Hammer/K8" | |
8f9ca475 | 159 | ---help--- |
36723bfe BP |
160 | Select this for an AMD Opteron or Athlon64 Hammer-family processor. |
161 | Enables use of some extended instructions, and passes appropriate | |
162 | optimization flags to GCC. | |
96d55b88 PBG |
163 | |
164 | config MCRUSOE | |
165 | bool "Crusoe" | |
1032c0ba | 166 | depends on X86_32 |
8f9ca475 | 167 | ---help--- |
96d55b88 PBG |
168 | Select this for a Transmeta Crusoe processor. Treats the processor |
169 | like a 586 with TSC, and sets some GCC optimization flags (like a | |
170 | Pentium Pro with no alignment requirements). | |
171 | ||
172 | config MEFFICEON | |
173 | bool "Efficeon" | |
1032c0ba | 174 | depends on X86_32 |
8f9ca475 | 175 | ---help--- |
96d55b88 PBG |
176 | Select this for a Transmeta Efficeon processor. |
177 | ||
178 | config MWINCHIPC6 | |
179 | bool "Winchip-C6" | |
1032c0ba | 180 | depends on X86_32 |
8f9ca475 | 181 | ---help--- |
96d55b88 PBG |
182 | Select this for an IDT Winchip C6 chip. Linux and GCC |
183 | treat this chip as a 586TSC with some extended instructions | |
184 | and alignment requirements. | |
185 | ||
96d55b88 | 186 | config MWINCHIP3D |
69d45dd1 | 187 | bool "Winchip-2/Winchip-2A/Winchip-3" |
1032c0ba | 188 | depends on X86_32 |
8f9ca475 | 189 | ---help--- |
69d45dd1 | 190 | Select this for an IDT Winchip-2, 2A or 3. Linux and GCC |
96d55b88 | 191 | treat this chip as a 586TSC with some extended instructions |
3dde6ad8 | 192 | and alignment requirements. Also enable out of order memory |
96d55b88 PBG |
193 | stores for this CPU, which can increase performance of some |
194 | operations. | |
195 | ||
ce9c99af IC |
196 | config MELAN |
197 | bool "AMD Elan" | |
198 | depends on X86_32 | |
199 | ---help--- | |
200 | Select this for an AMD Elan processor. | |
201 | ||
202 | Do not use this option for K6/Athlon/Opteron processors! | |
203 | ||
96d55b88 PBG |
204 | config MGEODEGX1 |
205 | bool "GeodeGX1" | |
1032c0ba | 206 | depends on X86_32 |
8f9ca475 | 207 | ---help--- |
96d55b88 PBG |
208 | Select this for a Geode GX1 (Cyrix MediaGX) chip. |
209 | ||
f90b8116 | 210 | config MGEODE_LX |
96daa8cd | 211 | bool "Geode GX/LX" |
1032c0ba | 212 | depends on X86_32 |
8f9ca475 | 213 | ---help--- |
96daa8cd | 214 | Select this for AMD Geode GX and LX processors. |
f90b8116 | 215 | |
96d55b88 PBG |
216 | config MCYRIXIII |
217 | bool "CyrixIII/VIA-C3" | |
1032c0ba | 218 | depends on X86_32 |
8f9ca475 | 219 | ---help--- |
96d55b88 PBG |
220 | Select this for a Cyrix III or C3 chip. Presently Linux and GCC |
221 | treat this chip as a generic 586. Whilst the CPU is 686 class, | |
222 | it lacks the cmov extension which gcc assumes is present when | |
223 | generating 686 code. | |
224 | Note that Nehemiah (Model 9) and above will not boot with this | |
225 | kernel due to them lacking the 3DNow! instructions used in earlier | |
226 | incarnations of the CPU. | |
227 | ||
228 | config MVIAC3_2 | |
229 | bool "VIA C3-2 (Nehemiah)" | |
1032c0ba | 230 | depends on X86_32 |
8f9ca475 | 231 | ---help--- |
96d55b88 PBG |
232 | Select this for a VIA C3 "Nehemiah". Selecting this enables usage |
233 | of SSE and tells gcc to treat the CPU as a 686. | |
234 | Note, this kernel will not boot on older (pre model 9) C3s. | |
235 | ||
0949be35 SA |
236 | config MVIAC7 |
237 | bool "VIA C7" | |
1032c0ba | 238 | depends on X86_32 |
8f9ca475 | 239 | ---help--- |
0949be35 SA |
240 | Select this for a VIA C7. Selecting this uses the correct cache |
241 | shift and tells gcc to treat the CPU as a 686. | |
242 | ||
1032c0ba SR |
243 | config MPSC |
244 | bool "Intel P4 / older Netburst based Xeon" | |
245 | depends on X86_64 | |
8f9ca475 | 246 | ---help--- |
1032c0ba SR |
247 | Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey |
248 | Xeon CPUs with Intel 64bit which is compatible with x86-64. | |
249 | Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the | |
96daa8cd | 250 | Netburst core and shouldn't use this option. You can distinguish them |
1032c0ba SR |
251 | using the cpu family field |
252 | in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one. | |
253 | ||
254 | config MCORE2 | |
255 | bool "Core 2/newer Xeon" | |
8f9ca475 | 256 | ---help--- |
36723bfe BP |
257 | |
258 | Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and | |
259 | 53xx) CPUs. You can distinguish newer from older Xeons by the CPU | |
260 | family in /proc/cpuinfo. Newer ones have 6 and older ones 15 | |
261 | (not a typo) | |
1032c0ba | 262 | |
366d19e1 TD |
263 | config MATOM |
264 | bool "Intel Atom" | |
265 | ---help--- | |
266 | ||
267 | Select this for the Intel Atom platform. Intel Atom CPUs have an | |
268 | in-order pipelining architecture and thus can benefit from | |
269 | accordingly optimized code. Use a recent GCC with specific Atom | |
270 | support in order to fully benefit from selecting this option. | |
271 | ||
1032c0ba SR |
272 | config GENERIC_CPU |
273 | bool "Generic-x86-64" | |
274 | depends on X86_64 | |
8f9ca475 | 275 | ---help--- |
1032c0ba SR |
276 | Generic x86-64 CPU. |
277 | Run equally well on all x86-64 CPUs. | |
278 | ||
96d55b88 PBG |
279 | endchoice |
280 | ||
281 | config X86_GENERIC | |
1032c0ba SR |
282 | bool "Generic x86 support" |
283 | depends on X86_32 | |
8f9ca475 | 284 | ---help--- |
96d55b88 PBG |
285 | Instead of just including optimizations for the selected |
286 | x86 variant (e.g. PII, Crusoe or Athlon), include some more | |
287 | generic optimizations as well. This will make the kernel | |
288 | perform better on x86 CPUs other than that selected. | |
289 | ||
290 | This is really intended for distributors who need more | |
291 | generic optimizations. | |
292 | ||
96d55b88 PBG |
293 | # |
294 | # Define implied options from the CPU selection here | |
350f8f56 | 295 | config X86_INTERNODE_CACHE_SHIFT |
1032c0ba | 296 | int |
350f8f56 | 297 | default "12" if X86_VSMP |
350f8f56 | 298 | default X86_L1_CACHE_SHIFT |
1032c0ba | 299 | |
96d55b88 PBG |
300 | config X86_L1_CACHE_SHIFT |
301 | int | |
0a2a18b7 | 302 | default "7" if MPENTIUM4 || MPSC |
350f8f56 | 303 | default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU |
eb068e78 | 304 | default "4" if MELAN || M486 || MGEODEGX1 |
69d45dd1 | 305 | default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX |
96d55b88 | 306 | |
96d55b88 | 307 | config X86_PPRO_FENCE |
fb0328e2 | 308 | bool "PentiumPro memory ordering errata workaround" |
eb068e78 | 309 | depends on M686 || M586MMX || M586TSC || M586 || M486 || MGEODEGX1 |
8f9ca475 | 310 | ---help--- |
36723bfe BP |
311 | Old PentiumPro multiprocessor systems had errata that could cause |
312 | memory operations to violate the x86 ordering standard in rare cases. | |
313 | Enabling this option will attempt to work around some (but not all) | |
0d2eb44f | 314 | occurrences of this problem, at the cost of much heavier spinlock and |
36723bfe BP |
315 | memory barrier operations. |
316 | ||
317 | If unsure, say n here. Even distro kernels should think twice before | |
318 | enabling this: there are few systems, and an unlikely bug. | |
96d55b88 PBG |
319 | |
320 | config X86_F00F_BUG | |
96daa8cd | 321 | def_bool y |
eb068e78 | 322 | depends on M586MMX || M586TSC || M586 || M486 |
96d55b88 | 323 | |
40d2e763 BG |
324 | config X86_INVD_BUG |
325 | def_bool y | |
eb068e78 | 326 | depends on M486 |
40d2e763 | 327 | |
96d55b88 | 328 | config X86_ALIGNMENT_16 |
96daa8cd | 329 | def_bool y |
ce9c99af | 330 | depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1 |
96d55b88 | 331 | |
96d55b88 | 332 | config X86_INTEL_USERCOPY |
96daa8cd | 333 | def_bool y |
c55d92d1 | 334 | depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 |
96d55b88 PBG |
335 | |
336 | config X86_USE_PPRO_CHECKSUM | |
96daa8cd | 337 | def_bool y |
1eda75c1 | 338 | depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM |
96d55b88 PBG |
339 | |
340 | config X86_USE_3DNOW | |
96daa8cd | 341 | def_bool y |
1b4ad242 | 342 | depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML |
96d55b88 | 343 | |
959b3be6 PA |
344 | # |
345 | # P6_NOPs are a relatively minor optimization that require a family >= | |
346 | # 6 processor, except that it is broken on certain VIA chips. | |
347 | # Furthermore, AMD chips prefer a totally different sequence of NOPs | |
14469a8d LT |
348 | # (which work on all CPUs). In addition, it looks like Virtual PC |
349 | # does not understand them. | |
350 | # | |
351 | # As a result, disallow these if we're not compiling for X86_64 (these | |
352 | # NOPs do work on all x86-64 capable chips); the list of processors in | |
353 | # the right-hand clause are the cores that benefit from this optimization. | |
959b3be6 | 354 | # |
7343b3b3 PA |
355 | config X86_P6_NOP |
356 | def_bool y | |
14469a8d LT |
357 | depends on X86_64 |
358 | depends on (MCORE2 || MPENTIUM4 || MPSC) | |
7343b3b3 | 359 | |
96d55b88 | 360 | config X86_TSC |
96daa8cd | 361 | def_bool y |
b5660ba7 | 362 | depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64 |
c7f81c94 | 363 | |
f8096f92 JB |
364 | config X86_CMPXCHG64 |
365 | def_bool y | |
db677ffa | 366 | depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM |
f8096f92 | 367 | |
c7f81c94 AK |
368 | # this should be set for all -march=.. options where the compiler |
369 | # generates cmov. | |
370 | config X86_CMOV | |
96daa8cd | 371 | def_bool y |
98059e34 | 372 | depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX) |
c7f81c94 | 373 | |
de32e041 | 374 | config X86_MINIMUM_CPU_FAMILY |
c7f81c94 | 375 | int |
1032c0ba | 376 | default "64" if X86_64 |
7343b3b3 | 377 | default "6" if X86_32 && X86_P6_NOP |
982d007a | 378 | default "5" if X86_32 && X86_CMPXCHG64 |
eb068e78 | 379 | default "4" |
c7f81c94 | 380 | |
0a049bb0 | 381 | config X86_DEBUGCTLMSR |
96daa8cd | 382 | def_bool y |
eb068e78 | 383 | depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486) && !UML |
8d02c211 TP |
384 | |
385 | menuconfig PROCESSOR_SELECT | |
6a108a14 | 386 | bool "Supported processor vendors" if EXPERT |
8f9ca475 | 387 | ---help--- |
8d02c211 TP |
388 | This lets you choose what x86 vendor support code your kernel |
389 | will include. | |
390 | ||
879d792b | 391 | config CPU_SUP_INTEL |
8d02c211 TP |
392 | default y |
393 | bool "Support Intel processors" if PROCESSOR_SELECT | |
8f9ca475 | 394 | ---help--- |
b7b3a425 IM |
395 | This enables detection, tunings and quirks for Intel processors |
396 | ||
397 | You need this enabled if you want your kernel to run on an | |
398 | Intel CPU. Disabling this option on other types of CPUs | |
399 | makes the kernel a tiny bit smaller. Disabling it on an Intel | |
400 | CPU might render the kernel unbootable. | |
401 | ||
402 | If unsure, say N. | |
8d02c211 TP |
403 | |
404 | config CPU_SUP_CYRIX_32 | |
405 | default y | |
406 | bool "Support Cyrix processors" if PROCESSOR_SELECT | |
eb068e78 | 407 | depends on M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT) |
8f9ca475 | 408 | ---help--- |
b7b3a425 IM |
409 | This enables detection, tunings and quirks for Cyrix processors |
410 | ||
411 | You need this enabled if you want your kernel to run on a | |
412 | Cyrix CPU. Disabling this option on other types of CPUs | |
413 | makes the kernel a tiny bit smaller. Disabling it on a Cyrix | |
414 | CPU might render the kernel unbootable. | |
415 | ||
416 | If unsure, say N. | |
8d02c211 | 417 | |
ff73152c | 418 | config CPU_SUP_AMD |
8d02c211 TP |
419 | default y |
420 | bool "Support AMD processors" if PROCESSOR_SELECT | |
8f9ca475 | 421 | ---help--- |
b7b3a425 IM |
422 | This enables detection, tunings and quirks for AMD processors |
423 | ||
424 | You need this enabled if you want your kernel to run on an | |
425 | AMD CPU. Disabling this option on other types of CPUs | |
426 | makes the kernel a tiny bit smaller. Disabling it on an AMD | |
427 | CPU might render the kernel unbootable. | |
428 | ||
429 | If unsure, say N. | |
8d02c211 | 430 | |
48f4c485 | 431 | config CPU_SUP_CENTAUR |
8d02c211 TP |
432 | default y |
433 | bool "Support Centaur processors" if PROCESSOR_SELECT | |
8f9ca475 | 434 | ---help--- |
b7b3a425 IM |
435 | This enables detection, tunings and quirks for Centaur processors |
436 | ||
437 | You need this enabled if you want your kernel to run on a | |
438 | Centaur CPU. Disabling this option on other types of CPUs | |
439 | makes the kernel a tiny bit smaller. Disabling it on a Centaur | |
440 | CPU might render the kernel unbootable. | |
441 | ||
442 | If unsure, say N. | |
8d02c211 TP |
443 | |
444 | config CPU_SUP_TRANSMETA_32 | |
445 | default y | |
446 | bool "Support Transmeta processors" if PROCESSOR_SELECT | |
447 | depends on !64BIT | |
8f9ca475 | 448 | ---help--- |
b7b3a425 IM |
449 | This enables detection, tunings and quirks for Transmeta processors |
450 | ||
451 | You need this enabled if you want your kernel to run on a | |
452 | Transmeta CPU. Disabling this option on other types of CPUs | |
453 | makes the kernel a tiny bit smaller. Disabling it on a Transmeta | |
454 | CPU might render the kernel unbootable. | |
455 | ||
456 | If unsure, say N. | |
8d02c211 TP |
457 | |
458 | config CPU_SUP_UMC_32 | |
459 | default y | |
460 | bool "Support UMC processors" if PROCESSOR_SELECT | |
eb068e78 | 461 | depends on M486 || (EXPERT && !64BIT) |
8f9ca475 | 462 | ---help--- |
b7b3a425 IM |
463 | This enables detection, tunings and quirks for UMC processors |
464 | ||
465 | You need this enabled if you want your kernel to run on a | |
466 | UMC CPU. Disabling this option on other types of CPUs | |
467 | makes the kernel a tiny bit smaller. Disabling it on a UMC | |
468 | CPU might render the kernel unbootable. | |
469 | ||
470 | If unsure, say N. |