Merge tag 'hwmon-for-linus-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / x86 / entry / entry_64_compat.S
CommitLineData
1da177e4 1/*
54ad726c
IM
2 * Compatibility mode system call entry point for x86-64.
3 *
1da177e4 4 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
54ad726c 5 */
d36f9479 6#include "calling.h"
e2d5df93 7#include <asm/asm-offsets.h>
1da177e4
LT
8#include <asm/current.h>
9#include <asm/errno.h>
54ad726c
IM
10#include <asm/ia32_unistd.h>
11#include <asm/thread_info.h>
1da177e4 12#include <asm/segment.h>
2601e64d 13#include <asm/irqflags.h>
1ce6f868 14#include <asm/asm.h>
63bcff2a 15#include <asm/smap.h>
1da177e4 16#include <linux/linkage.h>
d7e7528b 17#include <linux/err.h>
1da177e4 18
ea714547
JO
19 .section .entry.text, "ax"
20
1da177e4 21/*
fda57b22 22 * 32-bit SYSENTER entry.
1da177e4 23 *
fda57b22
AL
24 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
25 * on 64-bit kernels running on Intel CPUs.
26 *
27 * The SYSENTER instruction, in principle, should *only* occur in the
28 * vDSO. In practice, a small number of Android devices were shipped
29 * with a copy of Bionic that inlined a SYSENTER instruction. This
30 * never happened in any of Google's Bionic versions -- it only happened
31 * in a narrow range of Intel-provided versions.
32 *
33 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
34 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
b87cf63e 35 * SYSENTER does not save anything on the stack,
fda57b22 36 * and does not save old RIP (!!!), RSP, or RFLAGS.
b87cf63e 37 *
1da177e4 38 * Arguments:
b87cf63e
DV
39 * eax system call number
40 * ebx arg1
41 * ecx arg2
42 * edx arg3
43 * esi arg4
44 * edi arg5
45 * ebp user stack
46 * 0(%ebp) arg6
b87cf63e 47 */
4c8cd0c5 48ENTRY(entry_SYSENTER_compat)
b611acf4 49 /* Interrupts are off on entry. */
a232e3d5 50 SWAPGS_UNSAFE_STACK
3a23208e 51 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
a232e3d5 52
a474e67c
AL
53 /*
54 * User tracing code (ptrace or signal handlers) might assume that
55 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
56 * syscall. Just in case the high bits are nonzero, zero-extend
57 * the syscall number. (This could almost certainly be deleted
58 * with no ill effects.)
59 */
4ee8ec17
DV
60 movl %eax, %eax
61
4c9c0e91 62 /* Construct struct pt_regs on stack */
131484c8 63 pushq $__USER32_DS /* pt_regs->ss */
30bfa7b3 64 pushq %rbp /* pt_regs->sp (stashed in bp) */
b611acf4
AL
65
66 /*
67 * Push flags. This is nasty. First, interrupts are currently
68 * off, but we need pt_regs->flags to have IF set. Second, even
69 * if TF was set when SYSENTER started, it's clear by now. We fix
70 * that later using TIF_SINGLESTEP.
71 */
72 pushfq /* pt_regs->flags (except IF = 0) */
73 orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */
131484c8 74 pushq $__USER32_CS /* pt_regs->cs */
a474e67c
AL
75 xorq %r8,%r8
76 pushq %r8 /* pt_regs->ip = 0 (placeholder) */
131484c8
IM
77 pushq %rax /* pt_regs->orig_ax */
78 pushq %rdi /* pt_regs->di */
79 pushq %rsi /* pt_regs->si */
80 pushq %rdx /* pt_regs->dx */
30bfa7b3 81 pushq %rcx /* pt_regs->cx */
131484c8 82 pushq $-ENOSYS /* pt_regs->ax */
a474e67c
AL
83 pushq %r8 /* pt_regs->r8 = 0 */
84 pushq %r8 /* pt_regs->r9 = 0 */
85 pushq %r8 /* pt_regs->r10 = 0 */
86 pushq %r8 /* pt_regs->r11 = 0 */
87 pushq %rbx /* pt_regs->rbx */
30bfa7b3 88 pushq %rbp /* pt_regs->rbp (will be overwritten) */
a474e67c
AL
89 pushq %r8 /* pt_regs->r12 = 0 */
90 pushq %r8 /* pt_regs->r13 = 0 */
91 pushq %r8 /* pt_regs->r14 = 0 */
92 pushq %r8 /* pt_regs->r15 = 0 */
1da177e4 93 cld
4c9c0e91 94
8c7aa698 95 /*
e7860411 96 * SYSENTER doesn't filter flags, so we need to clear NT and AC
8c7aa698 97 * ourselves. To save a few cycles, we can check whether
e7860411 98 * either was set instead of doing an unconditional popfq.
b611acf4
AL
99 * This needs to happen before enabling interrupts so that
100 * we don't get preempted with NT set.
374a3a39 101 *
f2b37575
AL
102 * If TF is set, we will single-step all the way to here -- do_debug
103 * will ignore all the traps. (Yes, this is slow, but so is
104 * single-stepping in general. This allows us to avoid having
105 * a more complicated code to handle the case where a user program
106 * forces us to single-step through the SYSENTER entry code.)
107 *
f74acf0e 108 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
374a3a39
BP
109 * out-of-line as an optimization: NT is unlikely to be set in the
110 * majority of the cases and instead of polluting the I$ unnecessarily,
111 * we're keeping that code behind a branch which will predict as
112 * not-taken and therefore its instructions won't be fetched.
8c7aa698 113 */
f2b37575 114 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
f74acf0e
BP
115 jnz .Lsysenter_fix_flags
116.Lsysenter_flags_fixed:
8c7aa698 117
a474e67c
AL
118 /*
119 * User mode is traced as though IRQs are on, and SYSENTER
120 * turned them off.
121 */
122 TRACE_IRQS_OFF
e62a254a 123
a474e67c
AL
124 movq %rsp, %rdi
125 call do_fast_syscall_32
91e2eea9
BO
126 /* XEN PV guests always use IRET path */
127 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
128 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
7841b408 129 jmp sysret32_from_system_call
1da177e4 130
f74acf0e 131.Lsysenter_fix_flags:
b611acf4 132 pushq $X86_EFLAGS_FIXED
131484c8 133 popfq
f74acf0e 134 jmp .Lsysenter_flags_fixed
f2b37575 135GLOBAL(__end_entry_SYSENTER_compat)
4c8cd0c5 136ENDPROC(entry_SYSENTER_compat)
1da177e4
LT
137
138/*
fda57b22
AL
139 * 32-bit SYSCALL entry.
140 *
141 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
142 * on 64-bit kernels running on AMD CPUs.
143 *
144 * The SYSCALL instruction, in principle, should *only* occur in the
145 * vDSO. In practice, it appears that this really is the case.
146 * As evidence:
147 *
148 * - The calling convention for SYSCALL has changed several times without
149 * anyone noticing.
150 *
151 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
152 * user task that did SYSCALL without immediately reloading SS
153 * would randomly crash.
1da177e4 154 *
fda57b22
AL
155 * - Most programmers do not directly target AMD CPUs, and the 32-bit
156 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD
157 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
158 * because the SYSCALL instruction in legacy/native 32-bit mode (as
159 * opposed to compat mode) is sufficiently poorly designed as to be
160 * essentially unusable.
b87cf63e 161 *
fda57b22
AL
162 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
163 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
164 * programmed MSRs. RFLAGS gets masked by a value from another MSR
165 * (so CLD and CLAC are not needed). SYSCALL does not save anything on
166 * the stack and does not change RSP.
167 *
168 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
54ad726c 169 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
fda57b22 170 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
b87cf63e
DV
171 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
172 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
173 *
1da177e4 174 * Arguments:
b87cf63e
DV
175 * eax system call number
176 * ecx return address
177 * ebx arg1
178 * ebp arg2 (note: not saved in the stack frame, should not be touched)
179 * edx arg3
180 * esi arg4
181 * edi arg5
182 * esp user stack
183 * 0(%esp) arg6
b87cf63e 184 */
2cd23553 185ENTRY(entry_SYSCALL_compat)
a474e67c 186 /* Interrupts are off on entry. */
457da70e 187 SWAPGS_UNSAFE_STACK
e62a254a 188
a474e67c 189 /* Stash user ESP and switch to the kernel stack. */
54ad726c
IM
190 movl %esp, %r8d
191 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
a232e3d5 192
4ee8ec17 193 /* Zero-extending 32-bit regs, do not remove */
54ad726c 194 movl %eax, %eax
4ee8ec17 195
4c9c0e91 196 /* Construct struct pt_regs on stack */
131484c8
IM
197 pushq $__USER32_DS /* pt_regs->ss */
198 pushq %r8 /* pt_regs->sp */
199 pushq %r11 /* pt_regs->flags */
200 pushq $__USER32_CS /* pt_regs->cs */
201 pushq %rcx /* pt_regs->ip */
202 pushq %rax /* pt_regs->orig_ax */
203 pushq %rdi /* pt_regs->di */
204 pushq %rsi /* pt_regs->si */
205 pushq %rdx /* pt_regs->dx */
30bfa7b3 206 pushq %rbp /* pt_regs->cx (stashed in bp) */
131484c8 207 pushq $-ENOSYS /* pt_regs->ax */
a474e67c
AL
208 xorq %r8,%r8
209 pushq %r8 /* pt_regs->r8 = 0 */
210 pushq %r8 /* pt_regs->r9 = 0 */
211 pushq %r8 /* pt_regs->r10 = 0 */
212 pushq %r8 /* pt_regs->r11 = 0 */
213 pushq %rbx /* pt_regs->rbx */
30bfa7b3 214 pushq %rbp /* pt_regs->rbp (will be overwritten) */
a474e67c
AL
215 pushq %r8 /* pt_regs->r12 = 0 */
216 pushq %r8 /* pt_regs->r13 = 0 */
217 pushq %r8 /* pt_regs->r14 = 0 */
218 pushq %r8 /* pt_regs->r15 = 0 */
4c9c0e91 219
a474e67c
AL
220 /*
221 * User mode is traced as though IRQs are on, and SYSENTER
222 * turned them off.
223 */
224 TRACE_IRQS_OFF
225
226 movq %rsp, %rdi
227 call do_fast_syscall_32
91e2eea9
BO
228 /* XEN PV guests always use IRET path */
229 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
230 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
7841b408
AL
231
232 /* Opportunistic SYSRET */
233sysret32_from_system_call:
234 TRACE_IRQS_ON /* User mode traces as IRQs on. */
235 movq RBX(%rsp), %rbx /* pt_regs->rbx */
236 movq RBP(%rsp), %rbp /* pt_regs->rbp */
237 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */
238 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */
239 addq $RAX, %rsp /* Skip r8-r15 */
240 popq %rax /* pt_regs->rax */
241 popq %rdx /* Skip pt_regs->cx */
242 popq %rdx /* pt_regs->dx */
243 popq %rsi /* pt_regs->si */
244 popq %rdi /* pt_regs->di */
245
246 /*
247 * USERGS_SYSRET32 does:
248 * GSBASE = user's GS base
249 * EIP = ECX
250 * RFLAGS = R11
251 * CS = __USER32_CS
252 * SS = __USER_DS
253 *
254 * ECX will not match pt_regs->cx, but we're returning to a vDSO
255 * trampoline that will fix up RCX, so this is okay.
256 *
257 * R12-R15 are callee-saved, so they contain whatever was in them
258 * when the system call started, which is already known to user
259 * code. We zero R8-R10 to avoid info leaks.
260 */
261 xorq %r8, %r8
262 xorq %r9, %r9
263 xorq %r10, %r10
264 movq RSP-ORIG_RAX(%rsp), %rsp
75ef8219
BO
265 swapgs
266 sysretl
2cd23553 267END(entry_SYSCALL_compat)
54ad726c 268
b87cf63e 269/*
fda57b22
AL
270 * 32-bit legacy system call entry.
271 *
272 * 32-bit x86 Linux system calls traditionally used the INT $0x80
273 * instruction. INT $0x80 lands here.
274 *
275 * This entry point can be used by 32-bit and 64-bit programs to perform
276 * 32-bit system calls. Instances of INT $0x80 can be found inline in
277 * various programs and libraries. It is also used by the vDSO's
278 * __kernel_vsyscall fallback for hardware that doesn't support a faster
279 * entry method. Restarted 32-bit system calls also fall back to INT
280 * $0x80 regardless of what instruction was originally used to do the
281 * system call.
282 *
283 * This is considered a slow path. It is not used by most libc
284 * implementations on modern hardware except during process startup.
1da177e4 285 *
b87cf63e
DV
286 * Arguments:
287 * eax system call number
288 * ebx arg1
289 * ecx arg2
290 * edx arg3
291 * esi arg4
292 * edi arg5
fda57b22 293 * ebp arg6
b87cf63e 294 */
2cd23553 295ENTRY(entry_INT80_compat)
2601e64d 296 /*
a232e3d5 297 * Interrupts are off on entry.
2601e64d 298 */
a232e3d5 299 PARAVIRT_ADJUST_EXCEPTION_FRAME
3d44d51b 300 ASM_CLAC /* Do this early to minimize exposure */
a232e3d5 301 SWAPGS
a232e3d5 302
ee08c6bd
AL
303 /*
304 * User tracing code (ptrace or signal handlers) might assume that
305 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
306 * syscall. Just in case the high bits are nonzero, zero-extend
307 * the syscall number. (This could almost certainly be deleted
308 * with no ill effects.)
309 */
54ad726c 310 movl %eax, %eax
4ee8ec17 311
4c9c0e91 312 /* Construct struct pt_regs on stack (iret frame is already on stack) */
131484c8
IM
313 pushq %rax /* pt_regs->orig_ax */
314 pushq %rdi /* pt_regs->di */
315 pushq %rsi /* pt_regs->si */
316 pushq %rdx /* pt_regs->dx */
317 pushq %rcx /* pt_regs->cx */
318 pushq $-ENOSYS /* pt_regs->ax */
8169aff6
AL
319 xorq %r8,%r8
320 pushq %r8 /* pt_regs->r8 = 0 */
321 pushq %r8 /* pt_regs->r9 = 0 */
322 pushq %r8 /* pt_regs->r10 = 0 */
323 pushq %r8 /* pt_regs->r11 = 0 */
324 pushq %rbx /* pt_regs->rbx */
325 pushq %rbp /* pt_regs->rbp */
326 pushq %r12 /* pt_regs->r12 */
327 pushq %r13 /* pt_regs->r13 */
328 pushq %r14 /* pt_regs->r14 */
329 pushq %r15 /* pt_regs->r15 */
1da177e4 330 cld
54ad726c 331
73cbf687 332 /*
ee08c6bd
AL
333 * User mode is traced as though IRQs are on, and the interrupt
334 * gate turned them off.
73cbf687 335 */
ee08c6bd
AL
336 TRACE_IRQS_OFF
337
338 movq %rsp, %rdi
a798f091 339 call do_int80_syscall_32
a474e67c 340.Lsyscall_32_done:
ee08c6bd
AL
341
342 /* Go back to user mode. */
343 TRACE_IRQS_ON
344 SWAPGS
345 jmp restore_regs_and_iret
2cd23553 346END(entry_INT80_compat)
1da177e4 347
1d4b4b29
AV
348 ALIGN
349GLOBAL(stub32_clone)
5cdc683b 350 /*
7a5a9824
DV
351 * The 32-bit clone ABI is: clone(..., int tls_val, int *child_tidptr).
352 * The 64-bit clone ABI is: clone(..., int *child_tidptr, int tls_val).
353 *
354 * The native 64-bit kernel's sys_clone() implements the latter,
355 * so we need to swap arguments here before calling it:
5cdc683b 356 */
7a5a9824 357 xchg %r8, %rcx
8169aff6 358 jmp sys_clone
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