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381aa07a DH |
1 | #ifndef _ASM_X86_DISABLED_FEATURES_H |
2 | #define _ASM_X86_DISABLED_FEATURES_H | |
3 | ||
4 | /* These features, although they might be available in a CPU | |
5 | * will not be used because the compile options to support | |
6 | * them are not present. | |
7 | * | |
8 | * This code allows them to be checked and disabled at | |
9 | * compile time without an explicit #ifdef. Use | |
10 | * cpu_feature_enabled(). | |
11 | */ | |
12 | ||
95290cf1 DH |
13 | #ifdef CONFIG_X86_INTEL_MPX |
14 | # define DISABLE_MPX 0 | |
15 | #else | |
16 | # define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31)) | |
17 | #endif | |
18 | ||
9298b815 DH |
19 | #ifdef CONFIG_X86_64 |
20 | # define DISABLE_VME (1<<(X86_FEATURE_VME & 31)) | |
21 | # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31)) | |
22 | # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31)) | |
23 | # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31)) | |
24 | #else | |
25 | # define DISABLE_VME 0 | |
26 | # define DISABLE_K6_MTRR 0 | |
27 | # define DISABLE_CYRIX_ARR 0 | |
28 | # define DISABLE_CENTAUR_MCR 0 | |
29 | #endif /* CONFIG_X86_64 */ | |
30 | ||
381aa07a DH |
31 | /* |
32 | * Make sure to add features to the correct mask | |
33 | */ | |
9298b815 | 34 | #define DISABLED_MASK0 (DISABLE_VME) |
381aa07a DH |
35 | #define DISABLED_MASK1 0 |
36 | #define DISABLED_MASK2 0 | |
9298b815 | 37 | #define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR) |
381aa07a DH |
38 | #define DISABLED_MASK4 0 |
39 | #define DISABLED_MASK5 0 | |
40 | #define DISABLED_MASK6 0 | |
41 | #define DISABLED_MASK7 0 | |
42 | #define DISABLED_MASK8 0 | |
95290cf1 | 43 | #define DISABLED_MASK9 (DISABLE_MPX) |
381aa07a DH |
44 | |
45 | #endif /* _ASM_X86_DISABLED_FEATURES_H */ |