projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 381aa07a DH |
1 | #ifndef _ASM_X86_DISABLED_FEATURES_H |
| 2 | #define _ASM_X86_DISABLED_FEATURES_H | |
| 3 | ||
| 4 | /* These features, although they might be available in a CPU | |
| 5 | * will not be used because the compile options to support | |
| 6 | * them are not present. | |
| 7 | * | |
| 8 | * This code allows them to be checked and disabled at | |
| 9 | * compile time without an explicit #ifdef. Use | |
| 10 | * cpu_feature_enabled(). | |
| 11 | */ | |
| 12 | ||
| 95290cf1 DH |
13 | #ifdef CONFIG_X86_INTEL_MPX |
| 14 | # define DISABLE_MPX 0 | |
| 15 | #else | |
| 16 | # define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31)) | |
| 17 | #endif | |
| 18 | ||
| 9298b815 DH |
19 | #ifdef CONFIG_X86_64 |
| 20 | # define DISABLE_VME (1<<(X86_FEATURE_VME & 31)) | |
| 21 | # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31)) | |
| 22 | # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31)) | |
| 23 | # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31)) | |
| 24 | #else | |
| 25 | # define DISABLE_VME 0 | |
| 26 | # define DISABLE_K6_MTRR 0 | |
| 27 | # define DISABLE_CYRIX_ARR 0 | |
| 28 | # define DISABLE_CENTAUR_MCR 0 | |
| 29 | #endif /* CONFIG_X86_64 */ | |
| 30 | ||
| dfb4a70f | 31 | #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS |
| dfb4a70f DH |
32 | # define DISABLE_PKU 0 |
| 33 | # define DISABLE_OSPKE 0 | |
| e8df1a95 DH |
34 | #else |
| 35 | # define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31)) | |
| 36 | # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31)) | |
| dfb4a70f DH |
37 | #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */ |
| 38 | ||
| 381aa07a DH |
39 | /* |
| 40 | * Make sure to add features to the correct mask | |
| 41 | */ | |
| 9298b815 | 42 | #define DISABLED_MASK0 (DISABLE_VME) |
| 381aa07a DH |
43 | #define DISABLED_MASK1 0 |
| 44 | #define DISABLED_MASK2 0 | |
| 9298b815 | 45 | #define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR) |
| 381aa07a DH |
46 | #define DISABLED_MASK4 0 |
| 47 | #define DISABLED_MASK5 0 | |
| 48 | #define DISABLED_MASK6 0 | |
| 49 | #define DISABLED_MASK7 0 | |
| 50 | #define DISABLED_MASK8 0 | |
| 95290cf1 | 51 | #define DISABLED_MASK9 (DISABLE_MPX) |
| dfb4a70f DH |
52 | #define DISABLED_MASK10 0 |
| 53 | #define DISABLED_MASK11 0 | |
| 54 | #define DISABLED_MASK12 0 | |
| 55 | #define DISABLED_MASK13 0 | |
| 56 | #define DISABLED_MASK14 0 | |
| 57 | #define DISABLED_MASK15 0 | |
| 58 | #define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE) | |
| 6e17cb9c | 59 | #define DISABLED_MASK17 0 |
| 1e61f78b | 60 | #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18) |
| 381aa07a DH |
61 | |
| 62 | #endif /* _ASM_X86_DISABLED_FEATURES_H */ |