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c7e7964c YL |
1 | #ifndef __ASM_ES7000_APIC_H |
2 | #define __ASM_ES7000_APIC_H | |
1da177e4 | 3 | |
4d9f9431 MT |
4 | #include <linux/gfp.h> |
5 | ||
cbe879fc | 6 | #define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu) |
1da177e4 | 7 | |
7ed248da | 8 | static inline int es7000_apic_id_registered(void) |
1da177e4 | 9 | { |
7ed248da | 10 | return 1; |
1da177e4 LT |
11 | } |
12 | ||
e7986739 | 13 | static inline const cpumask_t *target_cpus_cluster(void) |
c7e7964c | 14 | { |
e7986739 | 15 | return &CPU_MASK_ALL; |
b5fe363b YL |
16 | } |
17 | ||
0a9cc20b | 18 | static inline const cpumask_t *es7000_target_cpus(void) |
b5fe363b | 19 | { |
e7986739 | 20 | return &cpumask_of_cpu(smp_processor_id()); |
1da177e4 | 21 | } |
1da177e4 | 22 | |
b5fe363b YL |
23 | #define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER) |
24 | #define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio) | |
25 | #define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */ | |
b5fe363b | 26 | |
1da177e4 | 27 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) |
1da177e4 | 28 | |
d1d7cae8 IM |
29 | static inline unsigned long |
30 | es7000_check_apicid_used(physid_mask_t bitmap, int apicid) | |
c7e7964c | 31 | { |
1da177e4 | 32 | return 0; |
c7e7964c | 33 | } |
d1d7cae8 | 34 | static inline unsigned long es7000_check_apicid_present(int bit) |
1da177e4 LT |
35 | { |
36 | return physid_isset(bit, phys_cpu_present_map); | |
37 | } | |
38 | ||
39 | #define apicid_cluster(apicid) (apicid & 0xF0) | |
40 | ||
41 | static inline unsigned long calculate_ldr(int cpu) | |
42 | { | |
43 | unsigned long id; | |
44 | id = xapic_phys_to_log_apicid(cpu); | |
45 | return (SET_APIC_LOGICAL_ID(id)); | |
46 | } | |
47 | ||
48 | /* | |
49 | * Set up the logical destination ID. | |
50 | * | |
51 | * Intel recommends to set DFR, LdR and TPR before enabling | |
52 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
53 | * document number 292116). So here it goes... | |
54 | */ | |
a5c43296 | 55 | static inline void es7000_init_apic_ldr_cluster(void) |
b5fe363b YL |
56 | { |
57 | unsigned long val; | |
58 | int cpu = smp_processor_id(); | |
59 | ||
60 | apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER); | |
61 | val = calculate_ldr(cpu); | |
62 | apic_write(APIC_LDR, val); | |
63 | } | |
64 | ||
a5c43296 | 65 | static inline void es7000_init_apic_ldr(void) |
1da177e4 LT |
66 | { |
67 | unsigned long val; | |
68 | int cpu = smp_processor_id(); | |
69 | ||
593f4a78 | 70 | apic_write(APIC_DFR, APIC_DFR_VALUE); |
1da177e4 | 71 | val = calculate_ldr(cpu); |
593f4a78 | 72 | apic_write(APIC_LDR, val); |
1da177e4 LT |
73 | } |
74 | ||
1da177e4 | 75 | extern int apic_version [MAX_APICS]; |
72ce0165 | 76 | static inline void es7000_setup_apic_routing(void) |
1da177e4 | 77 | { |
cbe879fc | 78 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); |
e7986739 | 79 | printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", |
c7e7964c | 80 | (apic_version[apic] == 0x14) ? |
e7986739 | 81 | "Physical Cluster" : "Logical Cluster", |
0a9cc20b | 82 | nr_ioapics, cpus_addr(*es7000_target_cpus())[0]); |
1da177e4 LT |
83 | } |
84 | ||
85 | static inline int multi_timer_check(int apic, int irq) | |
86 | { | |
87 | return 0; | |
88 | } | |
89 | ||
90 | static inline int apicid_to_node(int logical_apicid) | |
91 | { | |
92 | return 0; | |
93 | } | |
94 | ||
95 | ||
96 | static inline int cpu_present_to_apicid(int mps_cpu) | |
97 | { | |
98 | if (!mps_cpu) | |
99 | return boot_cpu_physical_apicid; | |
e7986739 | 100 | else if (mps_cpu < nr_cpu_ids) |
cbe879fc | 101 | return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); |
1da177e4 LT |
102 | else |
103 | return BAD_APICID; | |
104 | } | |
105 | ||
106 | static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) | |
107 | { | |
108 | static int id = 0; | |
109 | physid_mask_t mask; | |
110 | mask = physid_mask_of_physid(id); | |
111 | ++id; | |
112 | return mask; | |
113 | } | |
114 | ||
115 | extern u8 cpu_2_logical_apicid[]; | |
116 | /* Mapping from cpu number to logical apicid */ | |
117 | static inline int cpu_to_logical_apicid(int cpu) | |
118 | { | |
874c4fe3 | 119 | #ifdef CONFIG_SMP |
e7986739 MT |
120 | if (cpu >= nr_cpu_ids) |
121 | return BAD_APICID; | |
122 | return (int)cpu_2_logical_apicid[cpu]; | |
874c4fe3 AK |
123 | #else |
124 | return logical_smp_processor_id(); | |
125 | #endif | |
1da177e4 LT |
126 | } |
127 | ||
d190cb87 | 128 | static inline physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map) |
1da177e4 LT |
129 | { |
130 | /* For clustered we don't have a good way to do this yet - hack */ | |
131 | return physids_promote(0xff); | |
132 | } | |
133 | ||
134 | ||
135 | static inline void setup_portio_remap(void) | |
136 | { | |
137 | } | |
138 | ||
139 | extern unsigned int boot_cpu_physical_apicid; | |
140 | static inline int check_phys_apicid_present(int cpu_physical_apicid) | |
141 | { | |
4c9961d5 | 142 | boot_cpu_physical_apicid = read_apic_id(); |
1da177e4 LT |
143 | return (1); |
144 | } | |
145 | ||
e7986739 MT |
146 | static inline unsigned int |
147 | cpu_mask_to_apicid_cluster(const struct cpumask *cpumask) | |
1da177e4 LT |
148 | { |
149 | int num_bits_set; | |
150 | int cpus_found = 0; | |
151 | int cpu; | |
c7e7964c | 152 | int apicid; |
1da177e4 | 153 | |
e7986739 | 154 | num_bits_set = cpumask_weight(cpumask); |
1da177e4 | 155 | /* Return id to all */ |
9628937d | 156 | if (num_bits_set == nr_cpu_ids) |
1da177e4 | 157 | return 0xFF; |
c7e7964c YL |
158 | /* |
159 | * The cpus in the mask must all be on the apic cluster. If are not | |
fe402e1f | 160 | * on the same apicid cluster return default value of target_cpus(): |
1da177e4 | 161 | */ |
e7986739 | 162 | cpu = cpumask_first(cpumask); |
1da177e4 LT |
163 | apicid = cpu_to_logical_apicid(cpu); |
164 | while (cpus_found < num_bits_set) { | |
e7986739 | 165 | if (cpumask_test_cpu(cpu, cpumask)) { |
1da177e4 | 166 | int new_apicid = cpu_to_logical_apicid(cpu); |
c7e7964c | 167 | if (apicid_cluster(apicid) != |
1da177e4 | 168 | apicid_cluster(new_apicid)){ |
d5c003b4 | 169 | printk ("%s: Not a valid mask!\n", __func__); |
1da177e4 | 170 | return 0xFF; |
b5fe363b YL |
171 | } |
172 | apicid = new_apicid; | |
173 | cpus_found++; | |
174 | } | |
175 | cpu++; | |
176 | } | |
177 | return apicid; | |
178 | } | |
179 | ||
e7986739 | 180 | static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) |
b5fe363b YL |
181 | { |
182 | int num_bits_set; | |
183 | int cpus_found = 0; | |
184 | int cpu; | |
185 | int apicid; | |
186 | ||
e7986739 | 187 | num_bits_set = cpus_weight(*cpumask); |
b5fe363b | 188 | /* Return id to all */ |
9628937d | 189 | if (num_bits_set == nr_cpu_ids) |
b5fe363b YL |
190 | return cpu_to_logical_apicid(0); |
191 | /* | |
192 | * The cpus in the mask must all be on the apic cluster. If are not | |
fe402e1f | 193 | * on the same apicid cluster return default value of target_cpus(): |
b5fe363b | 194 | */ |
e7986739 | 195 | cpu = first_cpu(*cpumask); |
b5fe363b YL |
196 | apicid = cpu_to_logical_apicid(cpu); |
197 | while (cpus_found < num_bits_set) { | |
e7986739 | 198 | if (cpu_isset(cpu, *cpumask)) { |
b5fe363b YL |
199 | int new_apicid = cpu_to_logical_apicid(cpu); |
200 | if (apicid_cluster(apicid) != | |
201 | apicid_cluster(new_apicid)){ | |
202 | printk ("%s: Not a valid mask!\n", __func__); | |
1da177e4 | 203 | return cpu_to_logical_apicid(0); |
1da177e4 LT |
204 | } |
205 | apicid = new_apicid; | |
206 | cpus_found++; | |
207 | } | |
208 | cpu++; | |
209 | } | |
210 | return apicid; | |
211 | } | |
212 | ||
a775a38b MT |
213 | |
214 | static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask, | |
6eeb7c5a | 215 | const struct cpumask *andmask) |
95d313cf | 216 | { |
a775a38b MT |
217 | int apicid = cpu_to_logical_apicid(0); |
218 | cpumask_var_t cpumask; | |
219 | ||
220 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | |
221 | return apicid; | |
222 | ||
223 | cpumask_and(cpumask, inmask, andmask); | |
224 | cpumask_and(cpumask, cpumask, cpu_online_mask); | |
9628937d | 225 | apicid = cpu_mask_to_apicid(cpumask); |
95d313cf | 226 | |
a775a38b | 227 | free_cpumask_var(cpumask); |
95d313cf MT |
228 | return apicid; |
229 | } | |
230 | ||
1da177e4 LT |
231 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) |
232 | { | |
233 | return cpuid_apic >> index_msb; | |
234 | } | |
235 | ||
c7e7964c | 236 | #endif /* __ASM_ES7000_APIC_H */ |