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77ef50a5 VN |
1 | #ifndef ASM_X86__IO_APIC_H |
2 | #define ASM_X86__IO_APIC_H | |
e1d91978 | 3 | |
a1a33fa3 | 4 | #include <linux/types.h> |
e1d91978 TG |
5 | #include <asm/mpspec.h> |
6 | #include <asm/apicdef.h> | |
9d6a4d08 | 7 | #include <asm/irq_vectors.h> |
e1d91978 TG |
8 | |
9 | /* | |
10 | * Intel IO-APIC support for SMP and UP systems. | |
11 | * | |
12 | * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar | |
13 | */ | |
14 | ||
d3f020d2 CG |
15 | /* I/O Unit Redirection Table */ |
16 | #define IO_APIC_REDIR_VECTOR_MASK 0x000FF | |
17 | #define IO_APIC_REDIR_DEST_LOGICAL 0x00800 | |
18 | #define IO_APIC_REDIR_DEST_PHYSICAL 0x00000 | |
19 | #define IO_APIC_REDIR_SEND_PENDING (1 << 12) | |
20 | #define IO_APIC_REDIR_REMOTE_IRR (1 << 14) | |
21 | #define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15) | |
22 | #define IO_APIC_REDIR_MASKED (1 << 16) | |
23 | ||
e1d91978 TG |
24 | /* |
25 | * The structure of the IO-APIC: | |
26 | */ | |
27 | union IO_APIC_reg_00 { | |
28 | u32 raw; | |
29 | struct { | |
30 | u32 __reserved_2 : 14, | |
31 | LTS : 1, | |
32 | delivery_type : 1, | |
33 | __reserved_1 : 8, | |
34 | ID : 8; | |
35 | } __attribute__ ((packed)) bits; | |
36 | }; | |
37 | ||
38 | union IO_APIC_reg_01 { | |
39 | u32 raw; | |
40 | struct { | |
41 | u32 version : 8, | |
42 | __reserved_2 : 7, | |
43 | PRQ : 1, | |
44 | entries : 8, | |
45 | __reserved_1 : 8; | |
46 | } __attribute__ ((packed)) bits; | |
47 | }; | |
48 | ||
49 | union IO_APIC_reg_02 { | |
50 | u32 raw; | |
51 | struct { | |
52 | u32 __reserved_2 : 24, | |
53 | arbitration : 4, | |
54 | __reserved_1 : 4; | |
55 | } __attribute__ ((packed)) bits; | |
56 | }; | |
57 | ||
58 | union IO_APIC_reg_03 { | |
59 | u32 raw; | |
60 | struct { | |
61 | u32 boot_DT : 1, | |
62 | __reserved_1 : 31; | |
63 | } __attribute__ ((packed)) bits; | |
64 | }; | |
65 | ||
66 | enum ioapic_irq_destination_types { | |
67 | dest_Fixed = 0, | |
68 | dest_LowestPrio = 1, | |
69 | dest_SMI = 2, | |
70 | dest__reserved_1 = 3, | |
71 | dest_NMI = 4, | |
72 | dest_INIT = 5, | |
73 | dest__reserved_2 = 6, | |
74 | dest_ExtINT = 7 | |
75 | }; | |
76 | ||
77 | struct IO_APIC_route_entry { | |
78 | __u32 vector : 8, | |
79 | delivery_mode : 3, /* 000: FIXED | |
80 | * 001: lowest prio | |
81 | * 111: ExtINT | |
82 | */ | |
83 | dest_mode : 1, /* 0: physical, 1: logical */ | |
84 | delivery_status : 1, | |
85 | polarity : 1, | |
86 | irr : 1, | |
87 | trigger : 1, /* 0: edge, 1: level */ | |
88 | mask : 1, /* 0: enabled, 1: disabled */ | |
89 | __reserved_2 : 15; | |
90 | ||
e1d91978 TG |
91 | __u32 __reserved_3 : 24, |
92 | dest : 8; | |
e1d91978 TG |
93 | } __attribute__ ((packed)); |
94 | ||
89027d35 SS |
95 | struct IR_IO_APIC_route_entry { |
96 | __u64 vector : 8, | |
97 | zero : 3, | |
98 | index2 : 1, | |
99 | delivery_status : 1, | |
100 | polarity : 1, | |
101 | irr : 1, | |
102 | trigger : 1, | |
103 | mask : 1, | |
104 | reserved : 31, | |
105 | format : 1, | |
106 | index : 15; | |
107 | } __attribute__ ((packed)); | |
108 | ||
e1d91978 TG |
109 | #ifdef CONFIG_X86_IO_APIC |
110 | ||
111 | /* | |
112 | * # of IO-APICs and # of IRQ routing registers | |
113 | */ | |
114 | extern int nr_ioapics; | |
115 | extern int nr_ioapic_registers[MAX_IO_APICS]; | |
116 | ||
117 | /* | |
118 | * MP-BIOS irq configuration table structures: | |
119 | */ | |
120 | ||
a1a33fa3 AM |
121 | #define MP_MAX_IOAPIC_PIN 127 |
122 | ||
ec2cd0a2 AS |
123 | struct mp_config_ioapic { |
124 | unsigned long mp_apicaddr; | |
125 | unsigned int mp_apicid; | |
126 | unsigned char mp_type; | |
127 | unsigned char mp_apicver; | |
128 | unsigned char mp_flags; | |
129 | }; | |
130 | ||
2fddb6e2 AS |
131 | struct mp_config_intsrc { |
132 | unsigned int mp_dstapic; | |
133 | unsigned char mp_type; | |
134 | unsigned char mp_irqtype; | |
135 | unsigned short mp_irqflag; | |
136 | unsigned char mp_srcbus; | |
137 | unsigned char mp_srcbusirq; | |
138 | unsigned char mp_dstirq; | |
9e5c5f1d AS |
139 | }; |
140 | ||
e1d91978 | 141 | /* I/O APIC entries */ |
ec2cd0a2 | 142 | extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; |
e1d91978 TG |
143 | |
144 | /* # of MP IRQ source entries */ | |
145 | extern int mp_irq_entries; | |
146 | ||
147 | /* MP IRQ source entries */ | |
2fddb6e2 | 148 | extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
e1d91978 TG |
149 | |
150 | /* non-0 if default (table-less) MP configuration */ | |
151 | extern int mpc_default_type; | |
152 | ||
153 | /* Older SiS APIC requires we rewrite the index register */ | |
154 | extern int sis_apic_bug; | |
155 | ||
156 | /* 1 if "noapic" boot option passed */ | |
157 | extern int skip_ioapic_setup; | |
158 | ||
35542c5e MR |
159 | /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ |
160 | extern int timer_through_8259; | |
161 | ||
e1d91978 TG |
162 | static inline void disable_ioapic_setup(void) |
163 | { | |
164 | skip_ioapic_setup = 1; | |
165 | } | |
166 | ||
167 | /* | |
168 | * If we use the IO-APIC for IRQ routing, disable automatic | |
169 | * assignment of PCI IRQ's. | |
170 | */ | |
171 | #define io_apic_assign_pci_irqs \ | |
172 | (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs) | |
173 | ||
174 | #ifdef CONFIG_ACPI | |
175 | extern int io_apic_get_unique_id(int ioapic, int apic_id); | |
176 | extern int io_apic_get_version(int ioapic); | |
177 | extern int io_apic_get_redir_entries(int ioapic); | |
178 | extern int io_apic_set_pci_routing(int ioapic, int pin, int irq, | |
179 | int edge_level, int active_high_low); | |
e1d91978 TG |
180 | #endif /* CONFIG_ACPI */ |
181 | ||
182 | extern int (*ioapic_renumber_irq)(int ioapic, int irq); | |
183 | extern void ioapic_init_mappings(void); | |
184 | ||
4dc2f96c SS |
185 | #ifdef CONFIG_X86_64 |
186 | extern int save_mask_IO_APIC_setup(void); | |
187 | extern void restore_IO_APIC_setup(void); | |
188 | extern void reinit_intr_remapped_IO_APIC(int); | |
189 | #endif | |
190 | ||
9d6a4d08 YL |
191 | extern int probe_nr_irqs(void); |
192 | ||
e1d91978 TG |
193 | #else /* !CONFIG_X86_IO_APIC */ |
194 | #define io_apic_assign_pci_irqs 0 | |
35542c5e | 195 | static const int timer_through_8259 = 0; |
f3294a33 | 196 | static inline void ioapic_init_mappings(void) { } |
9d6a4d08 YL |
197 | |
198 | static inline int probe_nr_irqs(void) | |
199 | { | |
200 | return NR_IRQS; | |
201 | } | |
e1d91978 TG |
202 | #endif |
203 | ||
77ef50a5 | 204 | #endif /* ASM_X86__IO_APIC_H */ |