[deliverable/linux.git] / arch / x86 / include / asm / kvm_emulate.h

/******************************************************************************
 * x86_emulate.h
 *
 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
 *
 * Copyright (c) 2005 Keir Fraser
 *
 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
 */

#ifndef _ASM_X86_KVM_X86_EMULATE_H
#define _ASM_X86_KVM_X86_EMULATE_H

#include <asm/desc_defs.h>

struct x86_emulate_ctxt;
enum x86_intercept;
enum x86_intercept_stage;

struct x86_exception {
	u8 vector;
	bool error_code_valid;
	u16 error_code;
	bool nested_page_fault;
	u64 address; /* cr2 or nested page fault gpa */
};

/*
 * This struct is used to carry enough information from the instruction
 * decoder to main KVM so that a decision can be made whether the
 * instruction needs to be intercepted or not.
 */
struct x86_instruction_info {
	u8  intercept;          /* which intercept                      */
	u8  rep_prefix;         /* rep prefix?                          */
	u8  modrm_mod;		/* mod part of modrm			*/
	u8  modrm_reg;          /* index of register used               */
	u8  modrm_rm;		/* rm part of modrm			*/
	u64 src_val;            /* value of source operand              */
	u64 dst_val;            /* value of destination operand         */
	u8  src_bytes;          /* size of source operand               */
	u8  dst_bytes;          /* size of destination operand          */
	u8  ad_bytes;           /* size of src/dst address              */
	u64 next_rip;           /* rip following the instruction        */
};

/*
 * x86_emulate_ops:
 *
 * These operations represent the instruction emulator's interface to memory.
 * There are two categories of operation: those that act on ordinary memory
 * regions (*_std), and those that act on memory regions known to require
 * special treatment or emulation (*_emulated).
 *
 * The emulator assumes that an instruction accesses only one 'emulated memory'
 * location, that this location is the given linear faulting address (cr2), and
 * that this is one of the instruction's data operands. Instruction fetches and
 * stack operations are assumed never to access emulated memory. The emulator
 * automatically deduces which operand of a string-move operation is accessing
 * emulated memory, and assumes that the other operand accesses normal memory.
 *
 * NOTES:
 *  1. The emulator isn't very smart about emulated vs. standard memory.
 *     'Emulated memory' access addresses should be checked for sanity.
 *     'Normal memory' accesses may fault, and the caller must arrange to
 *     detect and handle reentrancy into the emulator via recursive faults.
 *     Accesses may be unaligned and may cross page boundaries.
 *  2. If the access fails (cannot emulate, or a standard access faults) then
 *     it is up to the memop to propagate the fault to the guest VM via
 *     some out-of-band mechanism, unknown to the emulator. The memop signals
 *     failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
 *     then immediately bail.
 *  3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
 *     cmpxchg8b_emulated need support 8-byte accesses.
 *  4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
 */
/* Access completed successfully: continue emulation as normal. */
#define X86EMUL_CONTINUE        0
/* Access is unhandleable: bail from emulation and return error to caller. */
#define X86EMUL_UNHANDLEABLE    1
/* Terminate emulation but return success to the caller. */
#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
#define X86EMUL_RETRY_INSTR     3 /* retry the instruction for some reason */
#define X86EMUL_CMPXCHG_FAILED  4 /* cmpxchg did not see expected value */
#define X86EMUL_IO_NEEDED       5 /* IO is needed to complete emulation */
#define X86EMUL_INTERCEPTED     6 /* Intercepted by nested VMCB/VMCS */

struct x86_emulate_ops {
	/*
	 * read_gpr: read a general purpose register (rax - r15)
	 *
	 * @reg: gpr number.
	 */
	ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
	/*
	 * write_gpr: write a general purpose register (rax - r15)
	 *
	 * @reg: gpr number.
	 * @val: value to write.
	 */
	void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
	/*
	 * read_std: Read bytes of standard (non-emulated/special) memory.
	 *           Used for descriptor reading.
	 *  @addr:  [IN ] Linear address from which to read.
	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
	 *  @bytes: [IN ] Number of bytes to read from memory.
	 */
	int (*read_std)(struct x86_emulate_ctxt *ctxt,
			unsigned long addr, void *val,
			unsigned int bytes,
			struct x86_exception *fault);

	/*
	 * write_std: Write bytes of standard (non-emulated/special) memory.
	 *            Used for descriptor writing.
	 *  @addr:  [IN ] Linear address to which to write.
	 *  @val:   [OUT] Value write to memory, zero-extended to 'u_long'.
	 *  @bytes: [IN ] Number of bytes to write to memory.
	 */
	int (*write_std)(struct x86_emulate_ctxt *ctxt,
			 unsigned long addr, void *val, unsigned int bytes,
			 struct x86_exception *fault);
	/*
	 * fetch: Read bytes of standard (non-emulated/special) memory.
	 *        Used for instruction fetch.
	 *  @addr:  [IN ] Linear address from which to read.
	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
	 *  @bytes: [IN ] Number of bytes to read from memory.
	 */
	int (*fetch)(struct x86_emulate_ctxt *ctxt,
		     unsigned long addr, void *val, unsigned int bytes,
		     struct x86_exception *fault);

	/*
	 * read_emulated: Read bytes from emulated/special memory area.
	 *  @addr:  [IN ] Linear address from which to read.
	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
	 *  @bytes: [IN ] Number of bytes to read from memory.
	 */
	int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
			     unsigned long addr, void *val, unsigned int bytes,
			     struct x86_exception *fault);

	/*
	 * write_emulated: Write bytes to emulated/special memory area.
	 *  @addr:  [IN ] Linear address to which to write.
	 *  @val:   [IN ] Value to write to memory (low-order bytes used as
	 *                required).
	 *  @bytes: [IN ] Number of bytes to write to memory.
	 */
	int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
			      unsigned long addr, const void *val,
			      unsigned int bytes,
			      struct x86_exception *fault);

	/*
	 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
	 *                   emulated/special memory area.
	 *  @addr:  [IN ] Linear address to access.
	 *  @old:   [IN ] Value expected to be current at @addr.
	 *  @new:   [IN ] Value to write to @addr.
	 *  @bytes: [IN ] Number of bytes to access using CMPXCHG.
	 */
	int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
				unsigned long addr,
				const void *old,
				const void *new,
				unsigned int bytes,
				struct x86_exception *fault);
	void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);

	int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
			       int size, unsigned short port, void *val,
			       unsigned int count);

	int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
				int size, unsigned short port, const void *val,
				unsigned int count);

	bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
			    struct desc_struct *desc, u32 *base3, int seg);
	void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
			    struct desc_struct *desc, u32 base3, int seg);
	unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
						 int seg);
	void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
	void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
	void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
	void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
	ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
	int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
	int (*cpl)(struct x86_emulate_ctxt *ctxt);
	int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
	int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
	int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
	int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
	int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
	int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
	void (*halt)(struct x86_emulate_ctxt *ctxt);
	void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
	int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
	void (*get_fpu)(struct x86_emulate_ctxt *ctxt); /* disables preempt */
	void (*put_fpu)(struct x86_emulate_ctxt *ctxt); /* reenables preempt */
	int (*intercept)(struct x86_emulate_ctxt *ctxt,
			 struct x86_instruction_info *info,
			 enum x86_intercept_stage stage);

	void (*get_cpuid)(struct x86_emulate_ctxt *ctxt,
			  u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
};

typedef u32 __attribute__((vector_size(16))) sse128_t;

/* Type, address-of, and value of an instruction's operand. */
struct operand {
	enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
	unsigned int bytes;
	unsigned int count;
	union {
		unsigned long orig_val;
		u64 orig_val64;
	};
	union {
		unsigned long *reg;
		struct segmented_address {
			ulong ea;
			unsigned seg;
		} mem;
		unsigned xmm;
		unsigned mm;
	} addr;
	union {
		unsigned long val;
		u64 val64;
		char valptr[sizeof(sse128_t)];
		sse128_t vec_val;
		u64 mm_val;
		void *data;
	};
};

struct fetch_cache {
	u8 data[15];
	u8 *ptr;
	u8 *end;
};

struct read_cache {
	u8 data[1024];
	unsigned long pos;
	unsigned long end;
};

/* Execution mode, passed to the emulator. */
enum x86emul_mode {
	X86EMUL_MODE_REAL,	/* Real mode.             */
	X86EMUL_MODE_VM86,	/* Virtual 8086 mode.     */
	X86EMUL_MODE_PROT16,	/* 16-bit protected mode. */
	X86EMUL_MODE_PROT32,	/* 32-bit protected mode. */
	X86EMUL_MODE_PROT64,	/* 64-bit (long) mode.    */
};

struct x86_emulate_ctxt {
	const struct x86_emulate_ops *ops;

	/* Register state before/after emulation. */
	unsigned long eflags;
	unsigned long eip; /* eip before instruction emulation */
	/* Emulated execution mode, represented by an X86EMUL_MODE value. */
	enum x86emul_mode mode;

	/* interruptibility state, as a result of execution of STI or MOV SS */
	int interruptibility;

	bool guest_mode; /* guest running a nested guest */
	bool perm_ok; /* do not check permissions if true */
	bool ud;	/* inject an #UD if host doesn't support insn */

	bool have_exception;
	struct x86_exception exception;

	/*
	 * decode cache
	 */

	/* current opcode length in bytes */
	u8 opcode_len;
	u8 b;
	u8 intercept;
	u8 op_bytes;
	u8 ad_bytes;
	struct operand src;
	struct operand src2;
	struct operand dst;
	int (*execute)(struct x86_emulate_ctxt *ctxt);
	int (*check_perm)(struct x86_emulate_ctxt *ctxt);
	/*
	 * The following six fields are cleared together,
	 * the rest are initialized unconditionally in x86_decode_insn
	 * or elsewhere
	 */
	bool rip_relative;
	u8 rex_prefix;
	u8 lock_prefix;
	u8 rep_prefix;
	/* bitmaps of registers in _regs[] that can be read */
	u32 regs_valid;
	/* bitmaps of registers in _regs[] that have been written */
	u32 regs_dirty;
	/* modrm */
	u8 modrm;
	u8 modrm_mod;
	u8 modrm_reg;
	u8 modrm_rm;
	u8 modrm_seg;
	u8 seg_override;
	u64 d;
	unsigned long _eip;
	struct operand memop;
	/* Fields above regs are cleared together. */
	unsigned long _regs[NR_VCPU_REGS];
	struct operand *memopp;
	struct fetch_cache fetch;
	struct read_cache io_read;
	struct read_cache mem_read;
};

/* Repeat String Operation Prefix */
#define REPE_PREFIX	0xf3
#define REPNE_PREFIX	0xf2

/* CPUID vendors */
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65

#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273

#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69

enum x86_intercept_stage {
	X86_ICTP_NONE = 0,   /* Allow zero-init to not match anything */
	X86_ICPT_PRE_EXCEPT,
	X86_ICPT_POST_EXCEPT,
	X86_ICPT_POST_MEMACCESS,
};

enum x86_intercept {
	x86_intercept_none,
	x86_intercept_cr_read,
	x86_intercept_cr_write,
	x86_intercept_clts,
	x86_intercept_lmsw,
	x86_intercept_smsw,
	x86_intercept_dr_read,
	x86_intercept_dr_write,
	x86_intercept_lidt,
	x86_intercept_sidt,
	x86_intercept_lgdt,
	x86_intercept_sgdt,
	x86_intercept_lldt,
	x86_intercept_sldt,
	x86_intercept_ltr,
	x86_intercept_str,
	x86_intercept_rdtsc,
	x86_intercept_rdpmc,
	x86_intercept_pushf,
	x86_intercept_popf,
	x86_intercept_cpuid,
	x86_intercept_rsm,
	x86_intercept_iret,
	x86_intercept_intn,
	x86_intercept_invd,
	x86_intercept_pause,
	x86_intercept_hlt,
	x86_intercept_invlpg,
	x86_intercept_invlpga,
	x86_intercept_vmrun,
	x86_intercept_vmload,
	x86_intercept_vmsave,
	x86_intercept_vmmcall,
	x86_intercept_stgi,
	x86_intercept_clgi,
	x86_intercept_skinit,
	x86_intercept_rdtscp,
	x86_intercept_icebp,
	x86_intercept_wbinvd,
	x86_intercept_monitor,
	x86_intercept_mwait,
	x86_intercept_rdmsr,
	x86_intercept_wrmsr,
	x86_intercept_in,
	x86_intercept_ins,
	x86_intercept_out,
	x86_intercept_outs,

	nr_x86_intercepts
};

/* Host execution mode. */
#if defined(CONFIG_X86_32)
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
#elif defined(CONFIG_X86_64)
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
#endif

int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len);
bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
#define EMULATION_FAILED -1
#define EMULATION_OK 0
#define EMULATION_RESTART 1
#define EMULATION_INTERCEPTED 2
void init_decode_cache(struct x86_emulate_ctxt *ctxt);
int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
			 u16 tss_selector, int idt_index, int reason,
			 bool has_error_code, u32 error_code);
int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);

#endif /* _ASM_X86_KVM_X86_EMULATE_H */
Commit	Line	Data
6aa8b732 AK	1	/******************************************************************************
	2	* x86_emulate.h
	3	*
	4	* Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
	5	*
	6	* Copyright (c) 2005 Keir Fraser
	7	*
	8	* From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
	9	*/
	10
1965aae3 PA	11	#ifndef _ASM_X86_KVM_X86_EMULATE_H
1965aae3 PA	12	#define _ASM_X86_KVM_X86_EMULATE_H
6aa8b732	13
38ba30ba GN	14	#include <asm/desc_defs.h>
38ba30ba GN	15
6aa8b732	16	struct x86_emulate_ctxt;
c4f035c6 AK	17	enum x86_intercept;
c4f035c6 AK	18	enum x86_intercept_stage;
6aa8b732	19
da9cb575 AK	20	struct x86_exception {
	21	u8 vector;
	22	bool error_code_valid;
	23	u16 error_code;
6389ee94 AK	24	bool nested_page_fault;
6389ee94 AK	25	u64 address; /* cr2 or nested page fault gpa */
da9cb575 AK	26	};
da9cb575 AK	27
8a76d7f2 JR	28	/*
	29	* This struct is used to carry enough information from the instruction
	30	* decoder to main KVM so that a decision can be made whether the
	31	* instruction needs to be intercepted or not.
	32	*/
	33	struct x86_instruction_info {
	34	u8 intercept; /* which intercept */
	35	u8 rep_prefix; /* rep prefix? */
	36	u8 modrm_mod; /* mod part of modrm */
	37	u8 modrm_reg; /* index of register used */
	38	u8 modrm_rm; /* rm part of modrm */
	39	u64 src_val; /* value of source operand */
6cbc5f5a	40	u64 dst_val; /* value of destination operand */
8a76d7f2 JR	41	u8 src_bytes; /* size of source operand */
	42	u8 dst_bytes; /* size of destination operand */
	43	u8 ad_bytes; /* size of src/dst address */
	44	u64 next_rip; /* rip following the instruction */
	45	};
	46
6aa8b732 AK	47	/*
	48	* x86_emulate_ops:
	49	*
	50	* These operations represent the instruction emulator's interface to memory.
	51	* There are two categories of operation: those that act on ordinary memory
	52	* regions (*_std), and those that act on memory regions known to require
	53	* special treatment or emulation (*_emulated).
	54	*
	55	* The emulator assumes that an instruction accesses only one 'emulated memory'
	56	* location, that this location is the given linear faulting address (cr2), and
	57	* that this is one of the instruction's data operands. Instruction fetches and
	58	* stack operations are assumed never to access emulated memory. The emulator
	59	* automatically deduces which operand of a string-move operation is accessing
	60	* emulated memory, and assumes that the other operand accesses normal memory.
	61	*
	62	* NOTES:
	63	* 1. The emulator isn't very smart about emulated vs. standard memory.
	64	* 'Emulated memory' access addresses should be checked for sanity.
	65	* 'Normal memory' accesses may fault, and the caller must arrange to
	66	* detect and handle reentrancy into the emulator via recursive faults.
	67	* Accesses may be unaligned and may cross page boundaries.
	68	* 2. If the access fails (cannot emulate, or a standard access faults) then
	69	* it is up to the memop to propagate the fault to the guest VM via
	70	* some out-of-band mechanism, unknown to the emulator. The memop signals
	71	* failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
	72	* then immediately bail.
	73	* 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
	74	* cmpxchg8b_emulated need support 8-byte accesses.
	75	* 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
	76	*/
	77	/* Access completed successfully: continue emulation as normal. */
	78	#define X86EMUL_CONTINUE 0
	79	/* Access is unhandleable: bail from emulation and return error to caller. */
	80	#define X86EMUL_UNHANDLEABLE 1
	81	/* Terminate emulation but return success to the caller. */
	82	#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
e680080e GN	83	#define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
e680080e GN	84	#define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
c3cd7ffa	85	#define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
c4f035c6	86	#define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */
e680080e	87
6aa8b732	88	struct x86_emulate_ops {
dd856efa AK	89	/*
	90	* read_gpr: read a general purpose register (rax - r15)
	91	*
	92	* @reg: gpr number.
	93	*/
	94	ulong (read_gpr)(struct x86_emulate_ctxt ctxt, unsigned reg);
	95	/*
	96	* write_gpr: write a general purpose register (rax - r15)
	97	*
	98	* @reg: gpr number.
	99	* @val: value to write.
	100	*/
	101	void (write_gpr)(struct x86_emulate_ctxt ctxt, unsigned reg, ulong val);
6aa8b732 AK	102	/*
6aa8b732 AK	103	* read_std: Read bytes of standard (non-emulated/special) memory.
1871c602	104	* Used for descriptor reading.
6aa8b732 AK	105	* @addr: [IN ] Linear address from which to read.
	106	* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
	107	* @bytes: [IN ] Number of bytes to read from memory.
	108	*/
0f65dd70 AK	109	int (read_std)(struct x86_emulate_ctxt ctxt,
	110	unsigned long addr, void *val,
	111	unsigned int bytes,
bcc55cba	112	struct x86_exception *fault);
1871c602	113
2dafc6c2 GN	114	/*
	115	* write_std: Write bytes of standard (non-emulated/special) memory.
	116	* Used for descriptor writing.
	117	* @addr: [IN ] Linear address to which to write.
	118	* @val: [OUT] Value write to memory, zero-extended to 'u_long'.
	119	* @bytes: [IN ] Number of bytes to write to memory.
	120	*/
0f65dd70 AK	121	int (write_std)(struct x86_emulate_ctxt ctxt,
0f65dd70 AK	122	unsigned long addr, void *val, unsigned int bytes,
bcc55cba	123	struct x86_exception *fault);
1871c602 GN	124	/*
	125	* fetch: Read bytes of standard (non-emulated/special) memory.
	126	* Used for instruction fetch.
	127	* @addr: [IN ] Linear address from which to read.
	128	* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
	129	* @bytes: [IN ] Number of bytes to read from memory.
	130	*/
0f65dd70 AK	131	int (fetch)(struct x86_emulate_ctxt ctxt,
0f65dd70 AK	132	unsigned long addr, void *val, unsigned int bytes,
bcc55cba	133	struct x86_exception *fault);
6aa8b732 AK	134
	135	/*
	136	* read_emulated: Read bytes from emulated/special memory area.
	137	* @addr: [IN ] Linear address from which to read.
	138	* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
	139	* @bytes: [IN ] Number of bytes to read from memory.
	140	*/
0f65dd70 AK	141	int (read_emulated)(struct x86_emulate_ctxt ctxt,
	142	unsigned long addr, void *val, unsigned int bytes,
	143	struct x86_exception *fault);
6aa8b732 AK	144
6aa8b732 AK	145	/*
0d178975	146	* write_emulated: Write bytes to emulated/special memory area.
6aa8b732 AK	147	* @addr: [IN ] Linear address to which to write.
	148	* @val: [IN ] Value to write to memory (low-order bytes used as
	149	* required).
	150	* @bytes: [IN ] Number of bytes to write to memory.
	151	*/
0f65dd70 AK	152	int (write_emulated)(struct x86_emulate_ctxt ctxt,
0f65dd70 AK	153	unsigned long addr, const void *val,
0c7825e6	154	unsigned int bytes,
0f65dd70	155	struct x86_exception *fault);
6aa8b732 AK	156
	157	/*
	158	* cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
	159	* emulated/special memory area.
	160	* @addr: [IN ] Linear address to access.
	161	* @old: [IN ] Value expected to be current at @addr.
	162	* @new: [IN ] Value to write to @addr.
	163	* @bytes: [IN ] Number of bytes to access using CMPXCHG.
	164	*/
0f65dd70 AK	165	int (cmpxchg_emulated)(struct x86_emulate_ctxt ctxt,
0f65dd70 AK	166	unsigned long addr,
0c7825e6 JP	167	const void *old,
	168	const void *new,
	169	unsigned int bytes,
0f65dd70	170	struct x86_exception *fault);
3cb16fe7	171	void (invlpg)(struct x86_emulate_ctxt ctxt, ulong addr);
cf8f70bf	172
ca1d4a9e AK	173	int (pio_in_emulated)(struct x86_emulate_ctxt ctxt,
	174	int size, unsigned short port, void *val,
	175	unsigned int count);
cf8f70bf	176
ca1d4a9e AK	177	int (pio_out_emulated)(struct x86_emulate_ctxt ctxt,
	178	int size, unsigned short port, const void *val,
	179	unsigned int count);
cf8f70bf	180
1aa36616 AK	181	bool (get_segment)(struct x86_emulate_ctxt ctxt, u16 *selector,
	182	struct desc_struct desc, u32 base3, int seg);
	183	void (set_segment)(struct x86_emulate_ctxt ctxt, u16 selector,
	184	struct desc_struct *desc, u32 base3, int seg);
4bff1e86 AK	185	unsigned long (get_cached_segment_base)(struct x86_emulate_ctxt ctxt,
	186	int seg);
	187	void (get_gdt)(struct x86_emulate_ctxt ctxt, struct desc_ptr *dt);
	188	void (get_idt)(struct x86_emulate_ctxt ctxt, struct desc_ptr *dt);
1ac9d0cf AK	189	void (set_gdt)(struct x86_emulate_ctxt ctxt, struct desc_ptr *dt);
1ac9d0cf AK	190	void (set_idt)(struct x86_emulate_ctxt ctxt, struct desc_ptr *dt);
717746e3 AK	191	ulong (get_cr)(struct x86_emulate_ctxt ctxt, int cr);
	192	int (set_cr)(struct x86_emulate_ctxt ctxt, int cr, ulong val);
	193	int (cpl)(struct x86_emulate_ctxt ctxt);
	194	int (get_dr)(struct x86_emulate_ctxt ctxt, int dr, ulong *dest);
	195	int (set_dr)(struct x86_emulate_ctxt ctxt, int dr, ulong value);
	196	int (set_msr)(struct x86_emulate_ctxt ctxt, u32 msr_index, u64 data);
	197	int (get_msr)(struct x86_emulate_ctxt ctxt, u32 msr_index, u64 *pdata);
67f4d428	198	int (check_pmc)(struct x86_emulate_ctxt ctxt, u32 pmc);
222d21aa	199	int (read_pmc)(struct x86_emulate_ctxt ctxt, u32 pmc, u64 *pdata);
6c3287f7	200	void (halt)(struct x86_emulate_ctxt ctxt);
bcaf5cc5	201	void (wbinvd)(struct x86_emulate_ctxt ctxt);
d6aa1000	202	int (fix_hypercall)(struct x86_emulate_ctxt ctxt);
5037f6f3 AK	203	void (get_fpu)(struct x86_emulate_ctxt ctxt); /* disables preempt */
5037f6f3 AK	204	void (put_fpu)(struct x86_emulate_ctxt ctxt); /* reenables preempt */
2953538e	205	int (intercept)(struct x86_emulate_ctxt ctxt,
8a76d7f2	206	struct x86_instruction_info *info,
c4f035c6	207	enum x86_intercept_stage stage);
bdb42f5a	208
0017f93a AK	209	void (get_cpuid)(struct x86_emulate_ctxt ctxt,
0017f93a AK	210	u32 eax, u32 ebx, u32 ecx, u32 edx);
6aa8b732 AK	211	};
6aa8b732 AK	212
1253791d AK	213	typedef u32 __attribute__((vector_size(16))) sse128_t;
1253791d AK	214
e4e03ded LV	215	/* Type, address-of, and value of an instruction's operand. */
e4e03ded LV	216	struct operand {
b3356bf0	217	enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
e4e03ded	218	unsigned int bytes;
b3356bf0	219	unsigned int count;
16518d5a AK	220	union {
	221	unsigned long orig_val;
	222	u64 orig_val64;
	223	};
1a6440ae AK	224	union {
1a6440ae AK	225	unsigned long *reg;
90de84f5 AK	226	struct segmented_address {
	227	ulong ea;
	228	unsigned seg;
	229	} mem;
1253791d	230	unsigned xmm;
cbe2c9d3	231	unsigned mm;
1a6440ae	232	} addr;
414e6277 GN	233	union {
414e6277 GN	234	unsigned long val;
16518d5a	235	u64 val64;
54cfdb3e	236	char valptr[sizeof(sse128_t)];
1253791d	237	sse128_t vec_val;
cbe2c9d3	238	u64 mm_val;
b3356bf0	239	void *data;
414e6277	240	};
e4e03ded LV	241	};
e4e03ded LV	242
62266869 AK	243	struct fetch_cache {
62266869 AK	244	u8 data[15];
17052f16 PB	245	u8 *ptr;
17052f16 PB	246	u8 *end;
62266869 AK	247	};
62266869 AK	248
7b262e90 GN	249	struct read_cache {
	250	u8 data[1024];
	251	unsigned long pos;
	252	unsigned long end;
	253	};
	254
9d1b39a9 GN	255	/* Execution mode, passed to the emulator. */
	256	enum x86emul_mode {
	257	X86EMUL_MODE_REAL, /* Real mode. */
	258	X86EMUL_MODE_VM86, /* Virtual 8086 mode. */
	259	X86EMUL_MODE_PROT16, /* 16-bit protected mode. */
	260	X86EMUL_MODE_PROT32, /* 32-bit protected mode. */
	261	X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */
	262	};
	263
9dac77fa	264	struct x86_emulate_ctxt {
0225fb50	265	const struct x86_emulate_ops *ops;
9dac77fa AK	266
	267	/* Register state before/after emulation. */
	268	unsigned long eflags;
	269	unsigned long eip; /* eip before instruction emulation */
	270	/* Emulated execution mode, represented by an X86EMUL_MODE value. */
9d1b39a9	271	enum x86emul_mode mode;
9dac77fa AK	272
	273	/* interruptibility state, as a result of execution of STI or MOV SS */
	274	int interruptibility;
	275
	276	bool guest_mode; /* guest running a nested guest */
	277	bool perm_ok; /* do not check permissions if true */
b51e974f	278	bool ud; /* inject an #UD if host doesn't support insn */
9dac77fa AK	279
	280	bool have_exception;
	281	struct x86_exception exception;
	282
1ce19dc1 BP	283	/*
	284	* decode cache
	285	*/
	286
	287	/* current opcode length in bytes */
	288	u8 opcode_len;
e4e03ded	289	u8 b;
c4f035c6	290	u8 intercept;
e4e03ded LV	291	u8 op_bytes;
	292	u8 ad_bytes;
	293	struct operand src;
0dc8d10f	294	struct operand src2;
e4e03ded	295	struct operand dst;
ef65c889	296	int (execute)(struct x86_emulate_ctxt ctxt);
d09beabd	297	int (check_perm)(struct x86_emulate_ctxt ctxt);
41061cdb BD	298	/*
	299	* The following six fields are cleared together,
	300	* the rest are initialized unconditionally in x86_decode_insn
	301	* or elsewhere
	302	*/
c44b4c6a BD	303	bool rip_relative;
	304	u8 rex_prefix;
	305	u8 lock_prefix;
	306	u8 rep_prefix;
c44b4c6a BD	307	/* bitmaps of registers in _regs[] that can be read */
	308	u32 regs_valid;
	309	/* bitmaps of registers in _regs[] that have been written */
	310	u32 regs_dirty;
e4e03ded LV	311	/* modrm */
	312	u8 modrm;
	313	u8 modrm_mod;
	314	u8 modrm_reg;
	315	u8 modrm_rm;
09ee57cd	316	u8 modrm_seg;
573e80fe	317	u8 seg_override;
c44b4c6a	318	u64 d;
36dd9bb5	319	unsigned long _eip;
cbd27ee7	320	struct operand memop;
b5c9ff73	321	/* Fields above regs are cleared together. */
dd856efa	322	unsigned long _regs[NR_VCPU_REGS];
f09ed83e	323	struct operand *memopp;
62266869	324	struct fetch_cache fetch;
7b262e90	325	struct read_cache io_read;
9de41573	326	struct read_cache mem_read;
e4e03ded LV	327	};
e4e03ded LV	328
90e0a28f	329	/* Repeat String Operation Prefix */
1d6b114f AK	330	#define REPE_PREFIX 0xf3
1d6b114f AK	331	#define REPNE_PREFIX 0xf2
90e0a28f	332
c2226fc9 SB	333	/* CPUID vendors */
	334	#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
	335	#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
	336	#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
	337
	338	#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
	339	#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
	340	#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
	341
	342	#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
	343	#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
	344	#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
	345
c4f035c6	346	enum x86_intercept_stage {
40e19b51	347	X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */
c4f035c6 AK	348	X86_ICPT_PRE_EXCEPT,
	349	X86_ICPT_POST_EXCEPT,
	350	X86_ICPT_POST_MEMACCESS,
	351	};
	352
	353	enum x86_intercept {
	354	x86_intercept_none,
cfec82cb JR	355	x86_intercept_cr_read,
	356	x86_intercept_cr_write,
	357	x86_intercept_clts,
3c6e276f AK	358	x86_intercept_lmsw,
3c6e276f AK	359	x86_intercept_smsw,
3b88e41a JR	360	x86_intercept_dr_read,
3b88e41a JR	361	x86_intercept_dr_write,
3c6e276f AK	362	x86_intercept_lidt,
	363	x86_intercept_sidt,
	364	x86_intercept_lgdt,
	365	x86_intercept_sgdt,
	366	x86_intercept_lldt,
	367	x86_intercept_sldt,
	368	x86_intercept_ltr,
	369	x86_intercept_str,
	370	x86_intercept_rdtsc,
	371	x86_intercept_rdpmc,
	372	x86_intercept_pushf,
	373	x86_intercept_popf,
	374	x86_intercept_cpuid,
	375	x86_intercept_rsm,
	376	x86_intercept_iret,
	377	x86_intercept_intn,
	378	x86_intercept_invd,
	379	x86_intercept_pause,
	380	x86_intercept_hlt,
	381	x86_intercept_invlpg,
	382	x86_intercept_invlpga,
	383	x86_intercept_vmrun,
	384	x86_intercept_vmload,
	385	x86_intercept_vmsave,
	386	x86_intercept_vmmcall,
	387	x86_intercept_stgi,
	388	x86_intercept_clgi,
	389	x86_intercept_skinit,
	390	x86_intercept_rdtscp,
	391	x86_intercept_icebp,
	392	x86_intercept_wbinvd,
	393	x86_intercept_monitor,
	394	x86_intercept_mwait,
8061252e JR	395	x86_intercept_rdmsr,
8061252e JR	396	x86_intercept_wrmsr,
f6511935 JR	397	x86_intercept_in,
	398	x86_intercept_ins,
	399	x86_intercept_out,
	400	x86_intercept_outs,
c4f035c6 AK	401
	402	nr_x86_intercepts
	403	};
	404
6aa8b732	405	/* Host execution mode. */
d73fa29a	406	#if defined(CONFIG_X86_32)
6aa8b732	407	#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
05b3e0c2	408	#elif defined(CONFIG_X86_64)
6aa8b732 AK	409	#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
	410	#endif
	411
dc25e89e	412	int x86_decode_insn(struct x86_emulate_ctxt ctxt, void insn, int insn_len);
1cb3f3ae	413	bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
d2ddd1c4 GN	414	#define EMULATION_FAILED -1
	415	#define EMULATION_OK 0
	416	#define EMULATION_RESTART 1
775fde86	417	#define EMULATION_INTERCEPTED 2
1498507a	418	void init_decode_cache(struct x86_emulate_ctxt *ctxt);
9aabc88f	419	int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
38ba30ba	420	int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
7f3d35fd	421	u16 tss_selector, int idt_index, int reason,
e269fb21	422	bool has_error_code, u32 error_code);
7b105ca2	423	int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
dd856efa AK	424	void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
	425	void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
	426
1965aae3	427	#endif /* _ASM_X86_KVM_X86_EMULATE_H */