[deliverable/linux.git] / arch / x86 / include / asm / kvm_emulate.h

/******************************************************************************
 * x86_emulate.h
 *
 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
 *
 * Copyright (c) 2005 Keir Fraser
 *
 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
 */

#ifndef _ASM_X86_KVM_X86_EMULATE_H
#define _ASM_X86_KVM_X86_EMULATE_H

#include <asm/desc_defs.h>

struct x86_emulate_ctxt;
enum x86_intercept;
enum x86_intercept_stage;

struct x86_exception {
	u8 vector;
	bool error_code_valid;
	u16 error_code;
	bool nested_page_fault;
	u64 address; /* cr2 or nested page fault gpa */
};

/*
 * This struct is used to carry enough information from the instruction
 * decoder to main KVM so that a decision can be made whether the
 * instruction needs to be intercepted or not.
 */
struct x86_instruction_info {
	u8  intercept;          /* which intercept                      */
	u8  rep_prefix;         /* rep prefix?                          */
	u8  modrm_mod;		/* mod part of modrm			*/
	u8  modrm_reg;          /* index of register used               */
	u8  modrm_rm;		/* rm part of modrm			*/
	u64 src_val;            /* value of source operand              */
	u8  src_bytes;          /* size of source operand               */
	u8  dst_bytes;          /* size of destination operand          */
	u8  ad_bytes;           /* size of src/dst address              */
	u64 next_rip;           /* rip following the instruction        */
};

/*
 * x86_emulate_ops:
 *
 * These operations represent the instruction emulator's interface to memory.
 * There are two categories of operation: those that act on ordinary memory
 * regions (*_std), and those that act on memory regions known to require
 * special treatment or emulation (*_emulated).
 *
 * The emulator assumes that an instruction accesses only one 'emulated memory'
 * location, that this location is the given linear faulting address (cr2), and
 * that this is one of the instruction's data operands. Instruction fetches and
 * stack operations are assumed never to access emulated memory. The emulator
 * automatically deduces which operand of a string-move operation is accessing
 * emulated memory, and assumes that the other operand accesses normal memory.
 *
 * NOTES:
 *  1. The emulator isn't very smart about emulated vs. standard memory.
 *     'Emulated memory' access addresses should be checked for sanity.
 *     'Normal memory' accesses may fault, and the caller must arrange to
 *     detect and handle reentrancy into the emulator via recursive faults.
 *     Accesses may be unaligned and may cross page boundaries.
 *  2. If the access fails (cannot emulate, or a standard access faults) then
 *     it is up to the memop to propagate the fault to the guest VM via
 *     some out-of-band mechanism, unknown to the emulator. The memop signals
 *     failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
 *     then immediately bail.
 *  3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
 *     cmpxchg8b_emulated need support 8-byte accesses.
 *  4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
 */
/* Access completed successfully: continue emulation as normal. */
#define X86EMUL_CONTINUE        0
/* Access is unhandleable: bail from emulation and return error to caller. */
#define X86EMUL_UNHANDLEABLE    1
/* Terminate emulation but return success to the caller. */
#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
#define X86EMUL_RETRY_INSTR     3 /* retry the instruction for some reason */
#define X86EMUL_CMPXCHG_FAILED  4 /* cmpxchg did not see expected value */
#define X86EMUL_IO_NEEDED       5 /* IO is needed to complete emulation */
#define X86EMUL_INTERCEPTED     6 /* Intercepted by nested VMCB/VMCS */

struct x86_emulate_ops {
	/*
	 * read_gpr: read a general purpose register (rax - r15)
	 *
	 * @reg: gpr number.
	 */
	ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
	/*
	 * write_gpr: write a general purpose register (rax - r15)
	 *
	 * @reg: gpr number.
	 * @val: value to write.
	 */
	void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
	/*
	 * read_std: Read bytes of standard (non-emulated/special) memory.
	 *           Used for descriptor reading.
	 *  @addr:  [IN ] Linear address from which to read.
	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
	 *  @bytes: [IN ] Number of bytes to read from memory.
	 */
	int (*read_std)(struct x86_emulate_ctxt *ctxt,
			unsigned long addr, void *val,
			unsigned int bytes,
			struct x86_exception *fault);

	/*
	 * write_std: Write bytes of standard (non-emulated/special) memory.
	 *            Used for descriptor writing.
	 *  @addr:  [IN ] Linear address to which to write.
	 *  @val:   [OUT] Value write to memory, zero-extended to 'u_long'.
	 *  @bytes: [IN ] Number of bytes to write to memory.
	 */
	int (*write_std)(struct x86_emulate_ctxt *ctxt,
			 unsigned long addr, void *val, unsigned int bytes,
			 struct x86_exception *fault);
	/*
	 * fetch: Read bytes of standard (non-emulated/special) memory.
	 *        Used for instruction fetch.
	 *  @addr:  [IN ] Linear address from which to read.
	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
	 *  @bytes: [IN ] Number of bytes to read from memory.
	 */
	int (*fetch)(struct x86_emulate_ctxt *ctxt,
		     unsigned long addr, void *val, unsigned int bytes,
		     struct x86_exception *fault);

	/*
	 * read_emulated: Read bytes from emulated/special memory area.
	 *  @addr:  [IN ] Linear address from which to read.
	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
	 *  @bytes: [IN ] Number of bytes to read from memory.
	 */
	int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
			     unsigned long addr, void *val, unsigned int bytes,
			     struct x86_exception *fault);

	/*
	 * write_emulated: Write bytes to emulated/special memory area.
	 *  @addr:  [IN ] Linear address to which to write.
	 *  @val:   [IN ] Value to write to memory (low-order bytes used as
	 *                required).
	 *  @bytes: [IN ] Number of bytes to write to memory.
	 */
	int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
			      unsigned long addr, const void *val,
			      unsigned int bytes,
			      struct x86_exception *fault);

	/*
	 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
	 *                   emulated/special memory area.
	 *  @addr:  [IN ] Linear address to access.
	 *  @old:   [IN ] Value expected to be current at @addr.
	 *  @new:   [IN ] Value to write to @addr.
	 *  @bytes: [IN ] Number of bytes to access using CMPXCHG.
	 */
	int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
				unsigned long addr,
				const void *old,
				const void *new,
				unsigned int bytes,
				struct x86_exception *fault);
	void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);

	int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
			       int size, unsigned short port, void *val,
			       unsigned int count);

	int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
				int size, unsigned short port, const void *val,
				unsigned int count);

	bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
			    struct desc_struct *desc, u32 *base3, int seg);
	void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
			    struct desc_struct *desc, u32 base3, int seg);
	unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
						 int seg);
	void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
	void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
	void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
	void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
	ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
	int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
	void (*set_rflags)(struct x86_emulate_ctxt *ctxt, ulong val);
	int (*cpl)(struct x86_emulate_ctxt *ctxt);
	int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
	int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
	int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
	int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
	int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
	void (*halt)(struct x86_emulate_ctxt *ctxt);
	void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
	int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
	void (*get_fpu)(struct x86_emulate_ctxt *ctxt); /* disables preempt */
	void (*put_fpu)(struct x86_emulate_ctxt *ctxt); /* reenables preempt */
	int (*intercept)(struct x86_emulate_ctxt *ctxt,
			 struct x86_instruction_info *info,
			 enum x86_intercept_stage stage);

	void (*get_cpuid)(struct x86_emulate_ctxt *ctxt,
			  u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
};

typedef u32 __attribute__((vector_size(16))) sse128_t;

/* Type, address-of, and value of an instruction's operand. */
struct operand {
	enum { OP_REG, OP_MEM, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
	unsigned int bytes;
	union {
		unsigned long orig_val;
		u64 orig_val64;
	};
	union {
		unsigned long *reg;
		struct segmented_address {
			ulong ea;
			unsigned seg;
		} mem;
		unsigned xmm;
		unsigned mm;
	} addr;
	union {
		unsigned long val;
		u64 val64;
		char valptr[sizeof(unsigned long) + 2];
		sse128_t vec_val;
		u64 mm_val;
	};
};

struct fetch_cache {
	u8 data[15];
	unsigned long start;
	unsigned long end;
};

struct read_cache {
	u8 data[1024];
	unsigned long pos;
	unsigned long end;
};

struct x86_emulate_ctxt {
	struct x86_emulate_ops *ops;

	/* Register state before/after emulation. */
	unsigned long eflags;
	unsigned long eip; /* eip before instruction emulation */
	/* Emulated execution mode, represented by an X86EMUL_MODE value. */
	int mode;

	/* interruptibility state, as a result of execution of STI or MOV SS */
	int interruptibility;

	bool guest_mode; /* guest running a nested guest */
	bool perm_ok; /* do not check permissions if true */
	bool only_vendor_specific_insn;

	bool have_exception;
	struct x86_exception exception;

	/* decode cache */
	u8 twobyte;
	u8 b;
	u8 intercept;
	u8 lock_prefix;
	u8 rep_prefix;
	u8 op_bytes;
	u8 ad_bytes;
	u8 rex_prefix;
	struct operand src;
	struct operand src2;
	struct operand dst;
	bool has_seg_override;
	u8 seg_override;
	u64 d;
	int (*execute)(struct x86_emulate_ctxt *ctxt);
	int (*check_perm)(struct x86_emulate_ctxt *ctxt);
	/* modrm */
	u8 modrm;
	u8 modrm_mod;
	u8 modrm_reg;
	u8 modrm_rm;
	u8 modrm_seg;
	bool rip_relative;
	unsigned long _eip;
	struct operand memop;
	u32 regs_valid;  /* bitmaps of registers in _regs[] that can be read */
	u32 regs_dirty;  /* bitmaps of registers in _regs[] that have been written */
	/* Fields above regs are cleared together. */
	unsigned long _regs[NR_VCPU_REGS];
	struct operand *memopp;
	struct fetch_cache fetch;
	struct read_cache io_read;
	struct read_cache mem_read;
};

/* Repeat String Operation Prefix */
#define REPE_PREFIX	0xf3
#define REPNE_PREFIX	0xf2

/* Execution mode, passed to the emulator. */
#define X86EMUL_MODE_REAL     0	/* Real mode.             */
#define X86EMUL_MODE_VM86     1	/* Virtual 8086 mode.     */
#define X86EMUL_MODE_PROT16   2	/* 16-bit protected mode. */
#define X86EMUL_MODE_PROT32   4	/* 32-bit protected mode. */
#define X86EMUL_MODE_PROT64   8	/* 64-bit (long) mode.    */

/* any protected mode   */
#define X86EMUL_MODE_PROT     (X86EMUL_MODE_PROT16|X86EMUL_MODE_PROT32| \
			       X86EMUL_MODE_PROT64)

/* CPUID vendors */
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65

#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273

#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69

enum x86_intercept_stage {
	X86_ICTP_NONE = 0,   /* Allow zero-init to not match anything */
	X86_ICPT_PRE_EXCEPT,
	X86_ICPT_POST_EXCEPT,
	X86_ICPT_POST_MEMACCESS,
};

enum x86_intercept {
	x86_intercept_none,
	x86_intercept_cr_read,
	x86_intercept_cr_write,
	x86_intercept_clts,
	x86_intercept_lmsw,
	x86_intercept_smsw,
	x86_intercept_dr_read,
	x86_intercept_dr_write,
	x86_intercept_lidt,
	x86_intercept_sidt,
	x86_intercept_lgdt,
	x86_intercept_sgdt,
	x86_intercept_lldt,
	x86_intercept_sldt,
	x86_intercept_ltr,
	x86_intercept_str,
	x86_intercept_rdtsc,
	x86_intercept_rdpmc,
	x86_intercept_pushf,
	x86_intercept_popf,
	x86_intercept_cpuid,
	x86_intercept_rsm,
	x86_intercept_iret,
	x86_intercept_intn,
	x86_intercept_invd,
	x86_intercept_pause,
	x86_intercept_hlt,
	x86_intercept_invlpg,
	x86_intercept_invlpga,
	x86_intercept_vmrun,
	x86_intercept_vmload,
	x86_intercept_vmsave,
	x86_intercept_vmmcall,
	x86_intercept_stgi,
	x86_intercept_clgi,
	x86_intercept_skinit,
	x86_intercept_rdtscp,
	x86_intercept_icebp,
	x86_intercept_wbinvd,
	x86_intercept_monitor,
	x86_intercept_mwait,
	x86_intercept_rdmsr,
	x86_intercept_wrmsr,
	x86_intercept_in,
	x86_intercept_ins,
	x86_intercept_out,
	x86_intercept_outs,

	nr_x86_intercepts
};

/* Host execution mode. */
#if defined(CONFIG_X86_32)
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
#elif defined(CONFIG_X86_64)
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
#endif

int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len);
bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
#define EMULATION_FAILED -1
#define EMULATION_OK 0
#define EMULATION_RESTART 1
#define EMULATION_INTERCEPTED 2
int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
			 u16 tss_selector, int idt_index, int reason,
			 bool has_error_code, u32 error_code);
int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);

#endif /* _ASM_X86_KVM_X86_EMULATE_H */
Commit	Line	Data
6aa8b732 AK	1	/******************************************************************************
	2	* x86_emulate.h
	3	*
	4	* Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
	5	*
	6	* Copyright (c) 2005 Keir Fraser
	7	*
	8	* From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
	9	*/
	10
1965aae3 PA	11	#ifndef _ASM_X86_KVM_X86_EMULATE_H
1965aae3 PA	12	#define _ASM_X86_KVM_X86_EMULATE_H
6aa8b732	13
38ba30ba GN	14	#include <asm/desc_defs.h>
38ba30ba GN	15
6aa8b732	16	struct x86_emulate_ctxt;
c4f035c6 AK	17	enum x86_intercept;
c4f035c6 AK	18	enum x86_intercept_stage;
6aa8b732	19
da9cb575 AK	20	struct x86_exception {
	21	u8 vector;
	22	bool error_code_valid;
	23	u16 error_code;
6389ee94 AK	24	bool nested_page_fault;
6389ee94 AK	25	u64 address; /* cr2 or nested page fault gpa */
da9cb575 AK	26	};
da9cb575 AK	27
8a76d7f2 JR	28	/*
	29	* This struct is used to carry enough information from the instruction
	30	* decoder to main KVM so that a decision can be made whether the
	31	* instruction needs to be intercepted or not.
	32	*/
	33	struct x86_instruction_info {
	34	u8 intercept; /* which intercept */
	35	u8 rep_prefix; /* rep prefix? */
	36	u8 modrm_mod; /* mod part of modrm */
	37	u8 modrm_reg; /* index of register used */
	38	u8 modrm_rm; /* rm part of modrm */
	39	u64 src_val; /* value of source operand */
	40	u8 src_bytes; /* size of source operand */
	41	u8 dst_bytes; /* size of destination operand */
	42	u8 ad_bytes; /* size of src/dst address */
	43	u64 next_rip; /* rip following the instruction */
	44	};
	45
6aa8b732 AK	46	/*
	47	* x86_emulate_ops:
	48	*
	49	* These operations represent the instruction emulator's interface to memory.
	50	* There are two categories of operation: those that act on ordinary memory
	51	* regions (*_std), and those that act on memory regions known to require
	52	* special treatment or emulation (*_emulated).
	53	*
	54	* The emulator assumes that an instruction accesses only one 'emulated memory'
	55	* location, that this location is the given linear faulting address (cr2), and
	56	* that this is one of the instruction's data operands. Instruction fetches and
	57	* stack operations are assumed never to access emulated memory. The emulator
	58	* automatically deduces which operand of a string-move operation is accessing
	59	* emulated memory, and assumes that the other operand accesses normal memory.
	60	*
	61	* NOTES:
	62	* 1. The emulator isn't very smart about emulated vs. standard memory.
	63	* 'Emulated memory' access addresses should be checked for sanity.
	64	* 'Normal memory' accesses may fault, and the caller must arrange to
	65	* detect and handle reentrancy into the emulator via recursive faults.
	66	* Accesses may be unaligned and may cross page boundaries.
	67	* 2. If the access fails (cannot emulate, or a standard access faults) then
	68	* it is up to the memop to propagate the fault to the guest VM via
	69	* some out-of-band mechanism, unknown to the emulator. The memop signals
	70	* failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
	71	* then immediately bail.
	72	* 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
	73	* cmpxchg8b_emulated need support 8-byte accesses.
	74	* 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
	75	*/
	76	/* Access completed successfully: continue emulation as normal. */
	77	#define X86EMUL_CONTINUE 0
	78	/* Access is unhandleable: bail from emulation and return error to caller. */
	79	#define X86EMUL_UNHANDLEABLE 1
	80	/* Terminate emulation but return success to the caller. */
	81	#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
e680080e GN	82	#define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
e680080e GN	83	#define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
c3cd7ffa	84	#define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
c4f035c6	85	#define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */
e680080e	86
6aa8b732	87	struct x86_emulate_ops {
dd856efa AK	88	/*
	89	* read_gpr: read a general purpose register (rax - r15)
	90	*
	91	* @reg: gpr number.
	92	*/
	93	ulong (read_gpr)(struct x86_emulate_ctxt ctxt, unsigned reg);
	94	/*
	95	* write_gpr: write a general purpose register (rax - r15)
	96	*
	97	* @reg: gpr number.
	98	* @val: value to write.
	99	*/
	100	void (write_gpr)(struct x86_emulate_ctxt ctxt, unsigned reg, ulong val);
6aa8b732 AK	101	/*
6aa8b732 AK	102	* read_std: Read bytes of standard (non-emulated/special) memory.
1871c602	103	* Used for descriptor reading.
6aa8b732 AK	104	* @addr: [IN ] Linear address from which to read.
	105	* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
	106	* @bytes: [IN ] Number of bytes to read from memory.
	107	*/
0f65dd70 AK	108	int (read_std)(struct x86_emulate_ctxt ctxt,
	109	unsigned long addr, void *val,
	110	unsigned int bytes,
bcc55cba	111	struct x86_exception *fault);
1871c602	112
2dafc6c2 GN	113	/*
	114	* write_std: Write bytes of standard (non-emulated/special) memory.
	115	* Used for descriptor writing.
	116	* @addr: [IN ] Linear address to which to write.
	117	* @val: [OUT] Value write to memory, zero-extended to 'u_long'.
	118	* @bytes: [IN ] Number of bytes to write to memory.
	119	*/
0f65dd70 AK	120	int (write_std)(struct x86_emulate_ctxt ctxt,
0f65dd70 AK	121	unsigned long addr, void *val, unsigned int bytes,
bcc55cba	122	struct x86_exception *fault);
1871c602 GN	123	/*
	124	* fetch: Read bytes of standard (non-emulated/special) memory.
	125	* Used for instruction fetch.
	126	* @addr: [IN ] Linear address from which to read.
	127	* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
	128	* @bytes: [IN ] Number of bytes to read from memory.
	129	*/
0f65dd70 AK	130	int (fetch)(struct x86_emulate_ctxt ctxt,
0f65dd70 AK	131	unsigned long addr, void *val, unsigned int bytes,
bcc55cba	132	struct x86_exception *fault);
6aa8b732 AK	133
	134	/*
	135	* read_emulated: Read bytes from emulated/special memory area.
	136	* @addr: [IN ] Linear address from which to read.
	137	* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
	138	* @bytes: [IN ] Number of bytes to read from memory.
	139	*/
0f65dd70 AK	140	int (read_emulated)(struct x86_emulate_ctxt ctxt,
	141	unsigned long addr, void *val, unsigned int bytes,
	142	struct x86_exception *fault);
6aa8b732 AK	143
6aa8b732 AK	144	/*
0d178975	145	* write_emulated: Write bytes to emulated/special memory area.
6aa8b732 AK	146	* @addr: [IN ] Linear address to which to write.
	147	* @val: [IN ] Value to write to memory (low-order bytes used as
	148	* required).
	149	* @bytes: [IN ] Number of bytes to write to memory.
	150	*/
0f65dd70 AK	151	int (write_emulated)(struct x86_emulate_ctxt ctxt,
0f65dd70 AK	152	unsigned long addr, const void *val,
0c7825e6	153	unsigned int bytes,
0f65dd70	154	struct x86_exception *fault);
6aa8b732 AK	155
	156	/*
	157	* cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
	158	* emulated/special memory area.
	159	* @addr: [IN ] Linear address to access.
	160	* @old: [IN ] Value expected to be current at @addr.
	161	* @new: [IN ] Value to write to @addr.
	162	* @bytes: [IN ] Number of bytes to access using CMPXCHG.
	163	*/
0f65dd70 AK	164	int (cmpxchg_emulated)(struct x86_emulate_ctxt ctxt,
0f65dd70 AK	165	unsigned long addr,
0c7825e6 JP	166	const void *old,
	167	const void *new,
	168	unsigned int bytes,
0f65dd70	169	struct x86_exception *fault);
3cb16fe7	170	void (invlpg)(struct x86_emulate_ctxt ctxt, ulong addr);
cf8f70bf	171
ca1d4a9e AK	172	int (pio_in_emulated)(struct x86_emulate_ctxt ctxt,
	173	int size, unsigned short port, void *val,
	174	unsigned int count);
cf8f70bf	175
ca1d4a9e AK	176	int (pio_out_emulated)(struct x86_emulate_ctxt ctxt,
	177	int size, unsigned short port, const void *val,
	178	unsigned int count);
cf8f70bf	179
1aa36616 AK	180	bool (get_segment)(struct x86_emulate_ctxt ctxt, u16 *selector,
	181	struct desc_struct desc, u32 base3, int seg);
	182	void (set_segment)(struct x86_emulate_ctxt ctxt, u16 selector,
	183	struct desc_struct *desc, u32 base3, int seg);
4bff1e86 AK	184	unsigned long (get_cached_segment_base)(struct x86_emulate_ctxt ctxt,
	185	int seg);
	186	void (get_gdt)(struct x86_emulate_ctxt ctxt, struct desc_ptr *dt);
	187	void (get_idt)(struct x86_emulate_ctxt ctxt, struct desc_ptr *dt);
1ac9d0cf AK	188	void (set_gdt)(struct x86_emulate_ctxt ctxt, struct desc_ptr *dt);
1ac9d0cf AK	189	void (set_idt)(struct x86_emulate_ctxt ctxt, struct desc_ptr *dt);
717746e3 AK	190	ulong (get_cr)(struct x86_emulate_ctxt ctxt, int cr);
717746e3 AK	191	int (set_cr)(struct x86_emulate_ctxt ctxt, int cr, ulong val);
4cee4798	192	void (set_rflags)(struct x86_emulate_ctxt ctxt, ulong val);
717746e3 AK	193	int (cpl)(struct x86_emulate_ctxt ctxt);
	194	int (get_dr)(struct x86_emulate_ctxt ctxt, int dr, ulong *dest);
	195	int (set_dr)(struct x86_emulate_ctxt ctxt, int dr, ulong value);
	196	int (set_msr)(struct x86_emulate_ctxt ctxt, u32 msr_index, u64 data);
	197	int (get_msr)(struct x86_emulate_ctxt ctxt, u32 msr_index, u64 *pdata);
222d21aa	198	int (read_pmc)(struct x86_emulate_ctxt ctxt, u32 pmc, u64 *pdata);
6c3287f7	199	void (halt)(struct x86_emulate_ctxt ctxt);
bcaf5cc5	200	void (wbinvd)(struct x86_emulate_ctxt ctxt);
d6aa1000	201	int (fix_hypercall)(struct x86_emulate_ctxt ctxt);
5037f6f3 AK	202	void (get_fpu)(struct x86_emulate_ctxt ctxt); /* disables preempt */
5037f6f3 AK	203	void (put_fpu)(struct x86_emulate_ctxt ctxt); /* reenables preempt */
2953538e	204	int (intercept)(struct x86_emulate_ctxt ctxt,
8a76d7f2	205	struct x86_instruction_info *info,
c4f035c6	206	enum x86_intercept_stage stage);
bdb42f5a	207
0017f93a AK	208	void (get_cpuid)(struct x86_emulate_ctxt ctxt,
0017f93a AK	209	u32 eax, u32 ebx, u32 ecx, u32 edx);
6aa8b732 AK	210	};
6aa8b732 AK	211
1253791d AK	212	typedef u32 __attribute__((vector_size(16))) sse128_t;
1253791d AK	213
e4e03ded LV	214	/* Type, address-of, and value of an instruction's operand. */
e4e03ded LV	215	struct operand {
cbe2c9d3	216	enum { OP_REG, OP_MEM, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
e4e03ded	217	unsigned int bytes;
16518d5a AK	218	union {
	219	unsigned long orig_val;
	220	u64 orig_val64;
	221	};
1a6440ae AK	222	union {
1a6440ae AK	223	unsigned long *reg;
90de84f5 AK	224	struct segmented_address {
	225	ulong ea;
	226	unsigned seg;
	227	} mem;
1253791d	228	unsigned xmm;
cbe2c9d3	229	unsigned mm;
1a6440ae	230	} addr;
414e6277 GN	231	union {
414e6277 GN	232	unsigned long val;
16518d5a	233	u64 val64;
414e6277	234	char valptr[sizeof(unsigned long) + 2];
1253791d	235	sse128_t vec_val;
cbe2c9d3	236	u64 mm_val;
414e6277	237	};
e4e03ded LV	238	};
e4e03ded LV	239
62266869 AK	240	struct fetch_cache {
	241	u8 data[15];
	242	unsigned long start;
	243	unsigned long end;
	244	};
	245
7b262e90 GN	246	struct read_cache {
	247	u8 data[1024];
	248	unsigned long pos;
	249	unsigned long end;
	250	};
	251
9dac77fa AK	252	struct x86_emulate_ctxt {
	253	struct x86_emulate_ops *ops;
	254
	255	/* Register state before/after emulation. */
	256	unsigned long eflags;
	257	unsigned long eip; /* eip before instruction emulation */
	258	/* Emulated execution mode, represented by an X86EMUL_MODE value. */
	259	int mode;
	260
	261	/* interruptibility state, as a result of execution of STI or MOV SS */
	262	int interruptibility;
	263
	264	bool guest_mode; /* guest running a nested guest */
	265	bool perm_ok; /* do not check permissions if true */
	266	bool only_vendor_specific_insn;
	267
	268	bool have_exception;
	269	struct x86_exception exception;
	270
	271	/* decode cache */
e4e03ded LV	272	u8 twobyte;
e4e03ded LV	273	u8 b;
c4f035c6	274	u8 intercept;
e4e03ded LV	275	u8 lock_prefix;
	276	u8 rep_prefix;
	277	u8 op_bytes;
	278	u8 ad_bytes;
33615aa9	279	u8 rex_prefix;
e4e03ded	280	struct operand src;
0dc8d10f	281	struct operand src2;
e4e03ded	282	struct operand dst;
7a5b56df AK	283	bool has_seg_override;
7a5b56df AK	284	u8 seg_override;
b1ea50b2	285	u64 d;
ef65c889	286	int (execute)(struct x86_emulate_ctxt ctxt);
d09beabd	287	int (check_perm)(struct x86_emulate_ctxt ctxt);
e4e03ded LV	288	/* modrm */
	289	u8 modrm;
	290	u8 modrm_mod;
	291	u8 modrm_reg;
	292	u8 modrm_rm;
09ee57cd	293	u8 modrm_seg;
f5b4edcd	294	bool rip_relative;
36dd9bb5	295	unsigned long _eip;
cbd27ee7	296	struct operand memop;
dd856efa AK	297	u32 regs_valid; /* bitmaps of registers in _regs[] that can be read */
dd856efa AK	298	u32 regs_dirty; /* bitmaps of registers in _regs[] that have been written */
b5c9ff73	299	/* Fields above regs are cleared together. */
dd856efa	300	unsigned long _regs[NR_VCPU_REGS];
f09ed83e	301	struct operand *memopp;
62266869	302	struct fetch_cache fetch;
7b262e90	303	struct read_cache io_read;
9de41573	304	struct read_cache mem_read;
e4e03ded LV	305	};
e4e03ded LV	306
90e0a28f	307	/* Repeat String Operation Prefix */
1d6b114f AK	308	#define REPE_PREFIX 0xf3
1d6b114f AK	309	#define REPNE_PREFIX 0xf2
90e0a28f	310
6aa8b732 AK	311	/* Execution mode, passed to the emulator. */
6aa8b732 AK	312	#define X86EMUL_MODE_REAL 0 /* Real mode. */
a0044755	313	#define X86EMUL_MODE_VM86 1 /* Virtual 8086 mode. */
6aa8b732 AK	314	#define X86EMUL_MODE_PROT16 2 /* 16-bit protected mode. */
	315	#define X86EMUL_MODE_PROT32 4 /* 32-bit protected mode. */
	316	#define X86EMUL_MODE_PROT64 8 /* 64-bit (long) mode. */
	317
8ea7d6ae JR	318	/* any protected mode */
	319	#define X86EMUL_MODE_PROT (X86EMUL_MODE_PROT16\|X86EMUL_MODE_PROT32\| \
	320	X86EMUL_MODE_PROT64)
	321
c2226fc9 SB	322	/* CPUID vendors */
	323	#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
	324	#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
	325	#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
	326
	327	#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
	328	#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
	329	#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
	330
	331	#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
	332	#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
	333	#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
	334
c4f035c6	335	enum x86_intercept_stage {
40e19b51	336	X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */
c4f035c6 AK	337	X86_ICPT_PRE_EXCEPT,
	338	X86_ICPT_POST_EXCEPT,
	339	X86_ICPT_POST_MEMACCESS,
	340	};
	341
	342	enum x86_intercept {
	343	x86_intercept_none,
cfec82cb JR	344	x86_intercept_cr_read,
	345	x86_intercept_cr_write,
	346	x86_intercept_clts,
3c6e276f AK	347	x86_intercept_lmsw,
3c6e276f AK	348	x86_intercept_smsw,
3b88e41a JR	349	x86_intercept_dr_read,
3b88e41a JR	350	x86_intercept_dr_write,
3c6e276f AK	351	x86_intercept_lidt,
	352	x86_intercept_sidt,
	353	x86_intercept_lgdt,
	354	x86_intercept_sgdt,
	355	x86_intercept_lldt,
	356	x86_intercept_sldt,
	357	x86_intercept_ltr,
	358	x86_intercept_str,
	359	x86_intercept_rdtsc,
	360	x86_intercept_rdpmc,
	361	x86_intercept_pushf,
	362	x86_intercept_popf,
	363	x86_intercept_cpuid,
	364	x86_intercept_rsm,
	365	x86_intercept_iret,
	366	x86_intercept_intn,
	367	x86_intercept_invd,
	368	x86_intercept_pause,
	369	x86_intercept_hlt,
	370	x86_intercept_invlpg,
	371	x86_intercept_invlpga,
	372	x86_intercept_vmrun,
	373	x86_intercept_vmload,
	374	x86_intercept_vmsave,
	375	x86_intercept_vmmcall,
	376	x86_intercept_stgi,
	377	x86_intercept_clgi,
	378	x86_intercept_skinit,
	379	x86_intercept_rdtscp,
	380	x86_intercept_icebp,
	381	x86_intercept_wbinvd,
	382	x86_intercept_monitor,
	383	x86_intercept_mwait,
8061252e JR	384	x86_intercept_rdmsr,
8061252e JR	385	x86_intercept_wrmsr,
f6511935 JR	386	x86_intercept_in,
	387	x86_intercept_ins,
	388	x86_intercept_out,
	389	x86_intercept_outs,
c4f035c6 AK	390
	391	nr_x86_intercepts
	392	};
	393
6aa8b732	394	/* Host execution mode. */
d73fa29a	395	#if defined(CONFIG_X86_32)
6aa8b732	396	#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
05b3e0c2	397	#elif defined(CONFIG_X86_64)
6aa8b732 AK	398	#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
	399	#endif
	400
dc25e89e	401	int x86_decode_insn(struct x86_emulate_ctxt ctxt, void insn, int insn_len);
1cb3f3ae	402	bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
d2ddd1c4 GN	403	#define EMULATION_FAILED -1
	404	#define EMULATION_OK 0
	405	#define EMULATION_RESTART 1
775fde86	406	#define EMULATION_INTERCEPTED 2
9aabc88f	407	int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
38ba30ba	408	int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
7f3d35fd	409	u16 tss_selector, int idt_index, int reason,
e269fb21	410	bool has_error_code, u32 error_code);
7b105ca2	411	int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
dd856efa AK	412	void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
	413	void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
	414
1965aae3	415	#endif /* _ASM_X86_KVM_X86_EMULATE_H */