Merge branches 'fixes', 'pgt-next' and 'versatile' into devel
[deliverable/linux.git] / arch / x86 / include / asm / kvm_host.h
CommitLineData
a656c8ef 1/*
043405e1
CO
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
1965aae3
PA
11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
34c16eec
ZX
14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
229456fc 17#include <linux/tracepoint.h>
f5f48ee1 18#include <linux/cpumask.h>
34c16eec
ZX
19
20#include <linux/kvm.h>
21#include <linux/kvm_para.h>
edf88417 22#include <linux/kvm_types.h>
34c16eec 23
50d0a0f9 24#include <asm/pvclock-abi.h>
e01a1b57 25#include <asm/desc.h>
0bed3b56 26#include <asm/mtrr.h>
9962d032 27#include <asm/msr-index.h>
e01a1b57 28
0680fe52 29#define KVM_MAX_VCPUS 64
69a9f69b
AK
30#define KVM_MEMORY_SLOTS 32
31/* memory slots that does not exposed to userspace */
32#define KVM_PRIVATE_MEM_SLOTS 4
33
34#define KVM_PIO_PAGE_OFFSET 1
542472b5 35#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 36
cd6e8f87
ZX
37#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
38#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP
39#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
40 0xFFFFFF0000000000ULL)
cd6e8f87 41
cd6e8f87 42#define INVALID_PAGE (~(hpa_t)0)
dd180b3e
XG
43#define VALID_PAGE(x) ((x) != INVALID_PAGE)
44
cd6e8f87
ZX
45#define UNMAPPED_GVA (~(gpa_t)0)
46
ec04b260 47/* KVM Hugepage definitions for x86 */
04326caa 48#define KVM_NR_PAGE_SIZES 3
82855413
JR
49#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
50#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
ec04b260
JR
51#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
52#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
53#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
05da4558 54
cd6e8f87 55#define DE_VECTOR 0
19bd8afd 56#define DB_VECTOR 1
77ab6db0
JK
57#define BP_VECTOR 3
58#define OF_VECTOR 4
59#define BR_VECTOR 5
cd6e8f87
ZX
60#define UD_VECTOR 6
61#define NM_VECTOR 7
62#define DF_VECTOR 8
63#define TS_VECTOR 10
64#define NP_VECTOR 11
65#define SS_VECTOR 12
66#define GP_VECTOR 13
67#define PF_VECTOR 14
77ab6db0 68#define MF_VECTOR 16
53371b50 69#define MC_VECTOR 18
cd6e8f87
ZX
70
71#define SELECTOR_TI_MASK (1 << 2)
72#define SELECTOR_RPL_MASK 0x03
73
74#define IOPL_SHIFT 12
75
d657a98e
ZX
76#define KVM_PERMILLE_MMU_PAGES 20
77#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE
78#define KVM_MMU_HASH_SHIFT 10
79#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX
80#define KVM_MIN_FREE_MMU_PAGES 5
81#define KVM_REFILL_PAGES 25
73c1160c 82#define KVM_MAX_CPUID_ENTRIES 80
0bed3b56 83#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 84#define KVM_NR_VAR_MTRR 8
d657a98e 85
af585b92
GN
86#define ASYNC_PF_PER_VCPU 64
87
e935b837 88extern raw_spinlock_t kvm_lock;
e9b11c17
ZX
89extern struct list_head vm_list;
90
d657a98e
ZX
91struct kvm_vcpu;
92struct kvm;
af585b92 93struct kvm_async_pf;
d657a98e 94
5fdbf976 95enum kvm_reg {
2b3ccfa0
ZX
96 VCPU_REGS_RAX = 0,
97 VCPU_REGS_RCX = 1,
98 VCPU_REGS_RDX = 2,
99 VCPU_REGS_RBX = 3,
100 VCPU_REGS_RSP = 4,
101 VCPU_REGS_RBP = 5,
102 VCPU_REGS_RSI = 6,
103 VCPU_REGS_RDI = 7,
104#ifdef CONFIG_X86_64
105 VCPU_REGS_R8 = 8,
106 VCPU_REGS_R9 = 9,
107 VCPU_REGS_R10 = 10,
108 VCPU_REGS_R11 = 11,
109 VCPU_REGS_R12 = 12,
110 VCPU_REGS_R13 = 13,
111 VCPU_REGS_R14 = 14,
112 VCPU_REGS_R15 = 15,
113#endif
5fdbf976 114 VCPU_REGS_RIP,
2b3ccfa0
ZX
115 NR_VCPU_REGS
116};
117
6de4f3ad
AK
118enum kvm_reg_ex {
119 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
aff48baa 120 VCPU_EXREG_CR3,
6de4f3ad
AK
121};
122
2b3ccfa0 123enum {
81609e3e 124 VCPU_SREG_ES,
2b3ccfa0 125 VCPU_SREG_CS,
81609e3e 126 VCPU_SREG_SS,
2b3ccfa0 127 VCPU_SREG_DS,
2b3ccfa0
ZX
128 VCPU_SREG_FS,
129 VCPU_SREG_GS,
2b3ccfa0
ZX
130 VCPU_SREG_TR,
131 VCPU_SREG_LDTR,
132};
133
56e82318 134#include <asm/kvm_emulate.h>
2b3ccfa0 135
d657a98e
ZX
136#define KVM_NR_MEM_OBJS 40
137
42dbaa5a
JK
138#define KVM_NR_DB_REGS 4
139
140#define DR6_BD (1 << 13)
141#define DR6_BS (1 << 14)
142#define DR6_FIXED_1 0xffff0ff0
143#define DR6_VOLATILE 0x0000e00f
144
145#define DR7_BP_EN_MASK 0x000000ff
146#define DR7_GE (1 << 9)
147#define DR7_GD (1 << 13)
148#define DR7_FIXED_1 0x00000400
149#define DR7_VOLATILE 0xffff23ff
150
d657a98e
ZX
151/*
152 * We don't want allocation failures within the mmu code, so we preallocate
153 * enough memory for a single page fault in a cache.
154 */
155struct kvm_mmu_memory_cache {
156 int nobjs;
157 void *objects[KVM_NR_MEM_OBJS];
158};
159
160#define NR_PTE_CHAIN_ENTRIES 5
161
162struct kvm_pte_chain {
163 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
164 struct hlist_node link;
165};
166
167/*
168 * kvm_mmu_page_role, below, is defined as:
169 *
170 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
171 * bits 4:7 - page table level for this shadow (1-4)
172 * bits 8:9 - page table quadrant for 2-level guests
f6e2c02b
AK
173 * bit 16 - direct mapping of virtual to physical mapping at gfn
174 * used for real mode and two-dimensional paging
d657a98e
ZX
175 * bits 17:19 - common access permissions for all ptes in this shadow page
176 */
177union kvm_mmu_page_role {
178 unsigned word;
179 struct {
7d76b4d3 180 unsigned level:4;
5b7e0102 181 unsigned cr4_pae:1;
7d76b4d3
JP
182 unsigned quadrant:2;
183 unsigned pad_for_nice_hex_output:6;
f6e2c02b 184 unsigned direct:1;
7d76b4d3 185 unsigned access:3;
2e53d63a 186 unsigned invalid:1;
9645bb56 187 unsigned nxe:1;
3dbe1415 188 unsigned cr0_wp:1;
d657a98e
ZX
189 };
190};
191
192struct kvm_mmu_page {
193 struct list_head link;
194 struct hlist_node hash_link;
195
196 /*
197 * The following two entries are used to key the shadow page in the
198 * hash table.
199 */
200 gfn_t gfn;
201 union kvm_mmu_page_role role;
202
203 u64 *spt;
204 /* hold the gfn of each spte inside spt */
205 gfn_t *gfns;
291f26bc
SY
206 /*
207 * One bit set per slot which has memory
208 * in this shadow page.
209 */
210 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
0571d366 211 bool multimapped; /* More than one parent_pte? */
4731d4c7 212 bool unsync;
0571d366 213 int root_count; /* Currently serving as active root */
60c8aec6 214 unsigned int unsync_children;
d657a98e
ZX
215 union {
216 u64 *parent_pte; /* !multimapped */
217 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
218 };
0074ff63 219 DECLARE_BITMAP(unsync_child_bitmap, 512);
d657a98e
ZX
220};
221
6ad18fba
DH
222struct kvm_pv_mmu_op_buffer {
223 void *ptr;
224 unsigned len;
225 unsigned processed;
226 char buf[512] __aligned(sizeof(long));
227};
228
1c08364c
AK
229struct kvm_pio_request {
230 unsigned long count;
1c08364c
AK
231 int in;
232 int port;
233 int size;
1c08364c
AK
234};
235
d657a98e
ZX
236/*
237 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
238 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
239 * mode.
240 */
241struct kvm_mmu {
242 void (*new_cr3)(struct kvm_vcpu *vcpu);
f43addd4 243 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
5777ed34 244 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
78b2c54a
XG
245 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
246 bool prefault);
6389ee94
AK
247 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
248 struct x86_exception *fault);
d657a98e 249 void (*free)(struct kvm_vcpu *vcpu);
1871c602 250 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
ab9ae313 251 struct x86_exception *exception);
c30a358d 252 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
d657a98e
ZX
253 void (*prefetch_page)(struct kvm_vcpu *vcpu,
254 struct kvm_mmu_page *page);
e8bc217a 255 int (*sync_page)(struct kvm_vcpu *vcpu,
a4a8e6f7 256 struct kvm_mmu_page *sp);
a7052897 257 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
0f53b5b1
XG
258 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
259 u64 *spte, const void *pte, unsigned long mmu_seq);
d657a98e
ZX
260 hpa_t root_hpa;
261 int root_level;
262 int shadow_root_level;
a770f6f2 263 union kvm_mmu_page_role base_role;
c5a78f2b 264 bool direct_map;
d657a98e
ZX
265
266 u64 *pae_root;
81407ca5 267 u64 *lm_root;
82725b20 268 u64 rsvd_bits_mask[2][4];
ff03a073 269
2d48a985
JR
270 bool nx;
271
ff03a073 272 u64 pdptrs[4]; /* pae */
d657a98e
ZX
273};
274
ad312c7c 275struct kvm_vcpu_arch {
5fdbf976
MT
276 /*
277 * rip and regs accesses must go through
278 * kvm_{register,rip}_{read,write} functions.
279 */
280 unsigned long regs[NR_VCPU_REGS];
281 u32 regs_avail;
282 u32 regs_dirty;
34c16eec
ZX
283
284 unsigned long cr0;
e8467fda 285 unsigned long cr0_guest_owned_bits;
34c16eec
ZX
286 unsigned long cr2;
287 unsigned long cr3;
288 unsigned long cr4;
fc78f519 289 unsigned long cr4_guest_owned_bits;
34c16eec 290 unsigned long cr8;
1371d904 291 u32 hflags;
f6801dff 292 u64 efer;
34c16eec
ZX
293 u64 apic_base;
294 struct kvm_lapic *apic; /* kernel irqchip context */
e1035715 295 int32_t apic_arb_prio;
34c16eec
ZX
296 int mp_state;
297 int sipi_vector;
298 u64 ia32_misc_enable_msr;
b209749f 299 bool tpr_access_reporting;
34c16eec 300
14dfe855
JR
301 /*
302 * Paging state of the vcpu
303 *
304 * If the vcpu runs in guest mode with two level paging this still saves
305 * the paging mode of the l1 guest. This context is always used to
306 * handle faults.
307 */
34c16eec 308 struct kvm_mmu mmu;
8df25a32 309
6539e738
JR
310 /*
311 * Paging state of an L2 guest (used for nested npt)
312 *
313 * This context will save all necessary information to walk page tables
314 * of the an L2 guest. This context is only initialized for page table
315 * walking and not for faulting since we never handle l2 page faults on
316 * the host.
317 */
318 struct kvm_mmu nested_mmu;
319
14dfe855
JR
320 /*
321 * Pointer to the mmu context currently used for
322 * gva_to_gpa translations.
323 */
324 struct kvm_mmu *walk_mmu;
325
6ad18fba
DH
326 /* only needed in kvm_pv_mmu_op() path, but it's hot so
327 * put it here to avoid allocation */
328 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec
ZX
329
330 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
331 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
332 struct kvm_mmu_memory_cache mmu_page_cache;
333 struct kvm_mmu_memory_cache mmu_page_header_cache;
334
335 gfn_t last_pt_write_gfn;
336 int last_pt_write_count;
337 u64 *last_pte_updated;
1b7fcd32 338 gfn_t last_pte_gfn;
34c16eec 339
98918833 340 struct fpu guest_fpu;
2acf923e 341 u64 xcr0;
34c16eec
ZX
342
343 gva_t mmio_fault_cr2;
344 struct kvm_pio_request pio;
345 void *pio_data;
346
66fd3f7f
GN
347 u8 event_exit_inst_len;
348
298101da
AK
349 struct kvm_queued_exception {
350 bool pending;
351 bool has_error_code;
ce7ddec4 352 bool reinject;
298101da
AK
353 u8 nr;
354 u32 error_code;
355 } exception;
356
937a7eae
AK
357 struct kvm_queued_interrupt {
358 bool pending;
66fd3f7f 359 bool soft;
937a7eae
AK
360 u8 nr;
361 } interrupt;
362
34c16eec
ZX
363 int halt_request; /* real mode on Intel only */
364
365 int cpuid_nent;
07716717 366 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX
367 /* emulate context */
368
369 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC
370
371 gpa_t time;
50d0a0f9 372 struct pvclock_vcpu_time_info hv_clock;
e48672fa 373 unsigned int hw_tsc_khz;
18068523
GOC
374 unsigned int time_offset;
375 struct page *time_page;
e48672fa 376 u64 last_host_tsc;
1d5f066e
ZA
377 u64 last_guest_tsc;
378 u64 last_kernel_ns;
c285545f
ZA
379 u64 last_tsc_nsec;
380 u64 last_tsc_write;
381 bool tsc_catchup;
3419ffc8
SY
382
383 bool nmi_pending;
668f612f 384 bool nmi_injected;
9ba075a6 385
0bed3b56
SY
386 struct mtrr_state_type mtrr_state;
387 u32 pat;
42dbaa5a
JK
388
389 int switch_db_regs;
42dbaa5a
JK
390 unsigned long db[KVM_NR_DB_REGS];
391 unsigned long dr6;
392 unsigned long dr7;
393 unsigned long eff_db[KVM_NR_DB_REGS];
890ca9ae
HY
394
395 u64 mcg_cap;
396 u64 mcg_status;
397 u64 mcg_ctl;
398 u64 *mce_banks;
94fe45da
JK
399
400 /* used for guest single stepping over the given code position */
94fe45da 401 unsigned long singlestep_rip;
f92653ee 402
10388a07
GN
403 /* fields used by HYPER-V emulation */
404 u64 hv_vapic;
f5f48ee1
SY
405
406 cpumask_var_t wbinvd_dirty_mask;
af585b92
GN
407
408 struct {
409 bool halted;
410 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
344d9588
GN
411 struct gfn_to_hva_cache data;
412 u64 msr_val;
7c90705b 413 u32 id;
6adba527 414 bool send_user_only;
af585b92 415 } apf;
34c16eec
ZX
416};
417
fef9cce0 418struct kvm_arch {
49d5ca26 419 unsigned int n_used_mmu_pages;
f05e70ac 420 unsigned int n_requested_mmu_pages;
39de71ec 421 unsigned int n_max_mmu_pages;
08e850c6 422 atomic_t invlpg_counter;
f05e70ac
ZX
423 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
424 /*
425 * Hash table of struct kvm_mmu_page.
426 */
427 struct list_head active_mmu_pages;
4d5c5d0f 428 struct list_head assigned_dev_head;
19de40a8 429 struct iommu_domain *iommu_domain;
522c68c4 430 int iommu_flags;
d7deeeb0
ZX
431 struct kvm_pic *vpic;
432 struct kvm_ioapic *vioapic;
7837699f 433 struct kvm_pit *vpit;
cc6e462c 434 int vapics_in_nmi_mode;
bfc6d222 435
bfc6d222
ZX
436 unsigned int tss_addr;
437 struct page *apic_access_page;
18068523
GOC
438
439 gpa_t wall_clock;
b7ebfb05
SY
440
441 struct page *ept_identity_pagetable;
442 bool ept_identity_pagetable_done;
b927a3ce 443 gpa_t ept_identity_map_addr;
5550af4d
SY
444
445 unsigned long irq_sources_bitmap;
afbcf7ab 446 s64 kvmclock_offset;
038f8c11 447 raw_spinlock_t tsc_write_lock;
f38e098f
ZA
448 u64 last_tsc_nsec;
449 u64 last_tsc_offset;
450 u64 last_tsc_write;
c285545f
ZA
451 u32 virtual_tsc_khz;
452 u32 virtual_tsc_mult;
453 s8 virtual_tsc_shift;
ffde22ac
ES
454
455 struct kvm_xen_hvm_config xen_hvm_config;
55cd8e5a
GN
456
457 /* fields used by HYPER-V emulation */
458 u64 hv_guest_os_id;
459 u64 hv_hypercall;
b034cf01
XG
460
461 #ifdef CONFIG_KVM_MMU_AUDIT
462 int audit_point;
463 #endif
d69fb81f
ZX
464};
465
0711456c
ZX
466struct kvm_vm_stat {
467 u32 mmu_shadow_zapped;
468 u32 mmu_pte_write;
469 u32 mmu_pte_updated;
470 u32 mmu_pde_zapped;
471 u32 mmu_flooded;
472 u32 mmu_recycled;
dfc5aa00 473 u32 mmu_cache_miss;
4731d4c7 474 u32 mmu_unsync;
0711456c 475 u32 remote_tlb_flush;
05da4558 476 u32 lpages;
0711456c
ZX
477};
478
77b4c255
ZX
479struct kvm_vcpu_stat {
480 u32 pf_fixed;
481 u32 pf_guest;
482 u32 tlb_flush;
483 u32 invlpg;
484
485 u32 exits;
486 u32 io_exits;
487 u32 mmio_exits;
488 u32 signal_exits;
489 u32 irq_window_exits;
f08864b4 490 u32 nmi_window_exits;
77b4c255
ZX
491 u32 halt_exits;
492 u32 halt_wakeup;
493 u32 request_irq_exits;
494 u32 irq_exits;
495 u32 host_state_reload;
496 u32 efer_reload;
497 u32 fpu_reload;
498 u32 insn_emulation;
499 u32 insn_emulation_fail;
f11c3a8d 500 u32 hypercalls;
fa89a817 501 u32 irq_injections;
c4abb7c9 502 u32 nmi_injections;
77b4c255 503};
ad312c7c 504
ea4a5ff8
ZX
505struct kvm_x86_ops {
506 int (*cpu_has_kvm_support)(void); /* __init */
507 int (*disabled_by_bios)(void); /* __init */
10474ae8 508 int (*hardware_enable)(void *dummy);
ea4a5ff8
ZX
509 void (*hardware_disable)(void *dummy);
510 void (*check_processor_compatibility)(void *rtn);
511 int (*hardware_setup)(void); /* __init */
512 void (*hardware_unsetup)(void); /* __exit */
774ead3a 513 bool (*cpu_has_accelerated_tpr)(void);
0e851880 514 void (*cpuid_update)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
515
516 /* Create, but do not attach this VCPU */
517 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
518 void (*vcpu_free)(struct kvm_vcpu *vcpu);
519 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
520
521 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
522 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
523 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8 524
355be0b9
JK
525 void (*set_guest_debug)(struct kvm_vcpu *vcpu,
526 struct kvm_guest_debug *dbg);
ea4a5ff8
ZX
527 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
528 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
529 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
530 void (*get_segment)(struct kvm_vcpu *vcpu,
531 struct kvm_segment *var, int seg);
2e4d2653 532 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
533 void (*set_segment)(struct kvm_vcpu *vcpu,
534 struct kvm_segment *var, int seg);
535 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
e8467fda 536 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
aff48baa 537 void (*decache_cr3)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
538 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
539 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
540 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
541 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
542 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
89a27f4d
GN
543 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
544 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
545 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
546 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
020df079 547 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
5fdbf976 548 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX
549 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
550 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
6b52d186 551 void (*fpu_activate)(struct kvm_vcpu *vcpu);
02daab21 552 void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
553
554 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 555
851ba692
AK
556 void (*run)(struct kvm_vcpu *vcpu);
557 int (*handle_exit)(struct kvm_vcpu *vcpu);
ea4a5ff8 558 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
2809f5d2
GC
559 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
560 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
ea4a5ff8
ZX
561 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
562 unsigned char *hypercall_addr);
66fd3f7f 563 void (*set_irq)(struct kvm_vcpu *vcpu);
95ba8273 564 void (*set_nmi)(struct kvm_vcpu *vcpu);
298101da 565 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
ce7ddec4
JR
566 bool has_error_code, u32 error_code,
567 bool reinject);
b463a6f7 568 void (*cancel_injection)(struct kvm_vcpu *vcpu);
78646121 569 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
95ba8273 570 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
3cfc3092
JK
571 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
572 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
95ba8273
GN
573 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
574 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
575 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
ea4a5ff8 576 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 577 int (*get_tdp_level)(void);
4b12f0de 578 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
17cc3935 579 int (*get_lpage_level)(void);
4e47c7a6 580 bool (*rdtscp_supported)(void);
e48672fa 581 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment);
344f414f 582
1c97f0a0
JR
583 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
584
d4330ef2
JR
585 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
586
f5f48ee1
SY
587 bool (*has_wbinvd_exit)(void);
588
99e3e30a
ZA
589 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
590
586f9607 591 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
229456fc 592 const struct trace_print_flags *exit_reasons_str;
ea4a5ff8
ZX
593};
594
af585b92 595struct kvm_arch_async_pf {
7c90705b 596 u32 token;
af585b92 597 gfn_t gfn;
fb67e14f 598 unsigned long cr3;
c4806acd 599 bool direct_map;
af585b92
GN
600};
601
97896d04
ZX
602extern struct kvm_x86_ops *kvm_x86_ops;
603
54f1585a
ZX
604int kvm_mmu_module_init(void);
605void kvm_mmu_module_exit(void);
606
607void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
608int kvm_mmu_create(struct kvm_vcpu *vcpu);
609int kvm_mmu_setup(struct kvm_vcpu *vcpu);
610void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e 611void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 612 u64 dirty_mask, u64 nx_mask, u64 x_mask);
54f1585a
ZX
613
614int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
615void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
616void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 617unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX
618void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
619
ff03a073 620int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
cc4b6871 621
3200f405 622int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 623 const void *val, int bytes);
2f333bcb
MT
624int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
625 gpa_t addr, unsigned long *ret);
4b12f0de 626u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
2f333bcb
MT
627
628extern bool tdp_enabled;
9f811285 629
54f1585a
ZX
630enum emulation_result {
631 EMULATE_DONE, /* no further processing */
632 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
633 EMULATE_FAIL, /* can't emulate this instruction */
634};
635
571008da
SY
636#define EMULTYPE_NO_DECODE (1 << 0)
637#define EMULTYPE_TRAP_UD (1 << 1)
ba8afb6b 638#define EMULTYPE_SKIP (1 << 2)
dc25e89e
AP
639int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
640 int emulation_type, void *insn, int insn_len);
51d8b661
AP
641
642static inline int emulate_instruction(struct kvm_vcpu *vcpu,
643 int emulation_type)
644{
dc25e89e 645 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
51d8b661
AP
646}
647
54f1585a
ZX
648void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
649void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
54f1585a 650
f2b4b7dd 651void kvm_enable_efer_bits(u64);
54f1585a
ZX
652int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
653int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
654
655struct x86_emulate_ctxt;
656
cf8f70bf 657int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
54f1585a
ZX
658void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
659int kvm_emulate_halt(struct kvm_vcpu *vcpu);
660int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
661int emulate_clts(struct kvm_vcpu *vcpu);
f5f48ee1 662int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
54f1585a 663
3e6e0aab 664void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
c697518a 665int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
3e6e0aab 666
e269fb21
JK
667int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
668 bool has_error_code, u32 error_code);
37817f29 669
49a9b07e 670int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
2390218b 671int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
a83b29c6 672int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
eea1cff9 673int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
020df079
GN
674int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
675int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
2d3ad1f4
AK
676unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
677void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a 678void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
2acf923e 679int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
54f1585a
ZX
680
681int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
682int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
683
91586a3b
JK
684unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
685void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
686
298101da
AK
687void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
688void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
ce7ddec4
JR
689void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
690void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
6389ee94 691void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
ec92fe44
JR
692int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
693 gfn_t gfn, void *data, int offset, int len,
694 u32 access);
6389ee94 695void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
0a79b009 696bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
298101da 697
4925663a 698int kvm_pic_set_irq(void *opaque, int irq, int level);
3de42dc0 699
3419ffc8
SY
700void kvm_inject_nmi(struct kvm_vcpu *vcpu);
701
10ab25cd 702int fx_init(struct kvm_vcpu *vcpu);
54f1585a 703
d835dfec 704void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 705void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
706 const u8 *new, int bytes,
707 bool guest_initiated);
54f1585a
ZX
708int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
709void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
710int kvm_mmu_load(struct kvm_vcpu *vcpu);
711void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 712void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
ab9ae313
AK
713gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
714 struct x86_exception *exception);
715gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
716 struct x86_exception *exception);
717gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
718 struct x86_exception *exception);
719gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
720 struct x86_exception *exception);
54f1585a
ZX
721
722int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
723
724int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
725
dc25e89e
AP
726int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
727 void *insn, int insn_len);
a7052897 728void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 729
18552672 730void kvm_enable_tdp(void);
5f4cb662 731void kvm_disable_tdp(void);
18552672 732
de7d789a 733int complete_pio(struct kvm_vcpu *vcpu);
f850e2e6 734bool kvm_check_iopl(struct kvm_vcpu *vcpu);
ec6d273d
ZX
735
736static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
737{
738 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
739
740 return (struct kvm_mmu_page *)page_private(page);
741}
742
d6e88aec 743static inline u16 kvm_read_ldt(void)
ec6d273d
ZX
744{
745 u16 ldt;
746 asm("sldt %0" : "=g"(ldt));
747 return ldt;
748}
749
d6e88aec 750static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX
751{
752 asm("lldt %0" : : "rm"(sel));
753}
ec6d273d 754
ec6d273d
ZX
755#ifdef CONFIG_X86_64
756static inline unsigned long read_msr(unsigned long msr)
757{
758 u64 value;
759
760 rdmsrl(msr, value);
761 return value;
762}
763#endif
764
ec6d273d
ZX
765static inline u32 get_rdx_init_val(void)
766{
767 return 0x600; /* P6 family */
768}
769
c1a5d4f9
AK
770static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
771{
772 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
773}
774
ec6d273d
ZX
775#define TSS_IOPB_BASE_OFFSET 0x66
776#define TSS_BASE_SIZE 0x68
777#define TSS_IOPB_SIZE (65536 / 8)
778#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP
779#define RMODE_TSS_SIZE \
780 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 781
37817f29
IE
782enum {
783 TASK_SWITCH_CALL = 0,
784 TASK_SWITCH_IRET = 1,
785 TASK_SWITCH_JMP = 2,
786 TASK_SWITCH_GATE = 3,
787};
788
1371d904 789#define HF_GIF_MASK (1 << 0)
3d6368ef
AG
790#define HF_HIF_MASK (1 << 1)
791#define HF_VINTR_MASK (1 << 2)
95ba8273 792#define HF_NMI_MASK (1 << 3)
44c11430 793#define HF_IRET_MASK (1 << 4)
ec9e60b2 794#define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1371d904 795
4ecac3fd
AK
796/*
797 * Hardware virtualization extension instructions may fault if a
798 * reboot turns off virtualization while processes are running.
799 * Trap the fault and ignore the instruction if that happens.
800 */
b7c4145b
AK
801asmlinkage void kvm_spurious_fault(void);
802extern bool kvm_rebooting;
4ecac3fd
AK
803
804#define __kvm_handle_fault_on_reboot(insn) \
805 "666: " insn "\n\t" \
b7c4145b 806 "668: \n\t" \
18b13e54 807 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 808 "667: \n\t" \
b7c4145b
AK
809 "cmpb $0, kvm_rebooting \n\t" \
810 "jne 668b \n\t" \
8ceed347 811 __ASM_SIZE(push) " $666b \n\t" \
b7c4145b 812 "call kvm_spurious_fault \n\t" \
4ecac3fd
AK
813 ".popsection \n\t" \
814 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 815 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK
816 ".popsection"
817
e930bffe
AA
818#define KVM_ARCH_WANT_MMU_NOTIFIER
819int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
820int kvm_age_hva(struct kvm *kvm, unsigned long hva);
8ee53820 821int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
3da0dd43 822void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
82725b20 823int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
a1b37100
GN
824int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
825int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
0b71785d 826int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
e930bffe 827
18863bdd 828void kvm_define_shared_msr(unsigned index, u32 msr);
d5696725 829void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
18863bdd 830
f92653ee
JK
831bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
832
af585b92
GN
833void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
834 struct kvm_async_pf *work);
835void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
836 struct kvm_async_pf *work);
56028d08
GN
837void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
838 struct kvm_async_pf *work);
7c90705b 839bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
af585b92
GN
840extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
841
db8fcefa
AP
842void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
843
1965aae3 844#endif /* _ASM_X86_KVM_HOST_H */
This page took 0.419917 seconds and 5 git commands to generate.