Commit | Line | Data |
---|---|---|
a656c8ef | 1 | /* |
043405e1 CO |
2 | * Kernel-based Virtual Machine driver for Linux |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
1965aae3 PA |
11 | #ifndef _ASM_X86_KVM_HOST_H |
12 | #define _ASM_X86_KVM_HOST_H | |
043405e1 | 13 | |
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
e930bffe | 16 | #include <linux/mmu_notifier.h> |
229456fc | 17 | #include <linux/tracepoint.h> |
34c16eec ZX |
18 | |
19 | #include <linux/kvm.h> | |
20 | #include <linux/kvm_para.h> | |
edf88417 | 21 | #include <linux/kvm_types.h> |
34c16eec | 22 | |
50d0a0f9 | 23 | #include <asm/pvclock-abi.h> |
e01a1b57 | 24 | #include <asm/desc.h> |
0bed3b56 | 25 | #include <asm/mtrr.h> |
9962d032 | 26 | #include <asm/msr-index.h> |
e01a1b57 | 27 | |
69a9f69b AK |
28 | #define KVM_MAX_VCPUS 16 |
29 | #define KVM_MEMORY_SLOTS 32 | |
30 | /* memory slots that does not exposed to userspace */ | |
31 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
32 | ||
33 | #define KVM_PIO_PAGE_OFFSET 1 | |
542472b5 | 34 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 |
69a9f69b | 35 | |
cd6e8f87 ZX |
36 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
37 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
7d76b4d3 JP |
38 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
39 | 0xFFFFFF0000000000ULL) | |
cd6e8f87 | 40 | |
cd6e8f87 ZX |
41 | #define INVALID_PAGE (~(hpa_t)0) |
42 | #define UNMAPPED_GVA (~(gpa_t)0) | |
43 | ||
ec04b260 | 44 | /* KVM Hugepage definitions for x86 */ |
04326caa | 45 | #define KVM_NR_PAGE_SIZES 3 |
ec04b260 JR |
46 | #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + (((x) - 1) * 9)) |
47 | #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) | |
48 | #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) | |
49 | #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) | |
05da4558 | 50 | |
cd6e8f87 | 51 | #define DE_VECTOR 0 |
19bd8afd | 52 | #define DB_VECTOR 1 |
77ab6db0 JK |
53 | #define BP_VECTOR 3 |
54 | #define OF_VECTOR 4 | |
55 | #define BR_VECTOR 5 | |
cd6e8f87 ZX |
56 | #define UD_VECTOR 6 |
57 | #define NM_VECTOR 7 | |
58 | #define DF_VECTOR 8 | |
59 | #define TS_VECTOR 10 | |
60 | #define NP_VECTOR 11 | |
61 | #define SS_VECTOR 12 | |
62 | #define GP_VECTOR 13 | |
63 | #define PF_VECTOR 14 | |
77ab6db0 | 64 | #define MF_VECTOR 16 |
53371b50 | 65 | #define MC_VECTOR 18 |
cd6e8f87 ZX |
66 | |
67 | #define SELECTOR_TI_MASK (1 << 2) | |
68 | #define SELECTOR_RPL_MASK 0x03 | |
69 | ||
70 | #define IOPL_SHIFT 12 | |
71 | ||
d69fb81f ZX |
72 | #define KVM_ALIAS_SLOTS 4 |
73 | ||
d657a98e ZX |
74 | #define KVM_PERMILLE_MMU_PAGES 20 |
75 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
1ae0a13d DE |
76 | #define KVM_MMU_HASH_SHIFT 10 |
77 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
d657a98e ZX |
78 | #define KVM_MIN_FREE_MMU_PAGES 5 |
79 | #define KVM_REFILL_PAGES 25 | |
80 | #define KVM_MAX_CPUID_ENTRIES 40 | |
0bed3b56 | 81 | #define KVM_NR_FIXED_MTRR_REGION 88 |
9ba075a6 | 82 | #define KVM_NR_VAR_MTRR 8 |
d657a98e | 83 | |
e9b11c17 ZX |
84 | extern spinlock_t kvm_lock; |
85 | extern struct list_head vm_list; | |
86 | ||
d657a98e ZX |
87 | struct kvm_vcpu; |
88 | struct kvm; | |
89 | ||
5fdbf976 | 90 | enum kvm_reg { |
2b3ccfa0 ZX |
91 | VCPU_REGS_RAX = 0, |
92 | VCPU_REGS_RCX = 1, | |
93 | VCPU_REGS_RDX = 2, | |
94 | VCPU_REGS_RBX = 3, | |
95 | VCPU_REGS_RSP = 4, | |
96 | VCPU_REGS_RBP = 5, | |
97 | VCPU_REGS_RSI = 6, | |
98 | VCPU_REGS_RDI = 7, | |
99 | #ifdef CONFIG_X86_64 | |
100 | VCPU_REGS_R8 = 8, | |
101 | VCPU_REGS_R9 = 9, | |
102 | VCPU_REGS_R10 = 10, | |
103 | VCPU_REGS_R11 = 11, | |
104 | VCPU_REGS_R12 = 12, | |
105 | VCPU_REGS_R13 = 13, | |
106 | VCPU_REGS_R14 = 14, | |
107 | VCPU_REGS_R15 = 15, | |
108 | #endif | |
5fdbf976 | 109 | VCPU_REGS_RIP, |
2b3ccfa0 ZX |
110 | NR_VCPU_REGS |
111 | }; | |
112 | ||
6de4f3ad AK |
113 | enum kvm_reg_ex { |
114 | VCPU_EXREG_PDPTR = NR_VCPU_REGS, | |
115 | }; | |
116 | ||
2b3ccfa0 | 117 | enum { |
81609e3e | 118 | VCPU_SREG_ES, |
2b3ccfa0 | 119 | VCPU_SREG_CS, |
81609e3e | 120 | VCPU_SREG_SS, |
2b3ccfa0 | 121 | VCPU_SREG_DS, |
2b3ccfa0 ZX |
122 | VCPU_SREG_FS, |
123 | VCPU_SREG_GS, | |
2b3ccfa0 ZX |
124 | VCPU_SREG_TR, |
125 | VCPU_SREG_LDTR, | |
126 | }; | |
127 | ||
56e82318 | 128 | #include <asm/kvm_emulate.h> |
2b3ccfa0 | 129 | |
d657a98e ZX |
130 | #define KVM_NR_MEM_OBJS 40 |
131 | ||
42dbaa5a JK |
132 | #define KVM_NR_DB_REGS 4 |
133 | ||
134 | #define DR6_BD (1 << 13) | |
135 | #define DR6_BS (1 << 14) | |
136 | #define DR6_FIXED_1 0xffff0ff0 | |
137 | #define DR6_VOLATILE 0x0000e00f | |
138 | ||
139 | #define DR7_BP_EN_MASK 0x000000ff | |
140 | #define DR7_GE (1 << 9) | |
141 | #define DR7_GD (1 << 13) | |
142 | #define DR7_FIXED_1 0x00000400 | |
143 | #define DR7_VOLATILE 0xffff23ff | |
144 | ||
d657a98e ZX |
145 | /* |
146 | * We don't want allocation failures within the mmu code, so we preallocate | |
147 | * enough memory for a single page fault in a cache. | |
148 | */ | |
149 | struct kvm_mmu_memory_cache { | |
150 | int nobjs; | |
151 | void *objects[KVM_NR_MEM_OBJS]; | |
152 | }; | |
153 | ||
154 | #define NR_PTE_CHAIN_ENTRIES 5 | |
155 | ||
156 | struct kvm_pte_chain { | |
157 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
158 | struct hlist_node link; | |
159 | }; | |
160 | ||
161 | /* | |
162 | * kvm_mmu_page_role, below, is defined as: | |
163 | * | |
164 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
165 | * bits 4:7 - page table level for this shadow (1-4) | |
166 | * bits 8:9 - page table quadrant for 2-level guests | |
f6e2c02b AK |
167 | * bit 16 - direct mapping of virtual to physical mapping at gfn |
168 | * used for real mode and two-dimensional paging | |
d657a98e ZX |
169 | * bits 17:19 - common access permissions for all ptes in this shadow page |
170 | */ | |
171 | union kvm_mmu_page_role { | |
172 | unsigned word; | |
173 | struct { | |
7d76b4d3 JP |
174 | unsigned glevels:4; |
175 | unsigned level:4; | |
176 | unsigned quadrant:2; | |
177 | unsigned pad_for_nice_hex_output:6; | |
f6e2c02b | 178 | unsigned direct:1; |
7d76b4d3 | 179 | unsigned access:3; |
2e53d63a | 180 | unsigned invalid:1; |
2f0b3d60 | 181 | unsigned cr4_pge:1; |
9645bb56 | 182 | unsigned nxe:1; |
d657a98e ZX |
183 | }; |
184 | }; | |
185 | ||
186 | struct kvm_mmu_page { | |
187 | struct list_head link; | |
188 | struct hlist_node hash_link; | |
189 | ||
6cffe8ca MT |
190 | struct list_head oos_link; |
191 | ||
d657a98e ZX |
192 | /* |
193 | * The following two entries are used to key the shadow page in the | |
194 | * hash table. | |
195 | */ | |
196 | gfn_t gfn; | |
197 | union kvm_mmu_page_role role; | |
198 | ||
199 | u64 *spt; | |
200 | /* hold the gfn of each spte inside spt */ | |
201 | gfn_t *gfns; | |
291f26bc SY |
202 | /* |
203 | * One bit set per slot which has memory | |
204 | * in this shadow page. | |
205 | */ | |
206 | DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); | |
d657a98e ZX |
207 | int multimapped; /* More than one parent_pte? */ |
208 | int root_count; /* Currently serving as active root */ | |
4731d4c7 | 209 | bool unsync; |
60c8aec6 | 210 | unsigned int unsync_children; |
d657a98e ZX |
211 | union { |
212 | u64 *parent_pte; /* !multimapped */ | |
213 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
214 | }; | |
0074ff63 | 215 | DECLARE_BITMAP(unsync_child_bitmap, 512); |
d657a98e ZX |
216 | }; |
217 | ||
6ad18fba DH |
218 | struct kvm_pv_mmu_op_buffer { |
219 | void *ptr; | |
220 | unsigned len; | |
221 | unsigned processed; | |
222 | char buf[512] __aligned(sizeof(long)); | |
223 | }; | |
224 | ||
1c08364c AK |
225 | struct kvm_pio_request { |
226 | unsigned long count; | |
227 | int cur_count; | |
228 | gva_t guest_gva; | |
229 | int in; | |
230 | int port; | |
231 | int size; | |
232 | int string; | |
233 | int down; | |
234 | int rep; | |
235 | }; | |
236 | ||
d657a98e ZX |
237 | /* |
238 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
239 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
240 | * mode. | |
241 | */ | |
242 | struct kvm_mmu { | |
243 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
244 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
245 | void (*free)(struct kvm_vcpu *vcpu); | |
246 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
247 | void (*prefetch_page)(struct kvm_vcpu *vcpu, | |
248 | struct kvm_mmu_page *page); | |
e8bc217a MT |
249 | int (*sync_page)(struct kvm_vcpu *vcpu, |
250 | struct kvm_mmu_page *sp); | |
a7052897 | 251 | void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); |
d657a98e ZX |
252 | hpa_t root_hpa; |
253 | int root_level; | |
254 | int shadow_root_level; | |
a770f6f2 | 255 | union kvm_mmu_page_role base_role; |
d657a98e ZX |
256 | |
257 | u64 *pae_root; | |
82725b20 | 258 | u64 rsvd_bits_mask[2][4]; |
d657a98e ZX |
259 | }; |
260 | ||
ad312c7c | 261 | struct kvm_vcpu_arch { |
34c16eec | 262 | u64 host_tsc; |
5fdbf976 MT |
263 | /* |
264 | * rip and regs accesses must go through | |
265 | * kvm_{register,rip}_{read,write} functions. | |
266 | */ | |
267 | unsigned long regs[NR_VCPU_REGS]; | |
268 | u32 regs_avail; | |
269 | u32 regs_dirty; | |
34c16eec ZX |
270 | |
271 | unsigned long cr0; | |
272 | unsigned long cr2; | |
273 | unsigned long cr3; | |
274 | unsigned long cr4; | |
fc78f519 | 275 | unsigned long cr4_guest_owned_bits; |
34c16eec | 276 | unsigned long cr8; |
1371d904 | 277 | u32 hflags; |
34c16eec ZX |
278 | u64 pdptrs[4]; /* pae */ |
279 | u64 shadow_efer; | |
280 | u64 apic_base; | |
281 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
e1035715 | 282 | int32_t apic_arb_prio; |
34c16eec ZX |
283 | int mp_state; |
284 | int sipi_vector; | |
285 | u64 ia32_misc_enable_msr; | |
b209749f | 286 | bool tpr_access_reporting; |
34c16eec ZX |
287 | |
288 | struct kvm_mmu mmu; | |
6ad18fba DH |
289 | /* only needed in kvm_pv_mmu_op() path, but it's hot so |
290 | * put it here to avoid allocation */ | |
291 | struct kvm_pv_mmu_op_buffer mmu_op_buffer; | |
34c16eec ZX |
292 | |
293 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
294 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
295 | struct kvm_mmu_memory_cache mmu_page_cache; | |
296 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
297 | ||
298 | gfn_t last_pt_write_gfn; | |
299 | int last_pt_write_count; | |
300 | u64 *last_pte_updated; | |
1b7fcd32 | 301 | gfn_t last_pte_gfn; |
34c16eec | 302 | |
d7824fff | 303 | struct { |
35149e21 AL |
304 | gfn_t gfn; /* presumed gfn during guest pte update */ |
305 | pfn_t pfn; /* pfn corresponding to that gfn */ | |
e930bffe | 306 | unsigned long mmu_seq; |
d7824fff AK |
307 | } update_pte; |
308 | ||
34c16eec ZX |
309 | struct i387_fxsave_struct host_fx_image; |
310 | struct i387_fxsave_struct guest_fx_image; | |
311 | ||
312 | gva_t mmio_fault_cr2; | |
313 | struct kvm_pio_request pio; | |
314 | void *pio_data; | |
315 | ||
66fd3f7f GN |
316 | u8 event_exit_inst_len; |
317 | ||
298101da AK |
318 | struct kvm_queued_exception { |
319 | bool pending; | |
320 | bool has_error_code; | |
321 | u8 nr; | |
322 | u32 error_code; | |
323 | } exception; | |
324 | ||
937a7eae AK |
325 | struct kvm_queued_interrupt { |
326 | bool pending; | |
66fd3f7f | 327 | bool soft; |
937a7eae AK |
328 | u8 nr; |
329 | } interrupt; | |
330 | ||
34c16eec ZX |
331 | int halt_request; /* real mode on Intel only */ |
332 | ||
333 | int cpuid_nent; | |
07716717 | 334 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
335 | /* emulate context */ |
336 | ||
337 | struct x86_emulate_ctxt emulate_ctxt; | |
18068523 GOC |
338 | |
339 | gpa_t time; | |
50d0a0f9 GH |
340 | struct pvclock_vcpu_time_info hv_clock; |
341 | unsigned int hv_clock_tsc_khz; | |
18068523 GOC |
342 | unsigned int time_offset; |
343 | struct page *time_page; | |
3419ffc8 SY |
344 | |
345 | bool nmi_pending; | |
668f612f | 346 | bool nmi_injected; |
9ba075a6 | 347 | |
0bed3b56 SY |
348 | struct mtrr_state_type mtrr_state; |
349 | u32 pat; | |
42dbaa5a JK |
350 | |
351 | int switch_db_regs; | |
42dbaa5a JK |
352 | unsigned long db[KVM_NR_DB_REGS]; |
353 | unsigned long dr6; | |
354 | unsigned long dr7; | |
355 | unsigned long eff_db[KVM_NR_DB_REGS]; | |
890ca9ae HY |
356 | |
357 | u64 mcg_cap; | |
358 | u64 mcg_status; | |
359 | u64 mcg_ctl; | |
360 | u64 *mce_banks; | |
94fe45da JK |
361 | |
362 | /* used for guest single stepping over the given code position */ | |
363 | u16 singlestep_cs; | |
364 | unsigned long singlestep_rip; | |
34c16eec ZX |
365 | }; |
366 | ||
d69fb81f ZX |
367 | struct kvm_mem_alias { |
368 | gfn_t base_gfn; | |
369 | unsigned long npages; | |
370 | gfn_t target_gfn; | |
371 | }; | |
372 | ||
373 | struct kvm_arch{ | |
374 | int naliases; | |
375 | struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS]; | |
f05e70ac ZX |
376 | |
377 | unsigned int n_free_mmu_pages; | |
378 | unsigned int n_requested_mmu_pages; | |
379 | unsigned int n_alloc_mmu_pages; | |
380 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | |
381 | /* | |
382 | * Hash table of struct kvm_mmu_page. | |
383 | */ | |
384 | struct list_head active_mmu_pages; | |
4d5c5d0f | 385 | struct list_head assigned_dev_head; |
19de40a8 | 386 | struct iommu_domain *iommu_domain; |
522c68c4 | 387 | int iommu_flags; |
d7deeeb0 ZX |
388 | struct kvm_pic *vpic; |
389 | struct kvm_ioapic *vioapic; | |
7837699f | 390 | struct kvm_pit *vpit; |
cc6e462c | 391 | int vapics_in_nmi_mode; |
bfc6d222 | 392 | |
bfc6d222 ZX |
393 | unsigned int tss_addr; |
394 | struct page *apic_access_page; | |
18068523 GOC |
395 | |
396 | gpa_t wall_clock; | |
b7ebfb05 SY |
397 | |
398 | struct page *ept_identity_pagetable; | |
399 | bool ept_identity_pagetable_done; | |
b927a3ce | 400 | gpa_t ept_identity_map_addr; |
5550af4d SY |
401 | |
402 | unsigned long irq_sources_bitmap; | |
53f658b3 | 403 | u64 vm_init_tsc; |
afbcf7ab | 404 | s64 kvmclock_offset; |
ffde22ac ES |
405 | |
406 | struct kvm_xen_hvm_config xen_hvm_config; | |
d69fb81f ZX |
407 | }; |
408 | ||
0711456c ZX |
409 | struct kvm_vm_stat { |
410 | u32 mmu_shadow_zapped; | |
411 | u32 mmu_pte_write; | |
412 | u32 mmu_pte_updated; | |
413 | u32 mmu_pde_zapped; | |
414 | u32 mmu_flooded; | |
415 | u32 mmu_recycled; | |
dfc5aa00 | 416 | u32 mmu_cache_miss; |
4731d4c7 | 417 | u32 mmu_unsync; |
0711456c | 418 | u32 remote_tlb_flush; |
05da4558 | 419 | u32 lpages; |
0711456c ZX |
420 | }; |
421 | ||
77b4c255 ZX |
422 | struct kvm_vcpu_stat { |
423 | u32 pf_fixed; | |
424 | u32 pf_guest; | |
425 | u32 tlb_flush; | |
426 | u32 invlpg; | |
427 | ||
428 | u32 exits; | |
429 | u32 io_exits; | |
430 | u32 mmio_exits; | |
431 | u32 signal_exits; | |
432 | u32 irq_window_exits; | |
f08864b4 | 433 | u32 nmi_window_exits; |
77b4c255 ZX |
434 | u32 halt_exits; |
435 | u32 halt_wakeup; | |
436 | u32 request_irq_exits; | |
437 | u32 irq_exits; | |
438 | u32 host_state_reload; | |
439 | u32 efer_reload; | |
440 | u32 fpu_reload; | |
441 | u32 insn_emulation; | |
442 | u32 insn_emulation_fail; | |
f11c3a8d | 443 | u32 hypercalls; |
fa89a817 | 444 | u32 irq_injections; |
c4abb7c9 | 445 | u32 nmi_injections; |
77b4c255 | 446 | }; |
ad312c7c | 447 | |
e01a1b57 HB |
448 | struct descriptor_table { |
449 | u16 limit; | |
450 | unsigned long base; | |
451 | } __attribute__((packed)); | |
452 | ||
ea4a5ff8 ZX |
453 | struct kvm_x86_ops { |
454 | int (*cpu_has_kvm_support)(void); /* __init */ | |
455 | int (*disabled_by_bios)(void); /* __init */ | |
10474ae8 | 456 | int (*hardware_enable)(void *dummy); |
ea4a5ff8 ZX |
457 | void (*hardware_disable)(void *dummy); |
458 | void (*check_processor_compatibility)(void *rtn); | |
459 | int (*hardware_setup)(void); /* __init */ | |
460 | void (*hardware_unsetup)(void); /* __exit */ | |
774ead3a | 461 | bool (*cpu_has_accelerated_tpr)(void); |
0e851880 | 462 | void (*cpuid_update)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
463 | |
464 | /* Create, but do not attach this VCPU */ | |
465 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
466 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
467 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
468 | ||
469 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
470 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
471 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 472 | |
355be0b9 JK |
473 | void (*set_guest_debug)(struct kvm_vcpu *vcpu, |
474 | struct kvm_guest_debug *dbg); | |
ea4a5ff8 ZX |
475 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); |
476 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
477 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
478 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
479 | struct kvm_segment *var, int seg); | |
2e4d2653 | 480 | int (*get_cpl)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
481 | void (*set_segment)(struct kvm_vcpu *vcpu, |
482 | struct kvm_segment *var, int seg); | |
483 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
484 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | |
485 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
486 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
487 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
488 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
489 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
490 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
491 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
492 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
493 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
494 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
495 | int *exception); | |
5fdbf976 | 496 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); |
ea4a5ff8 ZX |
497 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); |
498 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
499 | ||
500 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 501 | |
851ba692 AK |
502 | void (*run)(struct kvm_vcpu *vcpu); |
503 | int (*handle_exit)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 504 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); |
2809f5d2 GC |
505 | void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); |
506 | u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); | |
ea4a5ff8 ZX |
507 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, |
508 | unsigned char *hypercall_addr); | |
66fd3f7f | 509 | void (*set_irq)(struct kvm_vcpu *vcpu); |
95ba8273 | 510 | void (*set_nmi)(struct kvm_vcpu *vcpu); |
298101da AK |
511 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
512 | bool has_error_code, u32 error_code); | |
78646121 | 513 | int (*interrupt_allowed)(struct kvm_vcpu *vcpu); |
95ba8273 | 514 | int (*nmi_allowed)(struct kvm_vcpu *vcpu); |
3cfc3092 JK |
515 | bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); |
516 | void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); | |
95ba8273 GN |
517 | void (*enable_nmi_window)(struct kvm_vcpu *vcpu); |
518 | void (*enable_irq_window)(struct kvm_vcpu *vcpu); | |
519 | void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); | |
ea4a5ff8 | 520 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); |
67253af5 | 521 | int (*get_tdp_level)(void); |
4b12f0de | 522 | u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); |
344f414f JR |
523 | bool (*gb_page_enable)(void); |
524 | ||
229456fc | 525 | const struct trace_print_flags *exit_reasons_str; |
ea4a5ff8 ZX |
526 | }; |
527 | ||
97896d04 ZX |
528 | extern struct kvm_x86_ops *kvm_x86_ops; |
529 | ||
54f1585a ZX |
530 | int kvm_mmu_module_init(void); |
531 | void kvm_mmu_module_exit(void); | |
532 | ||
533 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
534 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
535 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
536 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
7b52345e SY |
537 | void kvm_mmu_set_base_ptes(u64 base_pte); |
538 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
4b12f0de | 539 | u64 dirty_mask, u64 nx_mask, u64 x_mask); |
54f1585a ZX |
540 | |
541 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
542 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
543 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 544 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
545 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
546 | ||
cc4b6871 JR |
547 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
548 | ||
3200f405 | 549 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, |
9f811285 | 550 | const void *val, int bytes); |
2f333bcb MT |
551 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, |
552 | gpa_t addr, unsigned long *ret); | |
4b12f0de | 553 | u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); |
2f333bcb MT |
554 | |
555 | extern bool tdp_enabled; | |
9f811285 | 556 | |
54f1585a ZX |
557 | enum emulation_result { |
558 | EMULATE_DONE, /* no further processing */ | |
559 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
560 | EMULATE_FAIL, /* can't emulate this instruction */ | |
561 | }; | |
562 | ||
571008da SY |
563 | #define EMULTYPE_NO_DECODE (1 << 0) |
564 | #define EMULTYPE_TRAP_UD (1 << 1) | |
ba8afb6b | 565 | #define EMULTYPE_SKIP (1 << 2) |
851ba692 | 566 | int emulate_instruction(struct kvm_vcpu *vcpu, |
571008da | 567 | unsigned long cr2, u16 error_code, int emulation_type); |
54f1585a ZX |
568 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); |
569 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
570 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
571 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
572 | unsigned long *rflags); | |
573 | ||
574 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
575 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
576 | unsigned long *rflags); | |
f2b4b7dd | 577 | void kvm_enable_efer_bits(u64); |
54f1585a ZX |
578 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
579 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
580 | ||
581 | struct x86_emulate_ctxt; | |
582 | ||
851ba692 | 583 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, |
54f1585a | 584 | int size, unsigned port); |
851ba692 | 585 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in, |
54f1585a ZX |
586 | int size, unsigned long count, int down, |
587 | gva_t address, int rep, unsigned port); | |
588 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | |
589 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
590 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
591 | int emulate_clts(struct kvm_vcpu *vcpu); | |
592 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
593 | unsigned long *dest); | |
594 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
595 | unsigned long value); | |
596 | ||
3e6e0aab GT |
597 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); |
598 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, | |
599 | int type_bits, int seg); | |
600 | ||
37817f29 IE |
601 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); |
602 | ||
2d3ad1f4 | 603 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
9c20456a JR |
604 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
605 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); | |
606 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); | |
2d3ad1f4 AK |
607 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
608 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
54f1585a ZX |
609 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
610 | ||
611 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
612 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
613 | ||
91586a3b JK |
614 | unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); |
615 | void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); | |
616 | ||
298101da AK |
617 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
618 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
c3c91fee AK |
619 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
620 | u32 error_code); | |
0a79b009 | 621 | bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); |
298101da | 622 | |
4925663a | 623 | int kvm_pic_set_irq(void *opaque, int irq, int level); |
3de42dc0 | 624 | |
3419ffc8 SY |
625 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); |
626 | ||
54f1585a ZX |
627 | void fx_init(struct kvm_vcpu *vcpu); |
628 | ||
54f1585a ZX |
629 | int emulator_write_emulated(unsigned long addr, |
630 | const void *val, | |
631 | unsigned int bytes, | |
632 | struct kvm_vcpu *vcpu); | |
633 | ||
634 | unsigned long segment_base(u16 selector); | |
635 | ||
d835dfec | 636 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a | 637 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
ad218f85 MT |
638 | const u8 *new, int bytes, |
639 | bool guest_initiated); | |
54f1585a ZX |
640 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); |
641 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
642 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
643 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
0ba73cda | 644 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); |
54f1585a ZX |
645 | |
646 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
647 | ||
648 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
649 | ||
3067714c | 650 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
a7052897 | 651 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); |
34c16eec | 652 | |
18552672 | 653 | void kvm_enable_tdp(void); |
5f4cb662 | 654 | void kvm_disable_tdp(void); |
18552672 | 655 | |
a03490ed | 656 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
de7d789a | 657 | int complete_pio(struct kvm_vcpu *vcpu); |
ec6d273d | 658 | |
2843099f IE |
659 | struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn); |
660 | ||
ec6d273d ZX |
661 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) |
662 | { | |
663 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
664 | ||
665 | return (struct kvm_mmu_page *)page_private(page); | |
666 | } | |
667 | ||
d6e88aec | 668 | static inline u16 kvm_read_fs(void) |
ec6d273d ZX |
669 | { |
670 | u16 seg; | |
671 | asm("mov %%fs, %0" : "=g"(seg)); | |
672 | return seg; | |
673 | } | |
674 | ||
d6e88aec | 675 | static inline u16 kvm_read_gs(void) |
ec6d273d ZX |
676 | { |
677 | u16 seg; | |
678 | asm("mov %%gs, %0" : "=g"(seg)); | |
679 | return seg; | |
680 | } | |
681 | ||
d6e88aec | 682 | static inline u16 kvm_read_ldt(void) |
ec6d273d ZX |
683 | { |
684 | u16 ldt; | |
685 | asm("sldt %0" : "=g"(ldt)); | |
686 | return ldt; | |
687 | } | |
688 | ||
d6e88aec | 689 | static inline void kvm_load_fs(u16 sel) |
ec6d273d ZX |
690 | { |
691 | asm("mov %0, %%fs" : : "rm"(sel)); | |
692 | } | |
693 | ||
d6e88aec | 694 | static inline void kvm_load_gs(u16 sel) |
ec6d273d ZX |
695 | { |
696 | asm("mov %0, %%gs" : : "rm"(sel)); | |
697 | } | |
698 | ||
d6e88aec | 699 | static inline void kvm_load_ldt(u16 sel) |
ec6d273d ZX |
700 | { |
701 | asm("lldt %0" : : "rm"(sel)); | |
702 | } | |
ec6d273d | 703 | |
d6e88aec | 704 | static inline void kvm_get_idt(struct descriptor_table *table) |
ec6d273d ZX |
705 | { |
706 | asm("sidt %0" : "=m"(*table)); | |
707 | } | |
708 | ||
d6e88aec | 709 | static inline void kvm_get_gdt(struct descriptor_table *table) |
ec6d273d ZX |
710 | { |
711 | asm("sgdt %0" : "=m"(*table)); | |
712 | } | |
713 | ||
d6e88aec | 714 | static inline unsigned long kvm_read_tr_base(void) |
ec6d273d ZX |
715 | { |
716 | u16 tr; | |
717 | asm("str %0" : "=g"(tr)); | |
718 | return segment_base(tr); | |
719 | } | |
720 | ||
721 | #ifdef CONFIG_X86_64 | |
722 | static inline unsigned long read_msr(unsigned long msr) | |
723 | { | |
724 | u64 value; | |
725 | ||
726 | rdmsrl(msr, value); | |
727 | return value; | |
728 | } | |
729 | #endif | |
730 | ||
d6e88aec | 731 | static inline void kvm_fx_save(struct i387_fxsave_struct *image) |
ec6d273d ZX |
732 | { |
733 | asm("fxsave (%0)":: "r" (image)); | |
734 | } | |
735 | ||
d6e88aec | 736 | static inline void kvm_fx_restore(struct i387_fxsave_struct *image) |
ec6d273d ZX |
737 | { |
738 | asm("fxrstor (%0)":: "r" (image)); | |
739 | } | |
740 | ||
d6e88aec | 741 | static inline void kvm_fx_finit(void) |
ec6d273d ZX |
742 | { |
743 | asm("finit"); | |
744 | } | |
745 | ||
746 | static inline u32 get_rdx_init_val(void) | |
747 | { | |
748 | return 0x600; /* P6 family */ | |
749 | } | |
750 | ||
c1a5d4f9 AK |
751 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
752 | { | |
753 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
754 | } | |
755 | ||
ec6d273d ZX |
756 | #define TSS_IOPB_BASE_OFFSET 0x66 |
757 | #define TSS_BASE_SIZE 0x68 | |
758 | #define TSS_IOPB_SIZE (65536 / 8) | |
759 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
7d76b4d3 JP |
760 | #define RMODE_TSS_SIZE \ |
761 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 762 | |
37817f29 IE |
763 | enum { |
764 | TASK_SWITCH_CALL = 0, | |
765 | TASK_SWITCH_IRET = 1, | |
766 | TASK_SWITCH_JMP = 2, | |
767 | TASK_SWITCH_GATE = 3, | |
768 | }; | |
769 | ||
1371d904 | 770 | #define HF_GIF_MASK (1 << 0) |
3d6368ef AG |
771 | #define HF_HIF_MASK (1 << 1) |
772 | #define HF_VINTR_MASK (1 << 2) | |
95ba8273 | 773 | #define HF_NMI_MASK (1 << 3) |
44c11430 | 774 | #define HF_IRET_MASK (1 << 4) |
1371d904 | 775 | |
4ecac3fd AK |
776 | /* |
777 | * Hardware virtualization extension instructions may fault if a | |
778 | * reboot turns off virtualization while processes are running. | |
779 | * Trap the fault and ignore the instruction if that happens. | |
780 | */ | |
781 | asmlinkage void kvm_handle_fault_on_reboot(void); | |
782 | ||
783 | #define __kvm_handle_fault_on_reboot(insn) \ | |
784 | "666: " insn "\n\t" \ | |
18b13e54 | 785 | ".pushsection .fixup, \"ax\" \n" \ |
4ecac3fd | 786 | "667: \n\t" \ |
8ceed347 | 787 | __ASM_SIZE(push) " $666b \n\t" \ |
4ecac3fd AK |
788 | "jmp kvm_handle_fault_on_reboot \n\t" \ |
789 | ".popsection \n\t" \ | |
790 | ".pushsection __ex_table, \"a\" \n\t" \ | |
8ceed347 | 791 | _ASM_PTR " 666b, 667b \n\t" \ |
4ecac3fd AK |
792 | ".popsection" |
793 | ||
e930bffe AA |
794 | #define KVM_ARCH_WANT_MMU_NOTIFIER |
795 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
796 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | |
3da0dd43 | 797 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); |
82725b20 | 798 | int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); |
a1b37100 GN |
799 | int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); |
800 | int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); | |
0b71785d | 801 | int kvm_cpu_get_interrupt(struct kvm_vcpu *v); |
e930bffe | 802 | |
18863bdd | 803 | void kvm_define_shared_msr(unsigned index, u32 msr); |
d5696725 | 804 | void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); |
18863bdd | 805 | |
1965aae3 | 806 | #endif /* _ASM_X86_KVM_HOST_H */ |