Commit | Line | Data |
---|---|---|
a656c8ef | 1 | /* |
043405e1 CO |
2 | * Kernel-based Virtual Machine driver for Linux |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
1965aae3 PA |
11 | #ifndef _ASM_X86_KVM_HOST_H |
12 | #define _ASM_X86_KVM_HOST_H | |
043405e1 | 13 | |
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
e930bffe | 16 | #include <linux/mmu_notifier.h> |
34c16eec ZX |
17 | |
18 | #include <linux/kvm.h> | |
19 | #include <linux/kvm_para.h> | |
edf88417 | 20 | #include <linux/kvm_types.h> |
34c16eec | 21 | |
50d0a0f9 | 22 | #include <asm/pvclock-abi.h> |
e01a1b57 | 23 | #include <asm/desc.h> |
0bed3b56 | 24 | #include <asm/mtrr.h> |
9962d032 | 25 | #include <asm/msr-index.h> |
e01a1b57 | 26 | |
69a9f69b AK |
27 | #define KVM_MAX_VCPUS 16 |
28 | #define KVM_MEMORY_SLOTS 32 | |
29 | /* memory slots that does not exposed to userspace */ | |
30 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
31 | ||
32 | #define KVM_PIO_PAGE_OFFSET 1 | |
542472b5 | 33 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 |
69a9f69b | 34 | |
cd6e8f87 ZX |
35 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
36 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
7d76b4d3 JP |
37 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
38 | 0xFFFFFF0000000000ULL) | |
cd6e8f87 | 39 | |
7d76b4d3 | 40 | #define KVM_GUEST_CR0_MASK \ |
cd6e8f87 ZX |
41 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ |
42 | | X86_CR0_NW | X86_CR0_CD) | |
7d76b4d3 | 43 | #define KVM_VM_CR0_ALWAYS_ON \ |
cd6e8f87 ZX |
44 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ |
45 | | X86_CR0_MP) | |
7d76b4d3 | 46 | #define KVM_GUEST_CR4_MASK \ |
cd6e8f87 ZX |
47 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) |
48 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | |
49 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE) | |
50 | ||
51 | #define INVALID_PAGE (~(hpa_t)0) | |
52 | #define UNMAPPED_GVA (~(gpa_t)0) | |
53 | ||
05da4558 MT |
54 | /* shadow tables are PAE even on non-PAE hosts */ |
55 | #define KVM_HPAGE_SHIFT 21 | |
56 | #define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT) | |
57 | #define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1)) | |
58 | ||
59 | #define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE) | |
60 | ||
cd6e8f87 | 61 | #define DE_VECTOR 0 |
19bd8afd | 62 | #define DB_VECTOR 1 |
77ab6db0 JK |
63 | #define BP_VECTOR 3 |
64 | #define OF_VECTOR 4 | |
65 | #define BR_VECTOR 5 | |
cd6e8f87 ZX |
66 | #define UD_VECTOR 6 |
67 | #define NM_VECTOR 7 | |
68 | #define DF_VECTOR 8 | |
69 | #define TS_VECTOR 10 | |
70 | #define NP_VECTOR 11 | |
71 | #define SS_VECTOR 12 | |
72 | #define GP_VECTOR 13 | |
73 | #define PF_VECTOR 14 | |
77ab6db0 | 74 | #define MF_VECTOR 16 |
53371b50 | 75 | #define MC_VECTOR 18 |
cd6e8f87 ZX |
76 | |
77 | #define SELECTOR_TI_MASK (1 << 2) | |
78 | #define SELECTOR_RPL_MASK 0x03 | |
79 | ||
80 | #define IOPL_SHIFT 12 | |
81 | ||
d69fb81f ZX |
82 | #define KVM_ALIAS_SLOTS 4 |
83 | ||
d657a98e ZX |
84 | #define KVM_PERMILLE_MMU_PAGES 20 |
85 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
1ae0a13d DE |
86 | #define KVM_MMU_HASH_SHIFT 10 |
87 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
d657a98e ZX |
88 | #define KVM_MIN_FREE_MMU_PAGES 5 |
89 | #define KVM_REFILL_PAGES 25 | |
90 | #define KVM_MAX_CPUID_ENTRIES 40 | |
0bed3b56 | 91 | #define KVM_NR_FIXED_MTRR_REGION 88 |
9ba075a6 | 92 | #define KVM_NR_VAR_MTRR 8 |
d657a98e | 93 | |
e9b11c17 ZX |
94 | extern spinlock_t kvm_lock; |
95 | extern struct list_head vm_list; | |
96 | ||
d657a98e ZX |
97 | struct kvm_vcpu; |
98 | struct kvm; | |
99 | ||
5fdbf976 | 100 | enum kvm_reg { |
2b3ccfa0 ZX |
101 | VCPU_REGS_RAX = 0, |
102 | VCPU_REGS_RCX = 1, | |
103 | VCPU_REGS_RDX = 2, | |
104 | VCPU_REGS_RBX = 3, | |
105 | VCPU_REGS_RSP = 4, | |
106 | VCPU_REGS_RBP = 5, | |
107 | VCPU_REGS_RSI = 6, | |
108 | VCPU_REGS_RDI = 7, | |
109 | #ifdef CONFIG_X86_64 | |
110 | VCPU_REGS_R8 = 8, | |
111 | VCPU_REGS_R9 = 9, | |
112 | VCPU_REGS_R10 = 10, | |
113 | VCPU_REGS_R11 = 11, | |
114 | VCPU_REGS_R12 = 12, | |
115 | VCPU_REGS_R13 = 13, | |
116 | VCPU_REGS_R14 = 14, | |
117 | VCPU_REGS_R15 = 15, | |
118 | #endif | |
5fdbf976 | 119 | VCPU_REGS_RIP, |
2b3ccfa0 ZX |
120 | NR_VCPU_REGS |
121 | }; | |
122 | ||
123 | enum { | |
81609e3e | 124 | VCPU_SREG_ES, |
2b3ccfa0 | 125 | VCPU_SREG_CS, |
81609e3e | 126 | VCPU_SREG_SS, |
2b3ccfa0 | 127 | VCPU_SREG_DS, |
2b3ccfa0 ZX |
128 | VCPU_SREG_FS, |
129 | VCPU_SREG_GS, | |
2b3ccfa0 ZX |
130 | VCPU_SREG_TR, |
131 | VCPU_SREG_LDTR, | |
132 | }; | |
133 | ||
edf88417 | 134 | #include <asm/kvm_x86_emulate.h> |
2b3ccfa0 | 135 | |
d657a98e ZX |
136 | #define KVM_NR_MEM_OBJS 40 |
137 | ||
42dbaa5a JK |
138 | #define KVM_NR_DB_REGS 4 |
139 | ||
140 | #define DR6_BD (1 << 13) | |
141 | #define DR6_BS (1 << 14) | |
142 | #define DR6_FIXED_1 0xffff0ff0 | |
143 | #define DR6_VOLATILE 0x0000e00f | |
144 | ||
145 | #define DR7_BP_EN_MASK 0x000000ff | |
146 | #define DR7_GE (1 << 9) | |
147 | #define DR7_GD (1 << 13) | |
148 | #define DR7_FIXED_1 0x00000400 | |
149 | #define DR7_VOLATILE 0xffff23ff | |
150 | ||
d657a98e ZX |
151 | /* |
152 | * We don't want allocation failures within the mmu code, so we preallocate | |
153 | * enough memory for a single page fault in a cache. | |
154 | */ | |
155 | struct kvm_mmu_memory_cache { | |
156 | int nobjs; | |
157 | void *objects[KVM_NR_MEM_OBJS]; | |
158 | }; | |
159 | ||
160 | #define NR_PTE_CHAIN_ENTRIES 5 | |
161 | ||
162 | struct kvm_pte_chain { | |
163 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
164 | struct hlist_node link; | |
165 | }; | |
166 | ||
167 | /* | |
168 | * kvm_mmu_page_role, below, is defined as: | |
169 | * | |
170 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
171 | * bits 4:7 - page table level for this shadow (1-4) | |
172 | * bits 8:9 - page table quadrant for 2-level guests | |
f6e2c02b AK |
173 | * bit 16 - direct mapping of virtual to physical mapping at gfn |
174 | * used for real mode and two-dimensional paging | |
d657a98e ZX |
175 | * bits 17:19 - common access permissions for all ptes in this shadow page |
176 | */ | |
177 | union kvm_mmu_page_role { | |
178 | unsigned word; | |
179 | struct { | |
7d76b4d3 JP |
180 | unsigned glevels:4; |
181 | unsigned level:4; | |
182 | unsigned quadrant:2; | |
183 | unsigned pad_for_nice_hex_output:6; | |
f6e2c02b | 184 | unsigned direct:1; |
7d76b4d3 | 185 | unsigned access:3; |
2e53d63a | 186 | unsigned invalid:1; |
2f0b3d60 | 187 | unsigned cr4_pge:1; |
9645bb56 | 188 | unsigned nxe:1; |
d657a98e ZX |
189 | }; |
190 | }; | |
191 | ||
192 | struct kvm_mmu_page { | |
193 | struct list_head link; | |
194 | struct hlist_node hash_link; | |
195 | ||
6cffe8ca MT |
196 | struct list_head oos_link; |
197 | ||
d657a98e ZX |
198 | /* |
199 | * The following two entries are used to key the shadow page in the | |
200 | * hash table. | |
201 | */ | |
202 | gfn_t gfn; | |
203 | union kvm_mmu_page_role role; | |
204 | ||
205 | u64 *spt; | |
206 | /* hold the gfn of each spte inside spt */ | |
207 | gfn_t *gfns; | |
291f26bc SY |
208 | /* |
209 | * One bit set per slot which has memory | |
210 | * in this shadow page. | |
211 | */ | |
212 | DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); | |
d657a98e ZX |
213 | int multimapped; /* More than one parent_pte? */ |
214 | int root_count; /* Currently serving as active root */ | |
4731d4c7 | 215 | bool unsync; |
60c8aec6 | 216 | unsigned int unsync_children; |
d657a98e ZX |
217 | union { |
218 | u64 *parent_pte; /* !multimapped */ | |
219 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
220 | }; | |
0074ff63 | 221 | DECLARE_BITMAP(unsync_child_bitmap, 512); |
d657a98e ZX |
222 | }; |
223 | ||
6ad18fba DH |
224 | struct kvm_pv_mmu_op_buffer { |
225 | void *ptr; | |
226 | unsigned len; | |
227 | unsigned processed; | |
228 | char buf[512] __aligned(sizeof(long)); | |
229 | }; | |
230 | ||
1c08364c AK |
231 | struct kvm_pio_request { |
232 | unsigned long count; | |
233 | int cur_count; | |
234 | gva_t guest_gva; | |
235 | int in; | |
236 | int port; | |
237 | int size; | |
238 | int string; | |
239 | int down; | |
240 | int rep; | |
241 | }; | |
242 | ||
d657a98e ZX |
243 | /* |
244 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
245 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
246 | * mode. | |
247 | */ | |
248 | struct kvm_mmu { | |
249 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
250 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
251 | void (*free)(struct kvm_vcpu *vcpu); | |
252 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
253 | void (*prefetch_page)(struct kvm_vcpu *vcpu, | |
254 | struct kvm_mmu_page *page); | |
e8bc217a MT |
255 | int (*sync_page)(struct kvm_vcpu *vcpu, |
256 | struct kvm_mmu_page *sp); | |
a7052897 | 257 | void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); |
d657a98e ZX |
258 | hpa_t root_hpa; |
259 | int root_level; | |
260 | int shadow_root_level; | |
a770f6f2 | 261 | union kvm_mmu_page_role base_role; |
d657a98e ZX |
262 | |
263 | u64 *pae_root; | |
82725b20 | 264 | u64 rsvd_bits_mask[2][4]; |
d657a98e ZX |
265 | }; |
266 | ||
ad312c7c | 267 | struct kvm_vcpu_arch { |
34c16eec | 268 | u64 host_tsc; |
5fdbf976 MT |
269 | /* |
270 | * rip and regs accesses must go through | |
271 | * kvm_{register,rip}_{read,write} functions. | |
272 | */ | |
273 | unsigned long regs[NR_VCPU_REGS]; | |
274 | u32 regs_avail; | |
275 | u32 regs_dirty; | |
34c16eec ZX |
276 | |
277 | unsigned long cr0; | |
278 | unsigned long cr2; | |
279 | unsigned long cr3; | |
280 | unsigned long cr4; | |
281 | unsigned long cr8; | |
1371d904 | 282 | u32 hflags; |
34c16eec ZX |
283 | u64 pdptrs[4]; /* pae */ |
284 | u64 shadow_efer; | |
285 | u64 apic_base; | |
286 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
e1035715 | 287 | int32_t apic_arb_prio; |
34c16eec ZX |
288 | int mp_state; |
289 | int sipi_vector; | |
290 | u64 ia32_misc_enable_msr; | |
b209749f | 291 | bool tpr_access_reporting; |
34c16eec ZX |
292 | |
293 | struct kvm_mmu mmu; | |
6ad18fba DH |
294 | /* only needed in kvm_pv_mmu_op() path, but it's hot so |
295 | * put it here to avoid allocation */ | |
296 | struct kvm_pv_mmu_op_buffer mmu_op_buffer; | |
34c16eec ZX |
297 | |
298 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
299 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
300 | struct kvm_mmu_memory_cache mmu_page_cache; | |
301 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
302 | ||
303 | gfn_t last_pt_write_gfn; | |
304 | int last_pt_write_count; | |
305 | u64 *last_pte_updated; | |
1b7fcd32 | 306 | gfn_t last_pte_gfn; |
34c16eec | 307 | |
d7824fff | 308 | struct { |
35149e21 AL |
309 | gfn_t gfn; /* presumed gfn during guest pte update */ |
310 | pfn_t pfn; /* pfn corresponding to that gfn */ | |
05da4558 | 311 | int largepage; |
e930bffe | 312 | unsigned long mmu_seq; |
d7824fff AK |
313 | } update_pte; |
314 | ||
34c16eec ZX |
315 | struct i387_fxsave_struct host_fx_image; |
316 | struct i387_fxsave_struct guest_fx_image; | |
317 | ||
318 | gva_t mmio_fault_cr2; | |
319 | struct kvm_pio_request pio; | |
320 | void *pio_data; | |
321 | ||
66fd3f7f GN |
322 | u8 event_exit_inst_len; |
323 | ||
298101da AK |
324 | struct kvm_queued_exception { |
325 | bool pending; | |
326 | bool has_error_code; | |
327 | u8 nr; | |
328 | u32 error_code; | |
329 | } exception; | |
330 | ||
937a7eae AK |
331 | struct kvm_queued_interrupt { |
332 | bool pending; | |
66fd3f7f | 333 | bool soft; |
937a7eae AK |
334 | u8 nr; |
335 | } interrupt; | |
336 | ||
34c16eec | 337 | struct { |
56b237e3 | 338 | int vm86_active; |
34c16eec ZX |
339 | u8 save_iopl; |
340 | struct kvm_save_segment { | |
341 | u16 selector; | |
342 | unsigned long base; | |
343 | u32 limit; | |
344 | u32 ar; | |
345 | } tr, es, ds, fs, gs; | |
346 | } rmode; | |
347 | int halt_request; /* real mode on Intel only */ | |
348 | ||
349 | int cpuid_nent; | |
07716717 | 350 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
351 | /* emulate context */ |
352 | ||
353 | struct x86_emulate_ctxt emulate_ctxt; | |
18068523 GOC |
354 | |
355 | gpa_t time; | |
50d0a0f9 GH |
356 | struct pvclock_vcpu_time_info hv_clock; |
357 | unsigned int hv_clock_tsc_khz; | |
18068523 GOC |
358 | unsigned int time_offset; |
359 | struct page *time_page; | |
3419ffc8 | 360 | |
44c11430 | 361 | bool singlestep; /* guest is single stepped by KVM */ |
3419ffc8 | 362 | bool nmi_pending; |
668f612f | 363 | bool nmi_injected; |
9ba075a6 | 364 | |
0bed3b56 SY |
365 | struct mtrr_state_type mtrr_state; |
366 | u32 pat; | |
42dbaa5a JK |
367 | |
368 | int switch_db_regs; | |
369 | unsigned long host_db[KVM_NR_DB_REGS]; | |
370 | unsigned long host_dr6; | |
371 | unsigned long host_dr7; | |
372 | unsigned long db[KVM_NR_DB_REGS]; | |
373 | unsigned long dr6; | |
374 | unsigned long dr7; | |
375 | unsigned long eff_db[KVM_NR_DB_REGS]; | |
34c16eec ZX |
376 | }; |
377 | ||
d69fb81f ZX |
378 | struct kvm_mem_alias { |
379 | gfn_t base_gfn; | |
380 | unsigned long npages; | |
381 | gfn_t target_gfn; | |
382 | }; | |
383 | ||
384 | struct kvm_arch{ | |
385 | int naliases; | |
386 | struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS]; | |
f05e70ac ZX |
387 | |
388 | unsigned int n_free_mmu_pages; | |
389 | unsigned int n_requested_mmu_pages; | |
390 | unsigned int n_alloc_mmu_pages; | |
391 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | |
392 | /* | |
393 | * Hash table of struct kvm_mmu_page. | |
394 | */ | |
395 | struct list_head active_mmu_pages; | |
4d5c5d0f | 396 | struct list_head assigned_dev_head; |
19de40a8 | 397 | struct iommu_domain *iommu_domain; |
522c68c4 | 398 | int iommu_flags; |
d7deeeb0 ZX |
399 | struct kvm_pic *vpic; |
400 | struct kvm_ioapic *vioapic; | |
7837699f | 401 | struct kvm_pit *vpit; |
564f1537 | 402 | struct hlist_head irq_ack_notifier_list; |
cc6e462c | 403 | int vapics_in_nmi_mode; |
bfc6d222 | 404 | |
bfc6d222 ZX |
405 | unsigned int tss_addr; |
406 | struct page *apic_access_page; | |
18068523 GOC |
407 | |
408 | gpa_t wall_clock; | |
b7ebfb05 SY |
409 | |
410 | struct page *ept_identity_pagetable; | |
411 | bool ept_identity_pagetable_done; | |
5550af4d SY |
412 | |
413 | unsigned long irq_sources_bitmap; | |
414 | unsigned long irq_states[KVM_IOAPIC_NUM_PINS]; | |
53f658b3 | 415 | u64 vm_init_tsc; |
d69fb81f ZX |
416 | }; |
417 | ||
0711456c ZX |
418 | struct kvm_vm_stat { |
419 | u32 mmu_shadow_zapped; | |
420 | u32 mmu_pte_write; | |
421 | u32 mmu_pte_updated; | |
422 | u32 mmu_pde_zapped; | |
423 | u32 mmu_flooded; | |
424 | u32 mmu_recycled; | |
dfc5aa00 | 425 | u32 mmu_cache_miss; |
4731d4c7 | 426 | u32 mmu_unsync; |
0711456c | 427 | u32 remote_tlb_flush; |
05da4558 | 428 | u32 lpages; |
0711456c ZX |
429 | }; |
430 | ||
77b4c255 ZX |
431 | struct kvm_vcpu_stat { |
432 | u32 pf_fixed; | |
433 | u32 pf_guest; | |
434 | u32 tlb_flush; | |
435 | u32 invlpg; | |
436 | ||
437 | u32 exits; | |
438 | u32 io_exits; | |
439 | u32 mmio_exits; | |
440 | u32 signal_exits; | |
441 | u32 irq_window_exits; | |
f08864b4 | 442 | u32 nmi_window_exits; |
77b4c255 ZX |
443 | u32 halt_exits; |
444 | u32 halt_wakeup; | |
445 | u32 request_irq_exits; | |
446 | u32 irq_exits; | |
447 | u32 host_state_reload; | |
448 | u32 efer_reload; | |
449 | u32 fpu_reload; | |
450 | u32 insn_emulation; | |
451 | u32 insn_emulation_fail; | |
f11c3a8d | 452 | u32 hypercalls; |
fa89a817 | 453 | u32 irq_injections; |
c4abb7c9 | 454 | u32 nmi_injections; |
77b4c255 | 455 | }; |
ad312c7c | 456 | |
e01a1b57 HB |
457 | struct descriptor_table { |
458 | u16 limit; | |
459 | unsigned long base; | |
460 | } __attribute__((packed)); | |
461 | ||
ea4a5ff8 ZX |
462 | struct kvm_x86_ops { |
463 | int (*cpu_has_kvm_support)(void); /* __init */ | |
464 | int (*disabled_by_bios)(void); /* __init */ | |
465 | void (*hardware_enable)(void *dummy); /* __init */ | |
466 | void (*hardware_disable)(void *dummy); | |
467 | void (*check_processor_compatibility)(void *rtn); | |
468 | int (*hardware_setup)(void); /* __init */ | |
469 | void (*hardware_unsetup)(void); /* __exit */ | |
774ead3a | 470 | bool (*cpu_has_accelerated_tpr)(void); |
ea4a5ff8 ZX |
471 | |
472 | /* Create, but do not attach this VCPU */ | |
473 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
474 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
475 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
476 | ||
477 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
478 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
479 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
480 | |
481 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
d0bfb940 | 482 | struct kvm_guest_debug *dbg); |
ea4a5ff8 ZX |
483 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); |
484 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
485 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
486 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
487 | struct kvm_segment *var, int seg); | |
2e4d2653 | 488 | int (*get_cpl)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
489 | void (*set_segment)(struct kvm_vcpu *vcpu, |
490 | struct kvm_segment *var, int seg); | |
491 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
492 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | |
493 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
494 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
495 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
496 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
497 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
498 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
499 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
500 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
501 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
502 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
503 | int *exception); | |
5fdbf976 | 504 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); |
ea4a5ff8 ZX |
505 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); |
506 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
507 | ||
508 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 509 | |
ea4a5ff8 ZX |
510 | void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); |
511 | int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); | |
512 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
2809f5d2 GC |
513 | void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); |
514 | u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); | |
ea4a5ff8 ZX |
515 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, |
516 | unsigned char *hypercall_addr); | |
66fd3f7f | 517 | void (*set_irq)(struct kvm_vcpu *vcpu); |
95ba8273 | 518 | void (*set_nmi)(struct kvm_vcpu *vcpu); |
298101da AK |
519 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
520 | bool has_error_code, u32 error_code); | |
78646121 | 521 | int (*interrupt_allowed)(struct kvm_vcpu *vcpu); |
95ba8273 GN |
522 | int (*nmi_allowed)(struct kvm_vcpu *vcpu); |
523 | void (*enable_nmi_window)(struct kvm_vcpu *vcpu); | |
524 | void (*enable_irq_window)(struct kvm_vcpu *vcpu); | |
525 | void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); | |
ea4a5ff8 | 526 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); |
67253af5 | 527 | int (*get_tdp_level)(void); |
4b12f0de | 528 | u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); |
ea4a5ff8 ZX |
529 | }; |
530 | ||
97896d04 ZX |
531 | extern struct kvm_x86_ops *kvm_x86_ops; |
532 | ||
54f1585a ZX |
533 | int kvm_mmu_module_init(void); |
534 | void kvm_mmu_module_exit(void); | |
535 | ||
536 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
537 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
538 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
539 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
7b52345e SY |
540 | void kvm_mmu_set_base_ptes(u64 base_pte); |
541 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
4b12f0de | 542 | u64 dirty_mask, u64 nx_mask, u64 x_mask); |
54f1585a ZX |
543 | |
544 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
545 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
546 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 547 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
548 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
549 | ||
cc4b6871 JR |
550 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
551 | ||
3200f405 | 552 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, |
9f811285 | 553 | const void *val, int bytes); |
2f333bcb MT |
554 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, |
555 | gpa_t addr, unsigned long *ret); | |
4b12f0de | 556 | u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); |
2f333bcb MT |
557 | |
558 | extern bool tdp_enabled; | |
9f811285 | 559 | |
54f1585a ZX |
560 | enum emulation_result { |
561 | EMULATE_DONE, /* no further processing */ | |
562 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
563 | EMULATE_FAIL, /* can't emulate this instruction */ | |
564 | }; | |
565 | ||
571008da SY |
566 | #define EMULTYPE_NO_DECODE (1 << 0) |
567 | #define EMULTYPE_TRAP_UD (1 << 1) | |
ba8afb6b | 568 | #define EMULTYPE_SKIP (1 << 2) |
54f1585a | 569 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, |
571008da | 570 | unsigned long cr2, u16 error_code, int emulation_type); |
54f1585a ZX |
571 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); |
572 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
573 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
574 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
575 | unsigned long *rflags); | |
576 | ||
577 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
578 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
579 | unsigned long *rflags); | |
f2b4b7dd | 580 | void kvm_enable_efer_bits(u64); |
54f1585a ZX |
581 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
582 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
583 | ||
584 | struct x86_emulate_ctxt; | |
585 | ||
586 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
587 | int size, unsigned port); | |
588 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
589 | int size, unsigned long count, int down, | |
590 | gva_t address, int rep, unsigned port); | |
591 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | |
592 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
593 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
594 | int emulate_clts(struct kvm_vcpu *vcpu); | |
595 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
596 | unsigned long *dest); | |
597 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
598 | unsigned long value); | |
599 | ||
3e6e0aab GT |
600 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); |
601 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, | |
602 | int type_bits, int seg); | |
603 | ||
37817f29 IE |
604 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); |
605 | ||
2d3ad1f4 | 606 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
9c20456a JR |
607 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
608 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); | |
609 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); | |
2d3ad1f4 AK |
610 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
611 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
54f1585a ZX |
612 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
613 | ||
614 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
615 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
616 | ||
298101da AK |
617 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
618 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
c3c91fee AK |
619 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
620 | u32 error_code); | |
298101da | 621 | |
4925663a | 622 | int kvm_pic_set_irq(void *opaque, int irq, int level); |
3de42dc0 | 623 | |
3419ffc8 SY |
624 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); |
625 | ||
54f1585a ZX |
626 | void fx_init(struct kvm_vcpu *vcpu); |
627 | ||
54f1585a ZX |
628 | int emulator_write_emulated(unsigned long addr, |
629 | const void *val, | |
630 | unsigned int bytes, | |
631 | struct kvm_vcpu *vcpu); | |
632 | ||
633 | unsigned long segment_base(u16 selector); | |
634 | ||
d835dfec | 635 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a | 636 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
ad218f85 MT |
637 | const u8 *new, int bytes, |
638 | bool guest_initiated); | |
54f1585a ZX |
639 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); |
640 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
641 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
642 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
0ba73cda | 643 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); |
54f1585a ZX |
644 | |
645 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
646 | ||
647 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
648 | ||
3067714c | 649 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
a7052897 | 650 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); |
34c16eec | 651 | |
18552672 | 652 | void kvm_enable_tdp(void); |
5f4cb662 | 653 | void kvm_disable_tdp(void); |
18552672 | 654 | |
a03490ed | 655 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
de7d789a | 656 | int complete_pio(struct kvm_vcpu *vcpu); |
ec6d273d | 657 | |
2843099f IE |
658 | struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn); |
659 | ||
ec6d273d ZX |
660 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) |
661 | { | |
662 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
663 | ||
664 | return (struct kvm_mmu_page *)page_private(page); | |
665 | } | |
666 | ||
d6e88aec | 667 | static inline u16 kvm_read_fs(void) |
ec6d273d ZX |
668 | { |
669 | u16 seg; | |
670 | asm("mov %%fs, %0" : "=g"(seg)); | |
671 | return seg; | |
672 | } | |
673 | ||
d6e88aec | 674 | static inline u16 kvm_read_gs(void) |
ec6d273d ZX |
675 | { |
676 | u16 seg; | |
677 | asm("mov %%gs, %0" : "=g"(seg)); | |
678 | return seg; | |
679 | } | |
680 | ||
d6e88aec | 681 | static inline u16 kvm_read_ldt(void) |
ec6d273d ZX |
682 | { |
683 | u16 ldt; | |
684 | asm("sldt %0" : "=g"(ldt)); | |
685 | return ldt; | |
686 | } | |
687 | ||
d6e88aec | 688 | static inline void kvm_load_fs(u16 sel) |
ec6d273d ZX |
689 | { |
690 | asm("mov %0, %%fs" : : "rm"(sel)); | |
691 | } | |
692 | ||
d6e88aec | 693 | static inline void kvm_load_gs(u16 sel) |
ec6d273d ZX |
694 | { |
695 | asm("mov %0, %%gs" : : "rm"(sel)); | |
696 | } | |
697 | ||
d6e88aec | 698 | static inline void kvm_load_ldt(u16 sel) |
ec6d273d ZX |
699 | { |
700 | asm("lldt %0" : : "rm"(sel)); | |
701 | } | |
ec6d273d | 702 | |
d6e88aec | 703 | static inline void kvm_get_idt(struct descriptor_table *table) |
ec6d273d ZX |
704 | { |
705 | asm("sidt %0" : "=m"(*table)); | |
706 | } | |
707 | ||
d6e88aec | 708 | static inline void kvm_get_gdt(struct descriptor_table *table) |
ec6d273d ZX |
709 | { |
710 | asm("sgdt %0" : "=m"(*table)); | |
711 | } | |
712 | ||
d6e88aec | 713 | static inline unsigned long kvm_read_tr_base(void) |
ec6d273d ZX |
714 | { |
715 | u16 tr; | |
716 | asm("str %0" : "=g"(tr)); | |
717 | return segment_base(tr); | |
718 | } | |
719 | ||
720 | #ifdef CONFIG_X86_64 | |
721 | static inline unsigned long read_msr(unsigned long msr) | |
722 | { | |
723 | u64 value; | |
724 | ||
725 | rdmsrl(msr, value); | |
726 | return value; | |
727 | } | |
728 | #endif | |
729 | ||
d6e88aec | 730 | static inline void kvm_fx_save(struct i387_fxsave_struct *image) |
ec6d273d ZX |
731 | { |
732 | asm("fxsave (%0)":: "r" (image)); | |
733 | } | |
734 | ||
d6e88aec | 735 | static inline void kvm_fx_restore(struct i387_fxsave_struct *image) |
ec6d273d ZX |
736 | { |
737 | asm("fxrstor (%0)":: "r" (image)); | |
738 | } | |
739 | ||
d6e88aec | 740 | static inline void kvm_fx_finit(void) |
ec6d273d ZX |
741 | { |
742 | asm("finit"); | |
743 | } | |
744 | ||
745 | static inline u32 get_rdx_init_val(void) | |
746 | { | |
747 | return 0x600; /* P6 family */ | |
748 | } | |
749 | ||
c1a5d4f9 AK |
750 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
751 | { | |
752 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
753 | } | |
754 | ||
ec6d273d ZX |
755 | #define TSS_IOPB_BASE_OFFSET 0x66 |
756 | #define TSS_BASE_SIZE 0x68 | |
757 | #define TSS_IOPB_SIZE (65536 / 8) | |
758 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
7d76b4d3 JP |
759 | #define RMODE_TSS_SIZE \ |
760 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 761 | |
37817f29 IE |
762 | enum { |
763 | TASK_SWITCH_CALL = 0, | |
764 | TASK_SWITCH_IRET = 1, | |
765 | TASK_SWITCH_JMP = 2, | |
766 | TASK_SWITCH_GATE = 3, | |
767 | }; | |
768 | ||
1371d904 | 769 | #define HF_GIF_MASK (1 << 0) |
3d6368ef AG |
770 | #define HF_HIF_MASK (1 << 1) |
771 | #define HF_VINTR_MASK (1 << 2) | |
95ba8273 | 772 | #define HF_NMI_MASK (1 << 3) |
44c11430 | 773 | #define HF_IRET_MASK (1 << 4) |
1371d904 | 774 | |
4ecac3fd AK |
775 | /* |
776 | * Hardware virtualization extension instructions may fault if a | |
777 | * reboot turns off virtualization while processes are running. | |
778 | * Trap the fault and ignore the instruction if that happens. | |
779 | */ | |
780 | asmlinkage void kvm_handle_fault_on_reboot(void); | |
781 | ||
782 | #define __kvm_handle_fault_on_reboot(insn) \ | |
783 | "666: " insn "\n\t" \ | |
18b13e54 | 784 | ".pushsection .fixup, \"ax\" \n" \ |
4ecac3fd | 785 | "667: \n\t" \ |
8ceed347 | 786 | __ASM_SIZE(push) " $666b \n\t" \ |
4ecac3fd AK |
787 | "jmp kvm_handle_fault_on_reboot \n\t" \ |
788 | ".popsection \n\t" \ | |
789 | ".pushsection __ex_table, \"a\" \n\t" \ | |
8ceed347 | 790 | _ASM_PTR " 666b, 667b \n\t" \ |
4ecac3fd AK |
791 | ".popsection" |
792 | ||
e930bffe AA |
793 | #define KVM_ARCH_WANT_MMU_NOTIFIER |
794 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
795 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | |
82725b20 | 796 | int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); |
e930bffe | 797 | |
1965aae3 | 798 | #endif /* _ASM_X86_KVM_HOST_H */ |