projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1965aae3 PA |
1 | #ifndef _ASM_X86_MICROCODE_H |
| 2 | #define _ASM_X86_MICROCODE_H | |
| d45de409 | 3 | |
| e1b43e3f BP |
4 | #define native_rdmsr(msr, val1, val2) \ |
| 5 | do { \ | |
| 6 | u64 __val = native_read_msr((msr)); \ | |
| 7 | (void)((val1) = (u32)__val); \ | |
| 8 | (void)((val2) = (u32)(__val >> 32)); \ | |
| 9 | } while (0) | |
| 10 | ||
| 11 | #define native_wrmsr(msr, low, high) \ | |
| 12 | native_write_msr(msr, low, high) | |
| 13 | ||
| 14 | #define native_wrmsrl(msr, val) \ | |
| 15 | native_write_msr((msr), \ | |
| 16 | (u32)((u64)(val)), \ | |
| 17 | (u32)((u64)(val) >> 32)) | |
| 18 | ||
| 18dbc916 DA |
19 | struct cpu_signature { |
| 20 | unsigned int sig; | |
| 21 | unsigned int pf; | |
| 22 | unsigned int rev; | |
| 23 | }; | |
| 8d86f390 | 24 | |
| a0a29b62 | 25 | struct device; |
| d45de409 | 26 | |
| 871b72dd | 27 | enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND }; |
| 65cef131 | 28 | extern bool dis_ucode_ldr; |
| 871b72dd | 29 | |
| 26bf7a48 | 30 | struct microcode_ops { |
| 871b72dd DA |
31 | enum ucode_state (*request_microcode_user) (int cpu, |
| 32 | const void __user *buf, size_t size); | |
| a0a29b62 | 33 | |
| 48e30685 BP |
34 | enum ucode_state (*request_microcode_fw) (int cpu, struct device *, |
| 35 | bool refresh_fw); | |
| a0a29b62 | 36 | |
| a0a29b62 | 37 | void (*microcode_fini_cpu) (int cpu); |
| 871b72dd DA |
38 | |
| 39 | /* | |
| 40 | * The generic 'microcode_core' part guarantees that | |
| 41 | * the callbacks below run on a target cpu when they | |
| 42 | * are being called. | |
| 43 | * See also the "Synchronization" section in microcode_core.c. | |
| 44 | */ | |
| 45 | int (*apply_microcode) (int cpu); | |
| 46 | int (*collect_cpu_info) (int cpu, struct cpu_signature *csig); | |
| 26bf7a48 PO |
47 | }; |
| 48 | ||
| d45de409 | 49 | struct ucode_cpu_info { |
| 871b72dd DA |
50 | struct cpu_signature cpu_sig; |
| 51 | int valid; | |
| 52 | void *mc; | |
| c3b71bce | 53 | }; |
| d45de409 DA |
54 | extern struct ucode_cpu_info ucode_cpu_info[]; |
| 55 | ||
| 18dbc916 DA |
56 | #ifdef CONFIG_MICROCODE_INTEL |
| 57 | extern struct microcode_ops * __init init_intel_microcode(void); | |
| 58 | #else | |
| 59 | static inline struct microcode_ops * __init init_intel_microcode(void) | |
| 60 | { | |
| 61 | return NULL; | |
| 62 | } | |
| 63 | #endif /* CONFIG_MICROCODE_INTEL */ | |
| 64 | ||
| 65 | #ifdef CONFIG_MICROCODE_AMD | |
| 66 | extern struct microcode_ops * __init init_amd_microcode(void); | |
| f72c1a57 | 67 | extern void __exit exit_amd_microcode(void); |
| 18dbc916 DA |
68 | #else |
| 69 | static inline struct microcode_ops * __init init_amd_microcode(void) | |
| 70 | { | |
| 71 | return NULL; | |
| 72 | } | |
| f72c1a57 | 73 | static inline void __exit exit_amd_microcode(void) {} |
| 18dbc916 DA |
74 | #endif |
| 75 | ||
| a8ebf6d1 FY |
76 | #ifdef CONFIG_MICROCODE_EARLY |
| 77 | #define MAX_UCODE_COUNT 128 | |
| 78 | extern void __init load_ucode_bsp(void); | |
| 148f9bb8 | 79 | extern void load_ucode_ap(void); |
| a8ebf6d1 FY |
80 | extern int __init save_microcode_in_initrd(void); |
| 81 | #else | |
| 82 | static inline void __init load_ucode_bsp(void) {} | |
| 148f9bb8 | 83 | static inline void load_ucode_ap(void) {} |
| a8ebf6d1 FY |
84 | static inline int __init save_microcode_in_initrd(void) |
| 85 | { | |
| 86 | return 0; | |
| 87 | } | |
| 88 | #endif | |
| 89 | ||
| 1965aae3 | 90 | #endif /* _ASM_X86_MICROCODE_H */ |