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1965aae3 PA |
1 | #ifndef _ASM_X86_MICROCODE_H |
2 | #define _ASM_X86_MICROCODE_H | |
d45de409 | 3 | |
99f925ce | 4 | #include <asm/cpu.h> |
760d765b | 5 | #include <linux/earlycpio.h> |
5f9c01aa | 6 | #include <linux/initrd.h> |
760d765b | 7 | |
e1b43e3f BP |
8 | #define native_rdmsr(msr, val1, val2) \ |
9 | do { \ | |
10 | u64 __val = native_read_msr((msr)); \ | |
11 | (void)((val1) = (u32)__val); \ | |
12 | (void)((val2) = (u32)(__val >> 32)); \ | |
13 | } while (0) | |
14 | ||
15 | #define native_wrmsr(msr, low, high) \ | |
16 | native_write_msr(msr, low, high) | |
17 | ||
18 | #define native_wrmsrl(msr, val) \ | |
19 | native_write_msr((msr), \ | |
20 | (u32)((u64)(val)), \ | |
21 | (u32)((u64)(val) >> 32)) | |
22 | ||
18dbc916 DA |
23 | struct cpu_signature { |
24 | unsigned int sig; | |
25 | unsigned int pf; | |
26 | unsigned int rev; | |
27 | }; | |
8d86f390 | 28 | |
a0a29b62 | 29 | struct device; |
d45de409 | 30 | |
871b72dd DA |
31 | enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND }; |
32 | ||
26bf7a48 | 33 | struct microcode_ops { |
871b72dd DA |
34 | enum ucode_state (*request_microcode_user) (int cpu, |
35 | const void __user *buf, size_t size); | |
a0a29b62 | 36 | |
48e30685 BP |
37 | enum ucode_state (*request_microcode_fw) (int cpu, struct device *, |
38 | bool refresh_fw); | |
a0a29b62 | 39 | |
a0a29b62 | 40 | void (*microcode_fini_cpu) (int cpu); |
871b72dd DA |
41 | |
42 | /* | |
43 | * The generic 'microcode_core' part guarantees that | |
44 | * the callbacks below run on a target cpu when they | |
45 | * are being called. | |
46 | * See also the "Synchronization" section in microcode_core.c. | |
47 | */ | |
48 | int (*apply_microcode) (int cpu); | |
49 | int (*collect_cpu_info) (int cpu, struct cpu_signature *csig); | |
26bf7a48 PO |
50 | }; |
51 | ||
d45de409 | 52 | struct ucode_cpu_info { |
871b72dd DA |
53 | struct cpu_signature cpu_sig; |
54 | int valid; | |
55 | void *mc; | |
c3b71bce | 56 | }; |
d45de409 DA |
57 | extern struct ucode_cpu_info ucode_cpu_info[]; |
58 | ||
9a2bc335 BP |
59 | #ifdef CONFIG_MICROCODE |
60 | int __init microcode_init(void); | |
61 | #else | |
62 | static inline int __init microcode_init(void) { return 0; }; | |
63 | #endif | |
64 | ||
18dbc916 DA |
65 | #ifdef CONFIG_MICROCODE_INTEL |
66 | extern struct microcode_ops * __init init_intel_microcode(void); | |
67 | #else | |
68 | static inline struct microcode_ops * __init init_intel_microcode(void) | |
69 | { | |
70 | return NULL; | |
71 | } | |
72 | #endif /* CONFIG_MICROCODE_INTEL */ | |
73 | ||
74 | #ifdef CONFIG_MICROCODE_AMD | |
75 | extern struct microcode_ops * __init init_amd_microcode(void); | |
f72c1a57 | 76 | extern void __exit exit_amd_microcode(void); |
18dbc916 DA |
77 | #else |
78 | static inline struct microcode_ops * __init init_amd_microcode(void) | |
79 | { | |
80 | return NULL; | |
81 | } | |
f72c1a57 | 82 | static inline void __exit exit_amd_microcode(void) {} |
18dbc916 DA |
83 | #endif |
84 | ||
a8ebf6d1 | 85 | #define MAX_UCODE_COUNT 128 |
58ce8d6d BP |
86 | |
87 | #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24)) | |
88 | #define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u') | |
89 | #define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I') | |
90 | #define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l') | |
91 | #define CPUID_AMD1 QCHAR('A', 'u', 't', 'h') | |
92 | #define CPUID_AMD2 QCHAR('e', 'n', 't', 'i') | |
93 | #define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D') | |
94 | ||
95 | #define CPUID_IS(a, b, c, ebx, ecx, edx) \ | |
96 | (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c)))) | |
97 | ||
98 | /* | |
99 | * In early loading microcode phase on BSP, boot_cpu_data is not set up yet. | |
99f925ce | 100 | * x86_cpuid_vendor() gets vendor id for BSP. |
58ce8d6d BP |
101 | * |
102 | * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify | |
99f925ce | 103 | * coding, we still use x86_cpuid_vendor() to get vendor id for AP. |
58ce8d6d | 104 | * |
99f925ce | 105 | * x86_cpuid_vendor() gets vendor information directly from CPUID. |
58ce8d6d | 106 | */ |
99f925ce | 107 | static inline int x86_cpuid_vendor(void) |
58ce8d6d BP |
108 | { |
109 | u32 eax = 0x00000000; | |
110 | u32 ebx, ecx = 0, edx; | |
111 | ||
112 | native_cpuid(&eax, &ebx, &ecx, &edx); | |
113 | ||
114 | if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx)) | |
115 | return X86_VENDOR_INTEL; | |
116 | ||
117 | if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx)) | |
118 | return X86_VENDOR_AMD; | |
119 | ||
120 | return X86_VENDOR_UNKNOWN; | |
121 | } | |
122 | ||
99f925ce | 123 | static inline unsigned int x86_cpuid_family(void) |
58ce8d6d BP |
124 | { |
125 | u32 eax = 0x00000001; | |
126 | u32 ebx, ecx = 0, edx; | |
127 | ||
128 | native_cpuid(&eax, &ebx, &ecx, &edx); | |
129 | ||
99f925ce | 130 | return x86_family(eax); |
58ce8d6d BP |
131 | } |
132 | ||
fe055896 | 133 | #ifdef CONFIG_MICROCODE |
a8ebf6d1 | 134 | extern void __init load_ucode_bsp(void); |
148f9bb8 | 135 | extern void load_ucode_ap(void); |
a8ebf6d1 | 136 | extern int __init save_microcode_in_initrd(void); |
fbae4ba8 | 137 | void reload_early_microcode(void); |
760d765b | 138 | extern bool get_builtin_firmware(struct cpio_data *cd, const char *name); |
a8ebf6d1 | 139 | #else |
fe055896 BP |
140 | static inline void __init load_ucode_bsp(void) { } |
141 | static inline void load_ucode_ap(void) { } | |
142 | static inline int __init save_microcode_in_initrd(void) { return 0; } | |
143 | static inline void reload_early_microcode(void) { } | |
144 | static inline bool | |
145 | get_builtin_firmware(struct cpio_data *cd, const char *name) { return false; } | |
a8ebf6d1 | 146 | #endif |
5f9c01aa BP |
147 | |
148 | static inline unsigned long get_initrd_start(void) | |
149 | { | |
150 | #ifdef CONFIG_BLK_DEV_INITRD | |
151 | return initrd_start; | |
152 | #else | |
153 | return 0; | |
154 | #endif | |
155 | } | |
156 | ||
157 | static inline unsigned long get_initrd_start_addr(void) | |
158 | { | |
159 | #ifdef CONFIG_BLK_DEV_INITRD | |
160 | #ifdef CONFIG_X86_32 | |
161 | unsigned long *initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start); | |
162 | ||
163 | return (unsigned long)__pa_nodebug(*initrd_start_p); | |
164 | #else | |
165 | return get_initrd_start(); | |
166 | #endif | |
167 | #else /* CONFIG_BLK_DEV_INITRD */ | |
168 | return 0; | |
169 | #endif | |
170 | } | |
171 | ||
1965aae3 | 172 | #endif /* _ASM_X86_MICROCODE_H */ |