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1 | #ifndef _ASM_X86_MSIDEF_H |
2 | #define _ASM_X86_MSIDEF_H | |
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3 | |
4 | /* | |
5 | * Constants for Intel APIC based MSI messages. | |
6 | */ | |
7 | ||
8 | /* | |
9 | * Shifts for MSI data | |
10 | */ | |
11 | ||
12 | #define MSI_DATA_VECTOR_SHIFT 0 | |
13 | #define MSI_DATA_VECTOR_MASK 0x000000ff | |
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14 | #define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \ |
15 | MSI_DATA_VECTOR_MASK) | |
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16 | |
17 | #define MSI_DATA_DELIVERY_MODE_SHIFT 8 | |
18 | #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) | |
19 | #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT) | |
20 | ||
21 | #define MSI_DATA_LEVEL_SHIFT 14 | |
22 | #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) | |
23 | #define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT) | |
24 | ||
25 | #define MSI_DATA_TRIGGER_SHIFT 15 | |
26 | #define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT) | |
27 | #define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT) | |
28 | ||
29 | /* | |
30 | * Shift/mask fields for msi address | |
31 | */ | |
32 | ||
33 | #define MSI_ADDR_BASE_HI 0 | |
34 | #define MSI_ADDR_BASE_LO 0xfee00000 | |
35 | ||
36 | #define MSI_ADDR_DEST_MODE_SHIFT 2 | |
37 | #define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT) | |
38 | #define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT) | |
39 | ||
40 | #define MSI_ADDR_REDIRECTION_SHIFT 3 | |
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41 | #define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) |
42 | /* dedicated cpu */ | |
43 | #define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) | |
44 | /* lowest priority */ | |
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45 | |
46 | #define MSI_ADDR_DEST_ID_SHIFT 12 | |
47 | #define MSI_ADDR_DEST_ID_MASK 0x00ffff0 | |
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48 | #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \ |
49 | MSI_ADDR_DEST_ID_MASK) | |
9d783ba0 | 50 | #define MSI_ADDR_EXT_DEST_ID(dest) ((dest) & 0xffffff00) |
2d3fcc1c | 51 | |
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52 | #define MSI_ADDR_IR_EXT_INT (1 << 4) |
53 | #define MSI_ADDR_IR_SHV (1 << 3) | |
54 | #define MSI_ADDR_IR_INDEX1(index) ((index & 0x8000) >> 13) | |
55 | #define MSI_ADDR_IR_INDEX2(index) ((index & 0x7fff) << 5) | |
1965aae3 | 56 | #endif /* _ASM_X86_MSIDEF_H */ |