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1965aae3 PA |
1 | #ifndef _ASM_X86_PGTABLE_H |
2 | #define _ASM_X86_PGTABLE_H | |
6c386655 | 3 | |
c47c1b1f | 4 | #include <asm/page.h> |
1adcaafe | 5 | #include <asm/e820.h> |
c47c1b1f | 6 | |
8d19c99f | 7 | #include <asm/pgtable_types.h> |
b2bc2731 | 8 | |
8a7b12f7 | 9 | /* |
10 | * Macro to mark a page protection value as UC- | |
11 | */ | |
12 | #define pgprot_noncached(prot) \ | |
13 | ((boot_cpu_data.x86 > 3) \ | |
14 | ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \ | |
15 | : (prot)) | |
16 | ||
4614139c | 17 | #ifndef __ASSEMBLY__ |
195466dc | 18 | |
55a6ca25 PA |
19 | #include <asm/x86_init.h> |
20 | ||
8405b122 JF |
21 | /* |
22 | * ZERO_PAGE is a global shared page that is always zero: used | |
23 | * for zero-mapped memory areas etc.. | |
24 | */ | |
3cbaeafe | 25 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; |
8405b122 JF |
26 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
27 | ||
e3ed910d JF |
28 | extern spinlock_t pgd_lock; |
29 | extern struct list_head pgd_list; | |
8405b122 | 30 | |
617d34d9 JF |
31 | extern struct mm_struct *pgd_page_get_mm(struct page *page); |
32 | ||
54321d94 JF |
33 | #ifdef CONFIG_PARAVIRT |
34 | #include <asm/paravirt.h> | |
35 | #else /* !CONFIG_PARAVIRT */ | |
36 | #define set_pte(ptep, pte) native_set_pte(ptep, pte) | |
37 | #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) | |
2609ae6d | 38 | #define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd) |
54321d94 | 39 | |
54321d94 JF |
40 | #define set_pte_atomic(ptep, pte) \ |
41 | native_set_pte_atomic(ptep, pte) | |
42 | ||
43 | #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) | |
44 | ||
45 | #ifndef __PAGETABLE_PUD_FOLDED | |
46 | #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) | |
47 | #define pgd_clear(pgd) native_pgd_clear(pgd) | |
48 | #endif | |
49 | ||
50 | #ifndef set_pud | |
51 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) | |
52 | #endif | |
53 | ||
54 | #ifndef __PAGETABLE_PMD_FOLDED | |
55 | #define pud_clear(pud) native_pud_clear(pud) | |
56 | #endif | |
57 | ||
58 | #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) | |
59 | #define pmd_clear(pmd) native_pmd_clear(pmd) | |
60 | ||
61 | #define pte_update(mm, addr, ptep) do { } while (0) | |
62 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | |
2609ae6d AA |
63 | #define pmd_update(mm, addr, ptep) do { } while (0) |
64 | #define pmd_update_defer(mm, addr, ptep) do { } while (0) | |
54321d94 | 65 | |
54321d94 JF |
66 | #define pgd_val(x) native_pgd_val(x) |
67 | #define __pgd(x) native_make_pgd(x) | |
68 | ||
69 | #ifndef __PAGETABLE_PUD_FOLDED | |
70 | #define pud_val(x) native_pud_val(x) | |
71 | #define __pud(x) native_make_pud(x) | |
72 | #endif | |
73 | ||
74 | #ifndef __PAGETABLE_PMD_FOLDED | |
75 | #define pmd_val(x) native_pmd_val(x) | |
76 | #define __pmd(x) native_make_pmd(x) | |
77 | #endif | |
78 | ||
79 | #define pte_val(x) native_pte_val(x) | |
80 | #define __pte(x) native_make_pte(x) | |
81 | ||
224101ed JF |
82 | #define arch_end_context_switch(prev) do {} while(0) |
83 | ||
54321d94 JF |
84 | #endif /* CONFIG_PARAVIRT */ |
85 | ||
4614139c JF |
86 | /* |
87 | * The following only work if pte_present() is true. | |
88 | * Undefined behaviour if not.. | |
89 | */ | |
3cbaeafe JP |
90 | static inline int pte_dirty(pte_t pte) |
91 | { | |
a15af1c9 | 92 | return pte_flags(pte) & _PAGE_DIRTY; |
3cbaeafe JP |
93 | } |
94 | ||
95 | static inline int pte_young(pte_t pte) | |
96 | { | |
a15af1c9 | 97 | return pte_flags(pte) & _PAGE_ACCESSED; |
3cbaeafe JP |
98 | } |
99 | ||
f2d6bfe9 JW |
100 | static inline int pmd_young(pmd_t pmd) |
101 | { | |
102 | return pmd_flags(pmd) & _PAGE_ACCESSED; | |
103 | } | |
104 | ||
3cbaeafe JP |
105 | static inline int pte_write(pte_t pte) |
106 | { | |
a15af1c9 | 107 | return pte_flags(pte) & _PAGE_RW; |
3cbaeafe JP |
108 | } |
109 | ||
110 | static inline int pte_file(pte_t pte) | |
111 | { | |
a15af1c9 | 112 | return pte_flags(pte) & _PAGE_FILE; |
3cbaeafe JP |
113 | } |
114 | ||
115 | static inline int pte_huge(pte_t pte) | |
116 | { | |
a15af1c9 | 117 | return pte_flags(pte) & _PAGE_PSE; |
4614139c JF |
118 | } |
119 | ||
3cbaeafe JP |
120 | static inline int pte_global(pte_t pte) |
121 | { | |
a15af1c9 | 122 | return pte_flags(pte) & _PAGE_GLOBAL; |
3cbaeafe JP |
123 | } |
124 | ||
125 | static inline int pte_exec(pte_t pte) | |
126 | { | |
a15af1c9 | 127 | return !(pte_flags(pte) & _PAGE_NX); |
3cbaeafe JP |
128 | } |
129 | ||
7e675137 NP |
130 | static inline int pte_special(pte_t pte) |
131 | { | |
606ee44d | 132 | return pte_flags(pte) & _PAGE_SPECIAL; |
7e675137 NP |
133 | } |
134 | ||
91030ca1 HD |
135 | static inline unsigned long pte_pfn(pte_t pte) |
136 | { | |
137 | return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
138 | } | |
139 | ||
087975b0 AM |
140 | static inline unsigned long pmd_pfn(pmd_t pmd) |
141 | { | |
142 | return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
143 | } | |
144 | ||
0ee364eb MG |
145 | static inline unsigned long pud_pfn(pud_t pud) |
146 | { | |
147 | return (pud_val(pud) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
148 | } | |
149 | ||
91030ca1 HD |
150 | #define pte_page(pte) pfn_to_page(pte_pfn(pte)) |
151 | ||
3cbaeafe JP |
152 | static inline int pmd_large(pmd_t pte) |
153 | { | |
027ef6c8 | 154 | return pmd_flags(pte) & _PAGE_PSE; |
3cbaeafe JP |
155 | } |
156 | ||
f2d6bfe9 JW |
157 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
158 | static inline int pmd_trans_splitting(pmd_t pmd) | |
159 | { | |
160 | return pmd_val(pmd) & _PAGE_SPLITTING; | |
161 | } | |
162 | ||
163 | static inline int pmd_trans_huge(pmd_t pmd) | |
164 | { | |
165 | return pmd_val(pmd) & _PAGE_PSE; | |
166 | } | |
4b7167b9 AA |
167 | |
168 | static inline int has_transparent_hugepage(void) | |
169 | { | |
170 | return cpu_has_pse; | |
171 | } | |
f2d6bfe9 JW |
172 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
173 | ||
6522869c JF |
174 | static inline pte_t pte_set_flags(pte_t pte, pteval_t set) |
175 | { | |
176 | pteval_t v = native_pte_val(pte); | |
177 | ||
178 | return native_make_pte(v | set); | |
179 | } | |
180 | ||
181 | static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) | |
182 | { | |
183 | pteval_t v = native_pte_val(pte); | |
184 | ||
185 | return native_make_pte(v & ~clear); | |
186 | } | |
187 | ||
3cbaeafe JP |
188 | static inline pte_t pte_mkclean(pte_t pte) |
189 | { | |
6522869c | 190 | return pte_clear_flags(pte, _PAGE_DIRTY); |
3cbaeafe JP |
191 | } |
192 | ||
193 | static inline pte_t pte_mkold(pte_t pte) | |
194 | { | |
6522869c | 195 | return pte_clear_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
196 | } |
197 | ||
198 | static inline pte_t pte_wrprotect(pte_t pte) | |
199 | { | |
6522869c | 200 | return pte_clear_flags(pte, _PAGE_RW); |
3cbaeafe JP |
201 | } |
202 | ||
203 | static inline pte_t pte_mkexec(pte_t pte) | |
204 | { | |
6522869c | 205 | return pte_clear_flags(pte, _PAGE_NX); |
3cbaeafe JP |
206 | } |
207 | ||
208 | static inline pte_t pte_mkdirty(pte_t pte) | |
209 | { | |
0f8975ec | 210 | return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
3cbaeafe JP |
211 | } |
212 | ||
213 | static inline pte_t pte_mkyoung(pte_t pte) | |
214 | { | |
6522869c | 215 | return pte_set_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
216 | } |
217 | ||
218 | static inline pte_t pte_mkwrite(pte_t pte) | |
219 | { | |
6522869c | 220 | return pte_set_flags(pte, _PAGE_RW); |
3cbaeafe JP |
221 | } |
222 | ||
223 | static inline pte_t pte_mkhuge(pte_t pte) | |
224 | { | |
6522869c | 225 | return pte_set_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
226 | } |
227 | ||
228 | static inline pte_t pte_clrhuge(pte_t pte) | |
229 | { | |
6522869c | 230 | return pte_clear_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
231 | } |
232 | ||
233 | static inline pte_t pte_mkglobal(pte_t pte) | |
234 | { | |
6522869c | 235 | return pte_set_flags(pte, _PAGE_GLOBAL); |
3cbaeafe JP |
236 | } |
237 | ||
238 | static inline pte_t pte_clrglobal(pte_t pte) | |
239 | { | |
6522869c | 240 | return pte_clear_flags(pte, _PAGE_GLOBAL); |
3cbaeafe | 241 | } |
4614139c | 242 | |
7e675137 NP |
243 | static inline pte_t pte_mkspecial(pte_t pte) |
244 | { | |
6522869c | 245 | return pte_set_flags(pte, _PAGE_SPECIAL); |
7e675137 NP |
246 | } |
247 | ||
f2d6bfe9 JW |
248 | static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) |
249 | { | |
250 | pmdval_t v = native_pmd_val(pmd); | |
251 | ||
252 | return __pmd(v | set); | |
253 | } | |
254 | ||
255 | static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) | |
256 | { | |
257 | pmdval_t v = native_pmd_val(pmd); | |
258 | ||
259 | return __pmd(v & ~clear); | |
260 | } | |
261 | ||
262 | static inline pmd_t pmd_mkold(pmd_t pmd) | |
263 | { | |
264 | return pmd_clear_flags(pmd, _PAGE_ACCESSED); | |
265 | } | |
266 | ||
267 | static inline pmd_t pmd_wrprotect(pmd_t pmd) | |
268 | { | |
269 | return pmd_clear_flags(pmd, _PAGE_RW); | |
270 | } | |
271 | ||
272 | static inline pmd_t pmd_mkdirty(pmd_t pmd) | |
273 | { | |
0f8975ec | 274 | return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
f2d6bfe9 JW |
275 | } |
276 | ||
277 | static inline pmd_t pmd_mkhuge(pmd_t pmd) | |
278 | { | |
279 | return pmd_set_flags(pmd, _PAGE_PSE); | |
280 | } | |
281 | ||
282 | static inline pmd_t pmd_mkyoung(pmd_t pmd) | |
283 | { | |
284 | return pmd_set_flags(pmd, _PAGE_ACCESSED); | |
285 | } | |
286 | ||
287 | static inline pmd_t pmd_mkwrite(pmd_t pmd) | |
288 | { | |
289 | return pmd_set_flags(pmd, _PAGE_RW); | |
290 | } | |
291 | ||
292 | static inline pmd_t pmd_mknotpresent(pmd_t pmd) | |
293 | { | |
294 | return pmd_clear_flags(pmd, _PAGE_PRESENT); | |
295 | } | |
296 | ||
0f8975ec PE |
297 | static inline int pte_soft_dirty(pte_t pte) |
298 | { | |
299 | return pte_flags(pte) & _PAGE_SOFT_DIRTY; | |
300 | } | |
301 | ||
302 | static inline int pmd_soft_dirty(pmd_t pmd) | |
303 | { | |
304 | return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; | |
305 | } | |
306 | ||
307 | static inline pte_t pte_mksoft_dirty(pte_t pte) | |
308 | { | |
309 | return pte_set_flags(pte, _PAGE_SOFT_DIRTY); | |
310 | } | |
311 | ||
312 | static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) | |
313 | { | |
314 | return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); | |
315 | } | |
316 | ||
b534816b JF |
317 | /* |
318 | * Mask out unsupported bits in a present pgprot. Non-present pgprots | |
319 | * can use those bits for other purposes, so leave them be. | |
320 | */ | |
321 | static inline pgprotval_t massage_pgprot(pgprot_t pgprot) | |
322 | { | |
323 | pgprotval_t protval = pgprot_val(pgprot); | |
324 | ||
325 | if (protval & _PAGE_PRESENT) | |
326 | protval &= __supported_pte_mask; | |
327 | ||
328 | return protval; | |
329 | } | |
330 | ||
6fdc05d4 JF |
331 | static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) |
332 | { | |
b534816b JF |
333 | return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | |
334 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
335 | } |
336 | ||
337 | static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) | |
338 | { | |
b534816b JF |
339 | return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | |
340 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
341 | } |
342 | ||
38472311 IM |
343 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
344 | { | |
345 | pteval_t val = pte_val(pte); | |
346 | ||
347 | /* | |
348 | * Chop off the NX bit (if present), and add the NX portion of | |
349 | * the newprot (if present): | |
350 | */ | |
1c12c4cf | 351 | val &= _PAGE_CHG_MASK; |
b534816b | 352 | val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK; |
38472311 IM |
353 | |
354 | return __pte(val); | |
355 | } | |
356 | ||
c489f125 JW |
357 | static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) |
358 | { | |
359 | pmdval_t val = pmd_val(pmd); | |
360 | ||
361 | val &= _HPAGE_CHG_MASK; | |
362 | val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK; | |
363 | ||
364 | return __pmd(val); | |
365 | } | |
366 | ||
1c12c4cf VP |
367 | /* mprotect needs to preserve PAT bits when updating vm_page_prot */ |
368 | #define pgprot_modify pgprot_modify | |
369 | static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |
370 | { | |
371 | pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; | |
372 | pgprotval_t addbits = pgprot_val(newprot); | |
373 | return __pgprot(preservebits | addbits); | |
374 | } | |
375 | ||
77be1fab | 376 | #define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK) |
c6ca18eb | 377 | |
b534816b | 378 | #define canon_pgprot(p) __pgprot(massage_pgprot(p)) |
1e8e23bc | 379 | |
1adcaafe SS |
380 | static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, |
381 | unsigned long flags, | |
382 | unsigned long new_flags) | |
afc7d20c | 383 | { |
1adcaafe | 384 | /* |
55a6ca25 | 385 | * PAT type is always WB for untracked ranges, so no need to check. |
1adcaafe | 386 | */ |
8a271389 | 387 | if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) |
1adcaafe SS |
388 | return 1; |
389 | ||
afc7d20c | 390 | /* |
391 | * Certain new memtypes are not allowed with certain | |
392 | * requested memtype: | |
393 | * - request is uncached, return cannot be write-back | |
394 | * - request is write-combine, return cannot be write-back | |
395 | */ | |
396 | if ((flags == _PAGE_CACHE_UC_MINUS && | |
397 | new_flags == _PAGE_CACHE_WB) || | |
398 | (flags == _PAGE_CACHE_WC && | |
399 | new_flags == _PAGE_CACHE_WB)) { | |
400 | return 0; | |
401 | } | |
402 | ||
403 | return 1; | |
404 | } | |
405 | ||
458a3e64 TH |
406 | pmd_t *populate_extra_pmd(unsigned long vaddr); |
407 | pte_t *populate_extra_pte(unsigned long vaddr); | |
4614139c JF |
408 | #endif /* __ASSEMBLY__ */ |
409 | ||
96a388de | 410 | #ifdef CONFIG_X86_32 |
a1ce3928 | 411 | # include <asm/pgtable_32.h> |
96a388de | 412 | #else |
a1ce3928 | 413 | # include <asm/pgtable_64.h> |
96a388de | 414 | #endif |
6c386655 | 415 | |
aca159db | 416 | #ifndef __ASSEMBLY__ |
f476961c | 417 | #include <linux/mm_types.h> |
4cbeb51b | 418 | #include <linux/log2.h> |
aca159db | 419 | |
a034a010 JF |
420 | static inline int pte_none(pte_t pte) |
421 | { | |
422 | return !pte.pte; | |
423 | } | |
424 | ||
8de01da3 JF |
425 | #define __HAVE_ARCH_PTE_SAME |
426 | static inline int pte_same(pte_t a, pte_t b) | |
427 | { | |
428 | return a.pte == b.pte; | |
429 | } | |
430 | ||
7c683851 JF |
431 | static inline int pte_present(pte_t a) |
432 | { | |
be3a7284 AA |
433 | return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE | |
434 | _PAGE_NUMA); | |
7c683851 JF |
435 | } |
436 | ||
2c3cf556 RR |
437 | #define pte_accessible pte_accessible |
438 | static inline int pte_accessible(pte_t a) | |
439 | { | |
440 | return pte_flags(a) & _PAGE_PRESENT; | |
441 | } | |
442 | ||
eb63657e | 443 | static inline int pte_hidden(pte_t pte) |
dfec072e | 444 | { |
eb63657e | 445 | return pte_flags(pte) & _PAGE_HIDDEN; |
dfec072e VN |
446 | } |
447 | ||
649e8ef6 JF |
448 | static inline int pmd_present(pmd_t pmd) |
449 | { | |
027ef6c8 AA |
450 | /* |
451 | * Checking for _PAGE_PSE is needed too because | |
452 | * split_huge_page will temporarily clear the present bit (but | |
453 | * the _PAGE_PSE flag will remain set at all times while the | |
454 | * _PAGE_PRESENT bit is clear). | |
455 | */ | |
be3a7284 AA |
456 | return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE | |
457 | _PAGE_NUMA); | |
649e8ef6 JF |
458 | } |
459 | ||
4fea801a JF |
460 | static inline int pmd_none(pmd_t pmd) |
461 | { | |
462 | /* Only check low word on 32-bit platforms, since it might be | |
463 | out of sync with upper half. */ | |
26c8e317 | 464 | return (unsigned long)native_pmd_val(pmd) == 0; |
4fea801a JF |
465 | } |
466 | ||
3ffb3564 JF |
467 | static inline unsigned long pmd_page_vaddr(pmd_t pmd) |
468 | { | |
469 | return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK); | |
470 | } | |
471 | ||
e5f7f202 IM |
472 | /* |
473 | * Currently stuck as a macro due to indirect forward reference to | |
474 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
475 | */ | |
db3eb96f | 476 | #define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT) |
20063ca4 | 477 | |
e24d7eee JF |
478 | /* |
479 | * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] | |
480 | * | |
481 | * this macro returns the index of the entry in the pmd page which would | |
482 | * control the given virtual address | |
483 | */ | |
ce0c0f9e | 484 | static inline unsigned long pmd_index(unsigned long address) |
e24d7eee JF |
485 | { |
486 | return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); | |
487 | } | |
488 | ||
97e2817d JF |
489 | /* |
490 | * Conversion functions: convert a page and protection to a page entry, | |
491 | * and a page entry and page directory to the page they refer to. | |
492 | * | |
493 | * (Currently stuck as a macro because of indirect forward reference | |
494 | * to linux/mm.h:page_to_nid()) | |
495 | */ | |
496 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | |
497 | ||
346309cf JF |
498 | /* |
499 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] | |
500 | * | |
501 | * this function returns the index of the entry in the pte page which would | |
502 | * control the given virtual address | |
503 | */ | |
ce0c0f9e | 504 | static inline unsigned long pte_index(unsigned long address) |
346309cf JF |
505 | { |
506 | return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); | |
507 | } | |
508 | ||
3fbc2444 JF |
509 | static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) |
510 | { | |
511 | return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); | |
512 | } | |
513 | ||
99510238 JF |
514 | static inline int pmd_bad(pmd_t pmd) |
515 | { | |
be3a7284 AA |
516 | #ifdef CONFIG_NUMA_BALANCING |
517 | /* pmd_numa check */ | |
518 | if ((pmd_flags(pmd) & (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA) | |
519 | return 0; | |
520 | #endif | |
18a7a199 | 521 | return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; |
99510238 JF |
522 | } |
523 | ||
cc290ca3 JF |
524 | static inline unsigned long pages_to_mb(unsigned long npg) |
525 | { | |
526 | return npg >> (20 - PAGE_SHIFT); | |
527 | } | |
528 | ||
5ba7c913 | 529 | #if PAGETABLE_LEVELS > 2 |
deb79cfb JF |
530 | static inline int pud_none(pud_t pud) |
531 | { | |
26c8e317 | 532 | return native_pud_val(pud) == 0; |
deb79cfb JF |
533 | } |
534 | ||
5ba7c913 JF |
535 | static inline int pud_present(pud_t pud) |
536 | { | |
18a7a199 | 537 | return pud_flags(pud) & _PAGE_PRESENT; |
5ba7c913 | 538 | } |
6fff47e3 JF |
539 | |
540 | static inline unsigned long pud_page_vaddr(pud_t pud) | |
541 | { | |
542 | return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK); | |
543 | } | |
f476961c | 544 | |
e5f7f202 IM |
545 | /* |
546 | * Currently stuck as a macro due to indirect forward reference to | |
547 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
548 | */ | |
549 | #define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT) | |
01ade20d JF |
550 | |
551 | /* Find an entry in the second-level page table.. */ | |
552 | static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) | |
553 | { | |
554 | return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); | |
555 | } | |
3180fba0 | 556 | |
3f6cbef1 JF |
557 | static inline int pud_large(pud_t pud) |
558 | { | |
e2f5bda9 | 559 | return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == |
3f6cbef1 JF |
560 | (_PAGE_PSE | _PAGE_PRESENT); |
561 | } | |
a61bb29a JF |
562 | |
563 | static inline int pud_bad(pud_t pud) | |
564 | { | |
18a7a199 | 565 | return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; |
a61bb29a | 566 | } |
e2f5bda9 JF |
567 | #else |
568 | static inline int pud_large(pud_t pud) | |
569 | { | |
570 | return 0; | |
571 | } | |
5ba7c913 JF |
572 | #endif /* PAGETABLE_LEVELS > 2 */ |
573 | ||
9f38d7e8 JF |
574 | #if PAGETABLE_LEVELS > 3 |
575 | static inline int pgd_present(pgd_t pgd) | |
576 | { | |
18a7a199 | 577 | return pgd_flags(pgd) & _PAGE_PRESENT; |
9f38d7e8 | 578 | } |
c5f040b1 JF |
579 | |
580 | static inline unsigned long pgd_page_vaddr(pgd_t pgd) | |
581 | { | |
582 | return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); | |
583 | } | |
777cba16 | 584 | |
e5f7f202 IM |
585 | /* |
586 | * Currently stuck as a macro due to indirect forward reference to | |
587 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
588 | */ | |
589 | #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT) | |
7cfb8102 JF |
590 | |
591 | /* to find an entry in a page-table-directory. */ | |
ce0c0f9e | 592 | static inline unsigned long pud_index(unsigned long address) |
7cfb8102 JF |
593 | { |
594 | return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); | |
595 | } | |
3d081b18 JF |
596 | |
597 | static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) | |
598 | { | |
599 | return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address); | |
600 | } | |
30f10316 JF |
601 | |
602 | static inline int pgd_bad(pgd_t pgd) | |
603 | { | |
18a7a199 | 604 | return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; |
30f10316 | 605 | } |
7325cc2e JF |
606 | |
607 | static inline int pgd_none(pgd_t pgd) | |
608 | { | |
26c8e317 | 609 | return !native_pgd_val(pgd); |
7325cc2e | 610 | } |
9f38d7e8 JF |
611 | #endif /* PAGETABLE_LEVELS > 3 */ |
612 | ||
4614139c JF |
613 | #endif /* __ASSEMBLY__ */ |
614 | ||
fb15a9b3 JF |
615 | /* |
616 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | |
617 | * | |
618 | * this macro returns the index of the entry in the pgd page which would | |
619 | * control the given virtual address | |
620 | */ | |
621 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | |
622 | ||
623 | /* | |
624 | * pgd_offset() returns a (pgd_t *) | |
625 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | |
626 | */ | |
627 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | |
628 | /* | |
629 | * a shortcut which implies the use of the kernel's pgd, instead | |
630 | * of a process's | |
631 | */ | |
632 | #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) | |
633 | ||
634 | ||
68db065c JF |
635 | #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) |
636 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) | |
637 | ||
195466dc JF |
638 | #ifndef __ASSEMBLY__ |
639 | ||
2c1b284e | 640 | extern int direct_gbpages; |
22ddfcaa | 641 | void init_mem_mapping(void); |
8d57470d | 642 | void early_alloc_pgt_buf(void); |
2c1b284e | 643 | |
4891645e JF |
644 | /* local pte updates need not use xchg for locking */ |
645 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) | |
646 | { | |
647 | pte_t res = *ptep; | |
648 | ||
649 | /* Pure native function needs no input for mm, addr */ | |
650 | native_pte_clear(NULL, 0, ptep); | |
651 | return res; | |
652 | } | |
653 | ||
f2d6bfe9 JW |
654 | static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) |
655 | { | |
656 | pmd_t res = *pmdp; | |
657 | ||
658 | native_pmd_clear(pmdp); | |
659 | return res; | |
660 | } | |
661 | ||
4891645e JF |
662 | static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, |
663 | pte_t *ptep , pte_t pte) | |
664 | { | |
665 | native_set_pte(ptep, pte); | |
666 | } | |
667 | ||
0a47de52 AA |
668 | static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr, |
669 | pmd_t *pmdp , pmd_t pmd) | |
670 | { | |
671 | native_set_pmd(pmdp, pmd); | |
672 | } | |
673 | ||
195466dc JF |
674 | #ifndef CONFIG_PARAVIRT |
675 | /* | |
676 | * Rules for using pte_update - it must be called after any PTE update which | |
677 | * has not been done using the set_pte / clear_pte interfaces. It is used by | |
678 | * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE | |
679 | * updates should either be sets, clears, or set_pte_atomic for P->P | |
680 | * transitions, which means this hook should only be called for user PTEs. | |
681 | * This hook implies a P->P protection or access change has taken place, which | |
682 | * requires a subsequent TLB flush. The notification can optionally be delayed | |
683 | * until the TLB flush event by using the pte_update_defer form of the | |
684 | * interface, but care must be taken to assure that the flush happens while | |
685 | * still holding the same page table lock so that the shadow and primary pages | |
686 | * do not become out of sync on SMP. | |
687 | */ | |
688 | #define pte_update(mm, addr, ptep) do { } while (0) | |
689 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | |
690 | #endif | |
691 | ||
195466dc JF |
692 | /* |
693 | * We only update the dirty/accessed state if we set | |
694 | * the dirty bit by hand in the kernel, since the hardware | |
695 | * will do the accessed bit for us, and we don't want to | |
696 | * race with other CPU's that might be updating the dirty | |
697 | * bit at the same time. | |
698 | */ | |
bea41808 JF |
699 | struct vm_area_struct; |
700 | ||
195466dc | 701 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
ee5aa8d3 JF |
702 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
703 | unsigned long address, pte_t *ptep, | |
704 | pte_t entry, int dirty); | |
195466dc JF |
705 | |
706 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
f9fbf1a3 JF |
707 | extern int ptep_test_and_clear_young(struct vm_area_struct *vma, |
708 | unsigned long addr, pte_t *ptep); | |
195466dc JF |
709 | |
710 | #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
c20311e1 JF |
711 | extern int ptep_clear_flush_young(struct vm_area_struct *vma, |
712 | unsigned long address, pte_t *ptep); | |
195466dc JF |
713 | |
714 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | |
3cbaeafe JP |
715 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, |
716 | pte_t *ptep) | |
195466dc JF |
717 | { |
718 | pte_t pte = native_ptep_get_and_clear(ptep); | |
719 | pte_update(mm, addr, ptep); | |
720 | return pte; | |
721 | } | |
722 | ||
723 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL | |
3cbaeafe JP |
724 | static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, |
725 | unsigned long addr, pte_t *ptep, | |
726 | int full) | |
195466dc JF |
727 | { |
728 | pte_t pte; | |
729 | if (full) { | |
730 | /* | |
731 | * Full address destruction in progress; paravirt does not | |
732 | * care about updates and native needs no locking | |
733 | */ | |
734 | pte = native_local_ptep_get_and_clear(ptep); | |
735 | } else { | |
736 | pte = ptep_get_and_clear(mm, addr, ptep); | |
737 | } | |
738 | return pte; | |
739 | } | |
740 | ||
741 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | |
3cbaeafe JP |
742 | static inline void ptep_set_wrprotect(struct mm_struct *mm, |
743 | unsigned long addr, pte_t *ptep) | |
195466dc | 744 | { |
d8d89827 | 745 | clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); |
195466dc JF |
746 | pte_update(mm, addr, ptep); |
747 | } | |
748 | ||
2ac13462 | 749 | #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) |
61c77326 | 750 | |
f2d6bfe9 JW |
751 | #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) |
752 | ||
753 | #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS | |
754 | extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |
755 | unsigned long address, pmd_t *pmdp, | |
756 | pmd_t entry, int dirty); | |
757 | ||
758 | #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG | |
759 | extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
760 | unsigned long addr, pmd_t *pmdp); | |
761 | ||
762 | #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH | |
763 | extern int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
764 | unsigned long address, pmd_t *pmdp); | |
765 | ||
766 | ||
767 | #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH | |
768 | extern void pmdp_splitting_flush(struct vm_area_struct *vma, | |
769 | unsigned long addr, pmd_t *pmdp); | |
770 | ||
771 | #define __HAVE_ARCH_PMD_WRITE | |
772 | static inline int pmd_write(pmd_t pmd) | |
773 | { | |
774 | return pmd_flags(pmd) & _PAGE_RW; | |
775 | } | |
776 | ||
777 | #define __HAVE_ARCH_PMDP_GET_AND_CLEAR | |
778 | static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr, | |
779 | pmd_t *pmdp) | |
780 | { | |
781 | pmd_t pmd = native_pmdp_get_and_clear(pmdp); | |
782 | pmd_update(mm, addr, pmdp); | |
783 | return pmd; | |
784 | } | |
785 | ||
786 | #define __HAVE_ARCH_PMDP_SET_WRPROTECT | |
787 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
788 | unsigned long addr, pmd_t *pmdp) | |
789 | { | |
790 | clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); | |
791 | pmd_update(mm, addr, pmdp); | |
792 | } | |
793 | ||
85958b46 JF |
794 | /* |
795 | * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); | |
796 | * | |
797 | * dst - pointer to pgd range anwhere on a pgd page | |
798 | * src - "" | |
799 | * count - the number of pgds to copy. | |
800 | * | |
801 | * dst and src can be on the same page, but the range must not overlap, | |
802 | * and must not cross a page boundary. | |
803 | */ | |
804 | static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) | |
805 | { | |
806 | memcpy(dst, src, count * sizeof(pgd_t)); | |
807 | } | |
808 | ||
4cbeb51b DH |
809 | #define PTE_SHIFT ilog2(PTRS_PER_PTE) |
810 | static inline int page_level_shift(enum pg_level level) | |
811 | { | |
812 | return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; | |
813 | } | |
814 | static inline unsigned long page_level_size(enum pg_level level) | |
815 | { | |
816 | return 1UL << page_level_shift(level); | |
817 | } | |
818 | static inline unsigned long page_level_mask(enum pg_level level) | |
819 | { | |
820 | return ~(page_level_size(level) - 1); | |
821 | } | |
85958b46 | 822 | |
602e0186 KS |
823 | /* |
824 | * The x86 doesn't have any external MMU info: the kernel page | |
825 | * tables contain all the necessary information. | |
826 | */ | |
827 | static inline void update_mmu_cache(struct vm_area_struct *vma, | |
828 | unsigned long addr, pte_t *ptep) | |
829 | { | |
830 | } | |
831 | static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, | |
832 | unsigned long addr, pmd_t *pmd) | |
833 | { | |
834 | } | |
85958b46 | 835 | |
195466dc JF |
836 | #include <asm-generic/pgtable.h> |
837 | #endif /* __ASSEMBLY__ */ | |
838 | ||
1965aae3 | 839 | #endif /* _ASM_X86_PGTABLE_H */ |