x86, asmlinkage: Make several variables used from assembler/linker script visible
[deliverable/linux.git] / arch / x86 / include / asm / pgtable.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \
15 : (prot))
16
4614139c 17#ifndef __ASSEMBLY__
195466dc 18
55a6ca25
PA
19#include <asm/x86_init.h>
20
8405b122
JF
21/*
22 * ZERO_PAGE is a global shared page that is always zero: used
23 * for zero-mapped memory areas etc..
24 */
277d5b40
AK
25extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
26 __visible;
8405b122
JF
27#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
28
e3ed910d
JF
29extern spinlock_t pgd_lock;
30extern struct list_head pgd_list;
8405b122 31
617d34d9
JF
32extern struct mm_struct *pgd_page_get_mm(struct page *page);
33
54321d94
JF
34#ifdef CONFIG_PARAVIRT
35#include <asm/paravirt.h>
36#else /* !CONFIG_PARAVIRT */
37#define set_pte(ptep, pte) native_set_pte(ptep, pte)
38#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
2609ae6d 39#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
54321d94 40
54321d94
JF
41#define set_pte_atomic(ptep, pte) \
42 native_set_pte_atomic(ptep, pte)
43
44#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
45
46#ifndef __PAGETABLE_PUD_FOLDED
47#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
48#define pgd_clear(pgd) native_pgd_clear(pgd)
49#endif
50
51#ifndef set_pud
52# define set_pud(pudp, pud) native_set_pud(pudp, pud)
53#endif
54
55#ifndef __PAGETABLE_PMD_FOLDED
56#define pud_clear(pud) native_pud_clear(pud)
57#endif
58
59#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
60#define pmd_clear(pmd) native_pmd_clear(pmd)
61
62#define pte_update(mm, addr, ptep) do { } while (0)
63#define pte_update_defer(mm, addr, ptep) do { } while (0)
2609ae6d
AA
64#define pmd_update(mm, addr, ptep) do { } while (0)
65#define pmd_update_defer(mm, addr, ptep) do { } while (0)
54321d94 66
54321d94
JF
67#define pgd_val(x) native_pgd_val(x)
68#define __pgd(x) native_make_pgd(x)
69
70#ifndef __PAGETABLE_PUD_FOLDED
71#define pud_val(x) native_pud_val(x)
72#define __pud(x) native_make_pud(x)
73#endif
74
75#ifndef __PAGETABLE_PMD_FOLDED
76#define pmd_val(x) native_pmd_val(x)
77#define __pmd(x) native_make_pmd(x)
78#endif
79
80#define pte_val(x) native_pte_val(x)
81#define __pte(x) native_make_pte(x)
82
224101ed
JF
83#define arch_end_context_switch(prev) do {} while(0)
84
54321d94
JF
85#endif /* CONFIG_PARAVIRT */
86
4614139c
JF
87/*
88 * The following only work if pte_present() is true.
89 * Undefined behaviour if not..
90 */
3cbaeafe
JP
91static inline int pte_dirty(pte_t pte)
92{
a15af1c9 93 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
94}
95
96static inline int pte_young(pte_t pte)
97{
a15af1c9 98 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
99}
100
f2d6bfe9
JW
101static inline int pmd_young(pmd_t pmd)
102{
103 return pmd_flags(pmd) & _PAGE_ACCESSED;
104}
105
3cbaeafe
JP
106static inline int pte_write(pte_t pte)
107{
a15af1c9 108 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
109}
110
111static inline int pte_file(pte_t pte)
112{
a15af1c9 113 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
114}
115
116static inline int pte_huge(pte_t pte)
117{
a15af1c9 118 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
119}
120
3cbaeafe
JP
121static inline int pte_global(pte_t pte)
122{
a15af1c9 123 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
124}
125
126static inline int pte_exec(pte_t pte)
127{
a15af1c9 128 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
129}
130
7e675137
NP
131static inline int pte_special(pte_t pte)
132{
606ee44d 133 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
134}
135
91030ca1
HD
136static inline unsigned long pte_pfn(pte_t pte)
137{
138 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
139}
140
087975b0
AM
141static inline unsigned long pmd_pfn(pmd_t pmd)
142{
143 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
144}
145
0ee364eb
MG
146static inline unsigned long pud_pfn(pud_t pud)
147{
148 return (pud_val(pud) & PTE_PFN_MASK) >> PAGE_SHIFT;
149}
150
91030ca1
HD
151#define pte_page(pte) pfn_to_page(pte_pfn(pte))
152
3cbaeafe
JP
153static inline int pmd_large(pmd_t pte)
154{
027ef6c8 155 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
156}
157
f2d6bfe9
JW
158#ifdef CONFIG_TRANSPARENT_HUGEPAGE
159static inline int pmd_trans_splitting(pmd_t pmd)
160{
161 return pmd_val(pmd) & _PAGE_SPLITTING;
162}
163
164static inline int pmd_trans_huge(pmd_t pmd)
165{
166 return pmd_val(pmd) & _PAGE_PSE;
167}
4b7167b9
AA
168
169static inline int has_transparent_hugepage(void)
170{
171 return cpu_has_pse;
172}
f2d6bfe9
JW
173#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
174
6522869c
JF
175static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
176{
177 pteval_t v = native_pte_val(pte);
178
179 return native_make_pte(v | set);
180}
181
182static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
183{
184 pteval_t v = native_pte_val(pte);
185
186 return native_make_pte(v & ~clear);
187}
188
3cbaeafe
JP
189static inline pte_t pte_mkclean(pte_t pte)
190{
6522869c 191 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
192}
193
194static inline pte_t pte_mkold(pte_t pte)
195{
6522869c 196 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
197}
198
199static inline pte_t pte_wrprotect(pte_t pte)
200{
6522869c 201 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
202}
203
204static inline pte_t pte_mkexec(pte_t pte)
205{
6522869c 206 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
207}
208
209static inline pte_t pte_mkdirty(pte_t pte)
210{
0f8975ec 211 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
212}
213
214static inline pte_t pte_mkyoung(pte_t pte)
215{
6522869c 216 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
217}
218
219static inline pte_t pte_mkwrite(pte_t pte)
220{
6522869c 221 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
222}
223
224static inline pte_t pte_mkhuge(pte_t pte)
225{
6522869c 226 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
227}
228
229static inline pte_t pte_clrhuge(pte_t pte)
230{
6522869c 231 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
232}
233
234static inline pte_t pte_mkglobal(pte_t pte)
235{
6522869c 236 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
237}
238
239static inline pte_t pte_clrglobal(pte_t pte)
240{
6522869c 241 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 242}
4614139c 243
7e675137
NP
244static inline pte_t pte_mkspecial(pte_t pte)
245{
6522869c 246 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
247}
248
f2d6bfe9
JW
249static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
250{
251 pmdval_t v = native_pmd_val(pmd);
252
253 return __pmd(v | set);
254}
255
256static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
257{
258 pmdval_t v = native_pmd_val(pmd);
259
260 return __pmd(v & ~clear);
261}
262
263static inline pmd_t pmd_mkold(pmd_t pmd)
264{
265 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
266}
267
268static inline pmd_t pmd_wrprotect(pmd_t pmd)
269{
270 return pmd_clear_flags(pmd, _PAGE_RW);
271}
272
273static inline pmd_t pmd_mkdirty(pmd_t pmd)
274{
0f8975ec 275 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
276}
277
278static inline pmd_t pmd_mkhuge(pmd_t pmd)
279{
280 return pmd_set_flags(pmd, _PAGE_PSE);
281}
282
283static inline pmd_t pmd_mkyoung(pmd_t pmd)
284{
285 return pmd_set_flags(pmd, _PAGE_ACCESSED);
286}
287
288static inline pmd_t pmd_mkwrite(pmd_t pmd)
289{
290 return pmd_set_flags(pmd, _PAGE_RW);
291}
292
293static inline pmd_t pmd_mknotpresent(pmd_t pmd)
294{
295 return pmd_clear_flags(pmd, _PAGE_PRESENT);
296}
297
0f8975ec
PE
298static inline int pte_soft_dirty(pte_t pte)
299{
300 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
301}
302
303static inline int pmd_soft_dirty(pmd_t pmd)
304{
305 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
306}
307
308static inline pte_t pte_mksoft_dirty(pte_t pte)
309{
310 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
311}
312
313static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
314{
315 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
316}
317
b534816b
JF
318/*
319 * Mask out unsupported bits in a present pgprot. Non-present pgprots
320 * can use those bits for other purposes, so leave them be.
321 */
322static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
323{
324 pgprotval_t protval = pgprot_val(pgprot);
325
326 if (protval & _PAGE_PRESENT)
327 protval &= __supported_pte_mask;
328
329 return protval;
330}
331
6fdc05d4
JF
332static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
333{
b534816b
JF
334 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
335 massage_pgprot(pgprot));
6fdc05d4
JF
336}
337
338static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
339{
b534816b
JF
340 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
341 massage_pgprot(pgprot));
6fdc05d4
JF
342}
343
38472311
IM
344static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
345{
346 pteval_t val = pte_val(pte);
347
348 /*
349 * Chop off the NX bit (if present), and add the NX portion of
350 * the newprot (if present):
351 */
1c12c4cf 352 val &= _PAGE_CHG_MASK;
b534816b 353 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
354
355 return __pte(val);
356}
357
c489f125
JW
358static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
359{
360 pmdval_t val = pmd_val(pmd);
361
362 val &= _HPAGE_CHG_MASK;
363 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
364
365 return __pmd(val);
366}
367
1c12c4cf
VP
368/* mprotect needs to preserve PAT bits when updating vm_page_prot */
369#define pgprot_modify pgprot_modify
370static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
371{
372 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
373 pgprotval_t addbits = pgprot_val(newprot);
374 return __pgprot(preservebits | addbits);
375}
376
77be1fab 377#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 378
b534816b 379#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 380
1adcaafe
SS
381static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
382 unsigned long flags,
383 unsigned long new_flags)
afc7d20c 384{
1adcaafe 385 /*
55a6ca25 386 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 387 */
8a271389 388 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
389 return 1;
390
afc7d20c 391 /*
392 * Certain new memtypes are not allowed with certain
393 * requested memtype:
394 * - request is uncached, return cannot be write-back
395 * - request is write-combine, return cannot be write-back
396 */
397 if ((flags == _PAGE_CACHE_UC_MINUS &&
398 new_flags == _PAGE_CACHE_WB) ||
399 (flags == _PAGE_CACHE_WC &&
400 new_flags == _PAGE_CACHE_WB)) {
401 return 0;
402 }
403
404 return 1;
405}
406
458a3e64
TH
407pmd_t *populate_extra_pmd(unsigned long vaddr);
408pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
409#endif /* __ASSEMBLY__ */
410
96a388de 411#ifdef CONFIG_X86_32
a1ce3928 412# include <asm/pgtable_32.h>
96a388de 413#else
a1ce3928 414# include <asm/pgtable_64.h>
96a388de 415#endif
6c386655 416
aca159db 417#ifndef __ASSEMBLY__
f476961c 418#include <linux/mm_types.h>
4cbeb51b 419#include <linux/log2.h>
aca159db 420
a034a010
JF
421static inline int pte_none(pte_t pte)
422{
423 return !pte.pte;
424}
425
8de01da3
JF
426#define __HAVE_ARCH_PTE_SAME
427static inline int pte_same(pte_t a, pte_t b)
428{
429 return a.pte == b.pte;
430}
431
7c683851
JF
432static inline int pte_present(pte_t a)
433{
be3a7284
AA
434 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE |
435 _PAGE_NUMA);
7c683851
JF
436}
437
2c3cf556
RR
438#define pte_accessible pte_accessible
439static inline int pte_accessible(pte_t a)
440{
441 return pte_flags(a) & _PAGE_PRESENT;
442}
443
eb63657e 444static inline int pte_hidden(pte_t pte)
dfec072e 445{
eb63657e 446 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
447}
448
649e8ef6
JF
449static inline int pmd_present(pmd_t pmd)
450{
027ef6c8
AA
451 /*
452 * Checking for _PAGE_PSE is needed too because
453 * split_huge_page will temporarily clear the present bit (but
454 * the _PAGE_PSE flag will remain set at all times while the
455 * _PAGE_PRESENT bit is clear).
456 */
be3a7284
AA
457 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE |
458 _PAGE_NUMA);
649e8ef6
JF
459}
460
4fea801a
JF
461static inline int pmd_none(pmd_t pmd)
462{
463 /* Only check low word on 32-bit platforms, since it might be
464 out of sync with upper half. */
26c8e317 465 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
466}
467
3ffb3564
JF
468static inline unsigned long pmd_page_vaddr(pmd_t pmd)
469{
470 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
471}
472
e5f7f202
IM
473/*
474 * Currently stuck as a macro due to indirect forward reference to
475 * linux/mmzone.h's __section_mem_map_addr() definition:
476 */
db3eb96f 477#define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT)
20063ca4 478
e24d7eee
JF
479/*
480 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
481 *
482 * this macro returns the index of the entry in the pmd page which would
483 * control the given virtual address
484 */
ce0c0f9e 485static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
486{
487 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
488}
489
97e2817d
JF
490/*
491 * Conversion functions: convert a page and protection to a page entry,
492 * and a page entry and page directory to the page they refer to.
493 *
494 * (Currently stuck as a macro because of indirect forward reference
495 * to linux/mm.h:page_to_nid())
496 */
497#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
498
346309cf
JF
499/*
500 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
501 *
502 * this function returns the index of the entry in the pte page which would
503 * control the given virtual address
504 */
ce0c0f9e 505static inline unsigned long pte_index(unsigned long address)
346309cf
JF
506{
507 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
508}
509
3fbc2444
JF
510static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
511{
512 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
513}
514
99510238
JF
515static inline int pmd_bad(pmd_t pmd)
516{
be3a7284
AA
517#ifdef CONFIG_NUMA_BALANCING
518 /* pmd_numa check */
519 if ((pmd_flags(pmd) & (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA)
520 return 0;
521#endif
18a7a199 522 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
523}
524
cc290ca3
JF
525static inline unsigned long pages_to_mb(unsigned long npg)
526{
527 return npg >> (20 - PAGE_SHIFT);
528}
529
5ba7c913 530#if PAGETABLE_LEVELS > 2
deb79cfb
JF
531static inline int pud_none(pud_t pud)
532{
26c8e317 533 return native_pud_val(pud) == 0;
deb79cfb
JF
534}
535
5ba7c913
JF
536static inline int pud_present(pud_t pud)
537{
18a7a199 538 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 539}
6fff47e3
JF
540
541static inline unsigned long pud_page_vaddr(pud_t pud)
542{
543 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
544}
f476961c 545
e5f7f202
IM
546/*
547 * Currently stuck as a macro due to indirect forward reference to
548 * linux/mmzone.h's __section_mem_map_addr() definition:
549 */
550#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
01ade20d
JF
551
552/* Find an entry in the second-level page table.. */
553static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
554{
555 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
556}
3180fba0 557
3f6cbef1
JF
558static inline int pud_large(pud_t pud)
559{
e2f5bda9 560 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
561 (_PAGE_PSE | _PAGE_PRESENT);
562}
a61bb29a
JF
563
564static inline int pud_bad(pud_t pud)
565{
18a7a199 566 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 567}
e2f5bda9
JF
568#else
569static inline int pud_large(pud_t pud)
570{
571 return 0;
572}
5ba7c913
JF
573#endif /* PAGETABLE_LEVELS > 2 */
574
9f38d7e8
JF
575#if PAGETABLE_LEVELS > 3
576static inline int pgd_present(pgd_t pgd)
577{
18a7a199 578 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 579}
c5f040b1
JF
580
581static inline unsigned long pgd_page_vaddr(pgd_t pgd)
582{
583 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
584}
777cba16 585
e5f7f202
IM
586/*
587 * Currently stuck as a macro due to indirect forward reference to
588 * linux/mmzone.h's __section_mem_map_addr() definition:
589 */
590#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
7cfb8102
JF
591
592/* to find an entry in a page-table-directory. */
ce0c0f9e 593static inline unsigned long pud_index(unsigned long address)
7cfb8102
JF
594{
595 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
596}
3d081b18
JF
597
598static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
599{
600 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
601}
30f10316
JF
602
603static inline int pgd_bad(pgd_t pgd)
604{
18a7a199 605 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 606}
7325cc2e
JF
607
608static inline int pgd_none(pgd_t pgd)
609{
26c8e317 610 return !native_pgd_val(pgd);
7325cc2e 611}
9f38d7e8
JF
612#endif /* PAGETABLE_LEVELS > 3 */
613
4614139c
JF
614#endif /* __ASSEMBLY__ */
615
fb15a9b3
JF
616/*
617 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
618 *
619 * this macro returns the index of the entry in the pgd page which would
620 * control the given virtual address
621 */
622#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
623
624/*
625 * pgd_offset() returns a (pgd_t *)
626 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
627 */
628#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
629/*
630 * a shortcut which implies the use of the kernel's pgd, instead
631 * of a process's
632 */
633#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
634
635
68db065c
JF
636#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
637#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
638
195466dc
JF
639#ifndef __ASSEMBLY__
640
2c1b284e 641extern int direct_gbpages;
22ddfcaa 642void init_mem_mapping(void);
8d57470d 643void early_alloc_pgt_buf(void);
2c1b284e 644
4891645e
JF
645/* local pte updates need not use xchg for locking */
646static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
647{
648 pte_t res = *ptep;
649
650 /* Pure native function needs no input for mm, addr */
651 native_pte_clear(NULL, 0, ptep);
652 return res;
653}
654
f2d6bfe9
JW
655static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
656{
657 pmd_t res = *pmdp;
658
659 native_pmd_clear(pmdp);
660 return res;
661}
662
4891645e
JF
663static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
664 pte_t *ptep , pte_t pte)
665{
666 native_set_pte(ptep, pte);
667}
668
0a47de52
AA
669static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
670 pmd_t *pmdp , pmd_t pmd)
671{
672 native_set_pmd(pmdp, pmd);
673}
674
195466dc
JF
675#ifndef CONFIG_PARAVIRT
676/*
677 * Rules for using pte_update - it must be called after any PTE update which
678 * has not been done using the set_pte / clear_pte interfaces. It is used by
679 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
680 * updates should either be sets, clears, or set_pte_atomic for P->P
681 * transitions, which means this hook should only be called for user PTEs.
682 * This hook implies a P->P protection or access change has taken place, which
683 * requires a subsequent TLB flush. The notification can optionally be delayed
684 * until the TLB flush event by using the pte_update_defer form of the
685 * interface, but care must be taken to assure that the flush happens while
686 * still holding the same page table lock so that the shadow and primary pages
687 * do not become out of sync on SMP.
688 */
689#define pte_update(mm, addr, ptep) do { } while (0)
690#define pte_update_defer(mm, addr, ptep) do { } while (0)
691#endif
692
195466dc
JF
693/*
694 * We only update the dirty/accessed state if we set
695 * the dirty bit by hand in the kernel, since the hardware
696 * will do the accessed bit for us, and we don't want to
697 * race with other CPU's that might be updating the dirty
698 * bit at the same time.
699 */
bea41808
JF
700struct vm_area_struct;
701
195466dc 702#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
703extern int ptep_set_access_flags(struct vm_area_struct *vma,
704 unsigned long address, pte_t *ptep,
705 pte_t entry, int dirty);
195466dc
JF
706
707#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
708extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
709 unsigned long addr, pte_t *ptep);
195466dc
JF
710
711#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
712extern int ptep_clear_flush_young(struct vm_area_struct *vma,
713 unsigned long address, pte_t *ptep);
195466dc
JF
714
715#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
716static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
717 pte_t *ptep)
195466dc
JF
718{
719 pte_t pte = native_ptep_get_and_clear(ptep);
720 pte_update(mm, addr, ptep);
721 return pte;
722}
723
724#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
725static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
726 unsigned long addr, pte_t *ptep,
727 int full)
195466dc
JF
728{
729 pte_t pte;
730 if (full) {
731 /*
732 * Full address destruction in progress; paravirt does not
733 * care about updates and native needs no locking
734 */
735 pte = native_local_ptep_get_and_clear(ptep);
736 } else {
737 pte = ptep_get_and_clear(mm, addr, ptep);
738 }
739 return pte;
740}
741
742#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
743static inline void ptep_set_wrprotect(struct mm_struct *mm,
744 unsigned long addr, pte_t *ptep)
195466dc 745{
d8d89827 746 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
195466dc
JF
747 pte_update(mm, addr, ptep);
748}
749
2ac13462 750#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 751
f2d6bfe9
JW
752#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
753
754#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
755extern int pmdp_set_access_flags(struct vm_area_struct *vma,
756 unsigned long address, pmd_t *pmdp,
757 pmd_t entry, int dirty);
758
759#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
760extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
761 unsigned long addr, pmd_t *pmdp);
762
763#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
764extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
765 unsigned long address, pmd_t *pmdp);
766
767
768#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
769extern void pmdp_splitting_flush(struct vm_area_struct *vma,
770 unsigned long addr, pmd_t *pmdp);
771
772#define __HAVE_ARCH_PMD_WRITE
773static inline int pmd_write(pmd_t pmd)
774{
775 return pmd_flags(pmd) & _PAGE_RW;
776}
777
778#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
779static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr,
780 pmd_t *pmdp)
781{
782 pmd_t pmd = native_pmdp_get_and_clear(pmdp);
783 pmd_update(mm, addr, pmdp);
784 return pmd;
785}
786
787#define __HAVE_ARCH_PMDP_SET_WRPROTECT
788static inline void pmdp_set_wrprotect(struct mm_struct *mm,
789 unsigned long addr, pmd_t *pmdp)
790{
791 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
792 pmd_update(mm, addr, pmdp);
793}
794
85958b46
JF
795/*
796 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
797 *
798 * dst - pointer to pgd range anwhere on a pgd page
799 * src - ""
800 * count - the number of pgds to copy.
801 *
802 * dst and src can be on the same page, but the range must not overlap,
803 * and must not cross a page boundary.
804 */
805static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
806{
807 memcpy(dst, src, count * sizeof(pgd_t));
808}
809
4cbeb51b
DH
810#define PTE_SHIFT ilog2(PTRS_PER_PTE)
811static inline int page_level_shift(enum pg_level level)
812{
813 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
814}
815static inline unsigned long page_level_size(enum pg_level level)
816{
817 return 1UL << page_level_shift(level);
818}
819static inline unsigned long page_level_mask(enum pg_level level)
820{
821 return ~(page_level_size(level) - 1);
822}
85958b46 823
602e0186
KS
824/*
825 * The x86 doesn't have any external MMU info: the kernel page
826 * tables contain all the necessary information.
827 */
828static inline void update_mmu_cache(struct vm_area_struct *vma,
829 unsigned long addr, pte_t *ptep)
830{
831}
832static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
833 unsigned long addr, pmd_t *pmd)
834{
835}
85958b46 836
195466dc
JF
837#include <asm-generic/pgtable.h>
838#endif /* __ASSEMBLY__ */
839
1965aae3 840#endif /* _ASM_X86_PGTABLE_H */
This page took 0.667731 seconds and 5 git commands to generate.