pagemap: introduce pagemap_entry_t without pmshift bits
[deliverable/linux.git] / arch / x86 / include / asm / pgtable.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \
15 : (prot))
16
4614139c 17#ifndef __ASSEMBLY__
195466dc 18
55a6ca25
PA
19#include <asm/x86_init.h>
20
8405b122
JF
21/*
22 * ZERO_PAGE is a global shared page that is always zero: used
23 * for zero-mapped memory areas etc..
24 */
3cbaeafe 25extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
8405b122
JF
26#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
27
e3ed910d
JF
28extern spinlock_t pgd_lock;
29extern struct list_head pgd_list;
8405b122 30
617d34d9
JF
31extern struct mm_struct *pgd_page_get_mm(struct page *page);
32
54321d94
JF
33#ifdef CONFIG_PARAVIRT
34#include <asm/paravirt.h>
35#else /* !CONFIG_PARAVIRT */
36#define set_pte(ptep, pte) native_set_pte(ptep, pte)
37#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
2609ae6d 38#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
54321d94 39
54321d94
JF
40#define set_pte_atomic(ptep, pte) \
41 native_set_pte_atomic(ptep, pte)
42
43#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
44
45#ifndef __PAGETABLE_PUD_FOLDED
46#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
47#define pgd_clear(pgd) native_pgd_clear(pgd)
48#endif
49
50#ifndef set_pud
51# define set_pud(pudp, pud) native_set_pud(pudp, pud)
52#endif
53
54#ifndef __PAGETABLE_PMD_FOLDED
55#define pud_clear(pud) native_pud_clear(pud)
56#endif
57
58#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
59#define pmd_clear(pmd) native_pmd_clear(pmd)
60
61#define pte_update(mm, addr, ptep) do { } while (0)
62#define pte_update_defer(mm, addr, ptep) do { } while (0)
2609ae6d
AA
63#define pmd_update(mm, addr, ptep) do { } while (0)
64#define pmd_update_defer(mm, addr, ptep) do { } while (0)
54321d94 65
54321d94
JF
66#define pgd_val(x) native_pgd_val(x)
67#define __pgd(x) native_make_pgd(x)
68
69#ifndef __PAGETABLE_PUD_FOLDED
70#define pud_val(x) native_pud_val(x)
71#define __pud(x) native_make_pud(x)
72#endif
73
74#ifndef __PAGETABLE_PMD_FOLDED
75#define pmd_val(x) native_pmd_val(x)
76#define __pmd(x) native_make_pmd(x)
77#endif
78
79#define pte_val(x) native_pte_val(x)
80#define __pte(x) native_make_pte(x)
81
224101ed
JF
82#define arch_end_context_switch(prev) do {} while(0)
83
54321d94
JF
84#endif /* CONFIG_PARAVIRT */
85
4614139c
JF
86/*
87 * The following only work if pte_present() is true.
88 * Undefined behaviour if not..
89 */
3cbaeafe
JP
90static inline int pte_dirty(pte_t pte)
91{
a15af1c9 92 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
93}
94
95static inline int pte_young(pte_t pte)
96{
a15af1c9 97 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
98}
99
f2d6bfe9
JW
100static inline int pmd_young(pmd_t pmd)
101{
102 return pmd_flags(pmd) & _PAGE_ACCESSED;
103}
104
3cbaeafe
JP
105static inline int pte_write(pte_t pte)
106{
a15af1c9 107 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
108}
109
110static inline int pte_file(pte_t pte)
111{
a15af1c9 112 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
113}
114
115static inline int pte_huge(pte_t pte)
116{
a15af1c9 117 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
118}
119
3cbaeafe
JP
120static inline int pte_global(pte_t pte)
121{
a15af1c9 122 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
123}
124
125static inline int pte_exec(pte_t pte)
126{
a15af1c9 127 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
128}
129
7e675137
NP
130static inline int pte_special(pte_t pte)
131{
606ee44d 132 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
133}
134
91030ca1
HD
135static inline unsigned long pte_pfn(pte_t pte)
136{
137 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
138}
139
087975b0
AM
140static inline unsigned long pmd_pfn(pmd_t pmd)
141{
142 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
143}
144
0ee364eb
MG
145static inline unsigned long pud_pfn(pud_t pud)
146{
147 return (pud_val(pud) & PTE_PFN_MASK) >> PAGE_SHIFT;
148}
149
91030ca1
HD
150#define pte_page(pte) pfn_to_page(pte_pfn(pte))
151
3cbaeafe
JP
152static inline int pmd_large(pmd_t pte)
153{
027ef6c8 154 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
155}
156
f2d6bfe9
JW
157#ifdef CONFIG_TRANSPARENT_HUGEPAGE
158static inline int pmd_trans_splitting(pmd_t pmd)
159{
160 return pmd_val(pmd) & _PAGE_SPLITTING;
161}
162
163static inline int pmd_trans_huge(pmd_t pmd)
164{
165 return pmd_val(pmd) & _PAGE_PSE;
166}
4b7167b9
AA
167
168static inline int has_transparent_hugepage(void)
169{
170 return cpu_has_pse;
171}
f2d6bfe9
JW
172#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
173
6522869c
JF
174static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
175{
176 pteval_t v = native_pte_val(pte);
177
178 return native_make_pte(v | set);
179}
180
181static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
182{
183 pteval_t v = native_pte_val(pte);
184
185 return native_make_pte(v & ~clear);
186}
187
3cbaeafe
JP
188static inline pte_t pte_mkclean(pte_t pte)
189{
6522869c 190 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
191}
192
193static inline pte_t pte_mkold(pte_t pte)
194{
6522869c 195 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
196}
197
198static inline pte_t pte_wrprotect(pte_t pte)
199{
6522869c 200 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
201}
202
203static inline pte_t pte_mkexec(pte_t pte)
204{
6522869c 205 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
206}
207
208static inline pte_t pte_mkdirty(pte_t pte)
209{
6522869c 210 return pte_set_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
211}
212
213static inline pte_t pte_mkyoung(pte_t pte)
214{
6522869c 215 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
216}
217
218static inline pte_t pte_mkwrite(pte_t pte)
219{
6522869c 220 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
221}
222
223static inline pte_t pte_mkhuge(pte_t pte)
224{
6522869c 225 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
226}
227
228static inline pte_t pte_clrhuge(pte_t pte)
229{
6522869c 230 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
231}
232
233static inline pte_t pte_mkglobal(pte_t pte)
234{
6522869c 235 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
236}
237
238static inline pte_t pte_clrglobal(pte_t pte)
239{
6522869c 240 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 241}
4614139c 242
7e675137
NP
243static inline pte_t pte_mkspecial(pte_t pte)
244{
6522869c 245 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
246}
247
f2d6bfe9
JW
248static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
249{
250 pmdval_t v = native_pmd_val(pmd);
251
252 return __pmd(v | set);
253}
254
255static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
256{
257 pmdval_t v = native_pmd_val(pmd);
258
259 return __pmd(v & ~clear);
260}
261
262static inline pmd_t pmd_mkold(pmd_t pmd)
263{
264 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
265}
266
267static inline pmd_t pmd_wrprotect(pmd_t pmd)
268{
269 return pmd_clear_flags(pmd, _PAGE_RW);
270}
271
272static inline pmd_t pmd_mkdirty(pmd_t pmd)
273{
274 return pmd_set_flags(pmd, _PAGE_DIRTY);
275}
276
277static inline pmd_t pmd_mkhuge(pmd_t pmd)
278{
279 return pmd_set_flags(pmd, _PAGE_PSE);
280}
281
282static inline pmd_t pmd_mkyoung(pmd_t pmd)
283{
284 return pmd_set_flags(pmd, _PAGE_ACCESSED);
285}
286
287static inline pmd_t pmd_mkwrite(pmd_t pmd)
288{
289 return pmd_set_flags(pmd, _PAGE_RW);
290}
291
292static inline pmd_t pmd_mknotpresent(pmd_t pmd)
293{
294 return pmd_clear_flags(pmd, _PAGE_PRESENT);
295}
296
b534816b
JF
297/*
298 * Mask out unsupported bits in a present pgprot. Non-present pgprots
299 * can use those bits for other purposes, so leave them be.
300 */
301static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
302{
303 pgprotval_t protval = pgprot_val(pgprot);
304
305 if (protval & _PAGE_PRESENT)
306 protval &= __supported_pte_mask;
307
308 return protval;
309}
310
6fdc05d4
JF
311static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
312{
b534816b
JF
313 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
314 massage_pgprot(pgprot));
6fdc05d4
JF
315}
316
317static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
318{
b534816b
JF
319 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
320 massage_pgprot(pgprot));
6fdc05d4
JF
321}
322
38472311
IM
323static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
324{
325 pteval_t val = pte_val(pte);
326
327 /*
328 * Chop off the NX bit (if present), and add the NX portion of
329 * the newprot (if present):
330 */
1c12c4cf 331 val &= _PAGE_CHG_MASK;
b534816b 332 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
333
334 return __pte(val);
335}
336
c489f125
JW
337static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
338{
339 pmdval_t val = pmd_val(pmd);
340
341 val &= _HPAGE_CHG_MASK;
342 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
343
344 return __pmd(val);
345}
346
1c12c4cf
VP
347/* mprotect needs to preserve PAT bits when updating vm_page_prot */
348#define pgprot_modify pgprot_modify
349static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
350{
351 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
352 pgprotval_t addbits = pgprot_val(newprot);
353 return __pgprot(preservebits | addbits);
354}
355
77be1fab 356#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 357
b534816b 358#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 359
1adcaafe
SS
360static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
361 unsigned long flags,
362 unsigned long new_flags)
afc7d20c 363{
1adcaafe 364 /*
55a6ca25 365 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 366 */
8a271389 367 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
368 return 1;
369
afc7d20c 370 /*
371 * Certain new memtypes are not allowed with certain
372 * requested memtype:
373 * - request is uncached, return cannot be write-back
374 * - request is write-combine, return cannot be write-back
375 */
376 if ((flags == _PAGE_CACHE_UC_MINUS &&
377 new_flags == _PAGE_CACHE_WB) ||
378 (flags == _PAGE_CACHE_WC &&
379 new_flags == _PAGE_CACHE_WB)) {
380 return 0;
381 }
382
383 return 1;
384}
385
458a3e64
TH
386pmd_t *populate_extra_pmd(unsigned long vaddr);
387pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
388#endif /* __ASSEMBLY__ */
389
96a388de 390#ifdef CONFIG_X86_32
a1ce3928 391# include <asm/pgtable_32.h>
96a388de 392#else
a1ce3928 393# include <asm/pgtable_64.h>
96a388de 394#endif
6c386655 395
aca159db 396#ifndef __ASSEMBLY__
f476961c 397#include <linux/mm_types.h>
4cbeb51b 398#include <linux/log2.h>
aca159db 399
a034a010
JF
400static inline int pte_none(pte_t pte)
401{
402 return !pte.pte;
403}
404
8de01da3
JF
405#define __HAVE_ARCH_PTE_SAME
406static inline int pte_same(pte_t a, pte_t b)
407{
408 return a.pte == b.pte;
409}
410
7c683851
JF
411static inline int pte_present(pte_t a)
412{
be3a7284
AA
413 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE |
414 _PAGE_NUMA);
7c683851
JF
415}
416
2c3cf556
RR
417#define pte_accessible pte_accessible
418static inline int pte_accessible(pte_t a)
419{
420 return pte_flags(a) & _PAGE_PRESENT;
421}
422
eb63657e 423static inline int pte_hidden(pte_t pte)
dfec072e 424{
eb63657e 425 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
426}
427
649e8ef6
JF
428static inline int pmd_present(pmd_t pmd)
429{
027ef6c8
AA
430 /*
431 * Checking for _PAGE_PSE is needed too because
432 * split_huge_page will temporarily clear the present bit (but
433 * the _PAGE_PSE flag will remain set at all times while the
434 * _PAGE_PRESENT bit is clear).
435 */
be3a7284
AA
436 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE |
437 _PAGE_NUMA);
649e8ef6
JF
438}
439
4fea801a
JF
440static inline int pmd_none(pmd_t pmd)
441{
442 /* Only check low word on 32-bit platforms, since it might be
443 out of sync with upper half. */
26c8e317 444 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
445}
446
3ffb3564
JF
447static inline unsigned long pmd_page_vaddr(pmd_t pmd)
448{
449 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
450}
451
e5f7f202
IM
452/*
453 * Currently stuck as a macro due to indirect forward reference to
454 * linux/mmzone.h's __section_mem_map_addr() definition:
455 */
db3eb96f 456#define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT)
20063ca4 457
e24d7eee
JF
458/*
459 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
460 *
461 * this macro returns the index of the entry in the pmd page which would
462 * control the given virtual address
463 */
ce0c0f9e 464static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
465{
466 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
467}
468
97e2817d
JF
469/*
470 * Conversion functions: convert a page and protection to a page entry,
471 * and a page entry and page directory to the page they refer to.
472 *
473 * (Currently stuck as a macro because of indirect forward reference
474 * to linux/mm.h:page_to_nid())
475 */
476#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
477
346309cf
JF
478/*
479 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
480 *
481 * this function returns the index of the entry in the pte page which would
482 * control the given virtual address
483 */
ce0c0f9e 484static inline unsigned long pte_index(unsigned long address)
346309cf
JF
485{
486 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
487}
488
3fbc2444
JF
489static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
490{
491 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
492}
493
99510238
JF
494static inline int pmd_bad(pmd_t pmd)
495{
be3a7284
AA
496#ifdef CONFIG_NUMA_BALANCING
497 /* pmd_numa check */
498 if ((pmd_flags(pmd) & (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA)
499 return 0;
500#endif
18a7a199 501 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
502}
503
cc290ca3
JF
504static inline unsigned long pages_to_mb(unsigned long npg)
505{
506 return npg >> (20 - PAGE_SHIFT);
507}
508
5ba7c913 509#if PAGETABLE_LEVELS > 2
deb79cfb
JF
510static inline int pud_none(pud_t pud)
511{
26c8e317 512 return native_pud_val(pud) == 0;
deb79cfb
JF
513}
514
5ba7c913
JF
515static inline int pud_present(pud_t pud)
516{
18a7a199 517 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 518}
6fff47e3
JF
519
520static inline unsigned long pud_page_vaddr(pud_t pud)
521{
522 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
523}
f476961c 524
e5f7f202
IM
525/*
526 * Currently stuck as a macro due to indirect forward reference to
527 * linux/mmzone.h's __section_mem_map_addr() definition:
528 */
529#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
01ade20d
JF
530
531/* Find an entry in the second-level page table.. */
532static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
533{
534 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
535}
3180fba0 536
3f6cbef1
JF
537static inline int pud_large(pud_t pud)
538{
e2f5bda9 539 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
540 (_PAGE_PSE | _PAGE_PRESENT);
541}
a61bb29a
JF
542
543static inline int pud_bad(pud_t pud)
544{
18a7a199 545 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 546}
e2f5bda9
JF
547#else
548static inline int pud_large(pud_t pud)
549{
550 return 0;
551}
5ba7c913
JF
552#endif /* PAGETABLE_LEVELS > 2 */
553
9f38d7e8
JF
554#if PAGETABLE_LEVELS > 3
555static inline int pgd_present(pgd_t pgd)
556{
18a7a199 557 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 558}
c5f040b1
JF
559
560static inline unsigned long pgd_page_vaddr(pgd_t pgd)
561{
562 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
563}
777cba16 564
e5f7f202
IM
565/*
566 * Currently stuck as a macro due to indirect forward reference to
567 * linux/mmzone.h's __section_mem_map_addr() definition:
568 */
569#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
7cfb8102
JF
570
571/* to find an entry in a page-table-directory. */
ce0c0f9e 572static inline unsigned long pud_index(unsigned long address)
7cfb8102
JF
573{
574 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
575}
3d081b18
JF
576
577static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
578{
579 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
580}
30f10316
JF
581
582static inline int pgd_bad(pgd_t pgd)
583{
18a7a199 584 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 585}
7325cc2e
JF
586
587static inline int pgd_none(pgd_t pgd)
588{
26c8e317 589 return !native_pgd_val(pgd);
7325cc2e 590}
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591#endif /* PAGETABLE_LEVELS > 3 */
592
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593#endif /* __ASSEMBLY__ */
594
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595/*
596 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
597 *
598 * this macro returns the index of the entry in the pgd page which would
599 * control the given virtual address
600 */
601#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
602
603/*
604 * pgd_offset() returns a (pgd_t *)
605 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
606 */
607#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
608/*
609 * a shortcut which implies the use of the kernel's pgd, instead
610 * of a process's
611 */
612#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
613
614
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615#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
616#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
617
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618#ifndef __ASSEMBLY__
619
2c1b284e 620extern int direct_gbpages;
22ddfcaa 621void init_mem_mapping(void);
8d57470d 622void early_alloc_pgt_buf(void);
2c1b284e 623
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624/* local pte updates need not use xchg for locking */
625static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
626{
627 pte_t res = *ptep;
628
629 /* Pure native function needs no input for mm, addr */
630 native_pte_clear(NULL, 0, ptep);
631 return res;
632}
633
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634static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
635{
636 pmd_t res = *pmdp;
637
638 native_pmd_clear(pmdp);
639 return res;
640}
641
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642static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
643 pte_t *ptep , pte_t pte)
644{
645 native_set_pte(ptep, pte);
646}
647
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648static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
649 pmd_t *pmdp , pmd_t pmd)
650{
651 native_set_pmd(pmdp, pmd);
652}
653
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654#ifndef CONFIG_PARAVIRT
655/*
656 * Rules for using pte_update - it must be called after any PTE update which
657 * has not been done using the set_pte / clear_pte interfaces. It is used by
658 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
659 * updates should either be sets, clears, or set_pte_atomic for P->P
660 * transitions, which means this hook should only be called for user PTEs.
661 * This hook implies a P->P protection or access change has taken place, which
662 * requires a subsequent TLB flush. The notification can optionally be delayed
663 * until the TLB flush event by using the pte_update_defer form of the
664 * interface, but care must be taken to assure that the flush happens while
665 * still holding the same page table lock so that the shadow and primary pages
666 * do not become out of sync on SMP.
667 */
668#define pte_update(mm, addr, ptep) do { } while (0)
669#define pte_update_defer(mm, addr, ptep) do { } while (0)
670#endif
671
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672/*
673 * We only update the dirty/accessed state if we set
674 * the dirty bit by hand in the kernel, since the hardware
675 * will do the accessed bit for us, and we don't want to
676 * race with other CPU's that might be updating the dirty
677 * bit at the same time.
678 */
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679struct vm_area_struct;
680
195466dc 681#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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682extern int ptep_set_access_flags(struct vm_area_struct *vma,
683 unsigned long address, pte_t *ptep,
684 pte_t entry, int dirty);
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685
686#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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687extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
688 unsigned long addr, pte_t *ptep);
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689
690#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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691extern int ptep_clear_flush_young(struct vm_area_struct *vma,
692 unsigned long address, pte_t *ptep);
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693
694#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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695static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
696 pte_t *ptep)
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697{
698 pte_t pte = native_ptep_get_and_clear(ptep);
699 pte_update(mm, addr, ptep);
700 return pte;
701}
702
703#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
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704static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
705 unsigned long addr, pte_t *ptep,
706 int full)
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707{
708 pte_t pte;
709 if (full) {
710 /*
711 * Full address destruction in progress; paravirt does not
712 * care about updates and native needs no locking
713 */
714 pte = native_local_ptep_get_and_clear(ptep);
715 } else {
716 pte = ptep_get_and_clear(mm, addr, ptep);
717 }
718 return pte;
719}
720
721#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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722static inline void ptep_set_wrprotect(struct mm_struct *mm,
723 unsigned long addr, pte_t *ptep)
195466dc 724{
d8d89827 725 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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726 pte_update(mm, addr, ptep);
727}
728
2ac13462 729#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 730
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731#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
732
733#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
734extern int pmdp_set_access_flags(struct vm_area_struct *vma,
735 unsigned long address, pmd_t *pmdp,
736 pmd_t entry, int dirty);
737
738#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
739extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
740 unsigned long addr, pmd_t *pmdp);
741
742#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
743extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
744 unsigned long address, pmd_t *pmdp);
745
746
747#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
748extern void pmdp_splitting_flush(struct vm_area_struct *vma,
749 unsigned long addr, pmd_t *pmdp);
750
751#define __HAVE_ARCH_PMD_WRITE
752static inline int pmd_write(pmd_t pmd)
753{
754 return pmd_flags(pmd) & _PAGE_RW;
755}
756
757#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
758static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr,
759 pmd_t *pmdp)
760{
761 pmd_t pmd = native_pmdp_get_and_clear(pmdp);
762 pmd_update(mm, addr, pmdp);
763 return pmd;
764}
765
766#define __HAVE_ARCH_PMDP_SET_WRPROTECT
767static inline void pmdp_set_wrprotect(struct mm_struct *mm,
768 unsigned long addr, pmd_t *pmdp)
769{
770 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
771 pmd_update(mm, addr, pmdp);
772}
773
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774/*
775 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
776 *
777 * dst - pointer to pgd range anwhere on a pgd page
778 * src - ""
779 * count - the number of pgds to copy.
780 *
781 * dst and src can be on the same page, but the range must not overlap,
782 * and must not cross a page boundary.
783 */
784static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
785{
786 memcpy(dst, src, count * sizeof(pgd_t));
787}
788
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789#define PTE_SHIFT ilog2(PTRS_PER_PTE)
790static inline int page_level_shift(enum pg_level level)
791{
792 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
793}
794static inline unsigned long page_level_size(enum pg_level level)
795{
796 return 1UL << page_level_shift(level);
797}
798static inline unsigned long page_level_mask(enum pg_level level)
799{
800 return ~(page_level_size(level) - 1);
801}
85958b46 802
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803/*
804 * The x86 doesn't have any external MMU info: the kernel page
805 * tables contain all the necessary information.
806 */
807static inline void update_mmu_cache(struct vm_area_struct *vma,
808 unsigned long addr, pte_t *ptep)
809{
810}
811static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
812 unsigned long addr, pmd_t *pmd)
813{
814}
85958b46 815
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816#include <asm-generic/pgtable.h>
817#endif /* __ASSEMBLY__ */
818
1965aae3 819#endif /* _ASM_X86_PGTABLE_H */
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