mm/page-writeback.c: add strictlimit feature
[deliverable/linux.git] / arch / x86 / include / asm / pgtable.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \
15 : (prot))
16
4614139c 17#ifndef __ASSEMBLY__
195466dc 18
55a6ca25
PA
19#include <asm/x86_init.h>
20
8405b122
JF
21/*
22 * ZERO_PAGE is a global shared page that is always zero: used
23 * for zero-mapped memory areas etc..
24 */
277d5b40
AK
25extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
26 __visible;
8405b122
JF
27#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
28
e3ed910d
JF
29extern spinlock_t pgd_lock;
30extern struct list_head pgd_list;
8405b122 31
617d34d9
JF
32extern struct mm_struct *pgd_page_get_mm(struct page *page);
33
54321d94
JF
34#ifdef CONFIG_PARAVIRT
35#include <asm/paravirt.h>
36#else /* !CONFIG_PARAVIRT */
37#define set_pte(ptep, pte) native_set_pte(ptep, pte)
38#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
2609ae6d 39#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
54321d94 40
54321d94
JF
41#define set_pte_atomic(ptep, pte) \
42 native_set_pte_atomic(ptep, pte)
43
44#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
45
46#ifndef __PAGETABLE_PUD_FOLDED
47#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
48#define pgd_clear(pgd) native_pgd_clear(pgd)
49#endif
50
51#ifndef set_pud
52# define set_pud(pudp, pud) native_set_pud(pudp, pud)
53#endif
54
55#ifndef __PAGETABLE_PMD_FOLDED
56#define pud_clear(pud) native_pud_clear(pud)
57#endif
58
59#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
60#define pmd_clear(pmd) native_pmd_clear(pmd)
61
62#define pte_update(mm, addr, ptep) do { } while (0)
63#define pte_update_defer(mm, addr, ptep) do { } while (0)
2609ae6d
AA
64#define pmd_update(mm, addr, ptep) do { } while (0)
65#define pmd_update_defer(mm, addr, ptep) do { } while (0)
54321d94 66
54321d94
JF
67#define pgd_val(x) native_pgd_val(x)
68#define __pgd(x) native_make_pgd(x)
69
70#ifndef __PAGETABLE_PUD_FOLDED
71#define pud_val(x) native_pud_val(x)
72#define __pud(x) native_make_pud(x)
73#endif
74
75#ifndef __PAGETABLE_PMD_FOLDED
76#define pmd_val(x) native_pmd_val(x)
77#define __pmd(x) native_make_pmd(x)
78#endif
79
80#define pte_val(x) native_pte_val(x)
81#define __pte(x) native_make_pte(x)
82
224101ed
JF
83#define arch_end_context_switch(prev) do {} while(0)
84
54321d94
JF
85#endif /* CONFIG_PARAVIRT */
86
4614139c
JF
87/*
88 * The following only work if pte_present() is true.
89 * Undefined behaviour if not..
90 */
3cbaeafe
JP
91static inline int pte_dirty(pte_t pte)
92{
a15af1c9 93 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
94}
95
96static inline int pte_young(pte_t pte)
97{
a15af1c9 98 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
99}
100
f2d6bfe9
JW
101static inline int pmd_young(pmd_t pmd)
102{
103 return pmd_flags(pmd) & _PAGE_ACCESSED;
104}
105
3cbaeafe
JP
106static inline int pte_write(pte_t pte)
107{
a15af1c9 108 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
109}
110
111static inline int pte_file(pte_t pte)
112{
a15af1c9 113 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
114}
115
116static inline int pte_huge(pte_t pte)
117{
a15af1c9 118 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
119}
120
3cbaeafe
JP
121static inline int pte_global(pte_t pte)
122{
a15af1c9 123 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
124}
125
126static inline int pte_exec(pte_t pte)
127{
a15af1c9 128 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
129}
130
7e675137
NP
131static inline int pte_special(pte_t pte)
132{
606ee44d 133 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
134}
135
91030ca1
HD
136static inline unsigned long pte_pfn(pte_t pte)
137{
138 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
139}
140
087975b0
AM
141static inline unsigned long pmd_pfn(pmd_t pmd)
142{
143 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
144}
145
0ee364eb
MG
146static inline unsigned long pud_pfn(pud_t pud)
147{
148 return (pud_val(pud) & PTE_PFN_MASK) >> PAGE_SHIFT;
149}
150
91030ca1
HD
151#define pte_page(pte) pfn_to_page(pte_pfn(pte))
152
3cbaeafe
JP
153static inline int pmd_large(pmd_t pte)
154{
027ef6c8 155 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
156}
157
f2d6bfe9
JW
158#ifdef CONFIG_TRANSPARENT_HUGEPAGE
159static inline int pmd_trans_splitting(pmd_t pmd)
160{
161 return pmd_val(pmd) & _PAGE_SPLITTING;
162}
163
164static inline int pmd_trans_huge(pmd_t pmd)
165{
166 return pmd_val(pmd) & _PAGE_PSE;
167}
4b7167b9
AA
168
169static inline int has_transparent_hugepage(void)
170{
171 return cpu_has_pse;
172}
f2d6bfe9
JW
173#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
174
6522869c
JF
175static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
176{
177 pteval_t v = native_pte_val(pte);
178
179 return native_make_pte(v | set);
180}
181
182static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
183{
184 pteval_t v = native_pte_val(pte);
185
186 return native_make_pte(v & ~clear);
187}
188
3cbaeafe
JP
189static inline pte_t pte_mkclean(pte_t pte)
190{
6522869c 191 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
192}
193
194static inline pte_t pte_mkold(pte_t pte)
195{
6522869c 196 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
197}
198
199static inline pte_t pte_wrprotect(pte_t pte)
200{
6522869c 201 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
202}
203
204static inline pte_t pte_mkexec(pte_t pte)
205{
6522869c 206 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
207}
208
209static inline pte_t pte_mkdirty(pte_t pte)
210{
0f8975ec 211 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
212}
213
214static inline pte_t pte_mkyoung(pte_t pte)
215{
6522869c 216 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
217}
218
219static inline pte_t pte_mkwrite(pte_t pte)
220{
6522869c 221 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
222}
223
224static inline pte_t pte_mkhuge(pte_t pte)
225{
6522869c 226 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
227}
228
229static inline pte_t pte_clrhuge(pte_t pte)
230{
6522869c 231 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
232}
233
234static inline pte_t pte_mkglobal(pte_t pte)
235{
6522869c 236 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
237}
238
239static inline pte_t pte_clrglobal(pte_t pte)
240{
6522869c 241 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 242}
4614139c 243
7e675137
NP
244static inline pte_t pte_mkspecial(pte_t pte)
245{
6522869c 246 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
247}
248
f2d6bfe9
JW
249static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
250{
251 pmdval_t v = native_pmd_val(pmd);
252
253 return __pmd(v | set);
254}
255
256static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
257{
258 pmdval_t v = native_pmd_val(pmd);
259
260 return __pmd(v & ~clear);
261}
262
263static inline pmd_t pmd_mkold(pmd_t pmd)
264{
265 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
266}
267
268static inline pmd_t pmd_wrprotect(pmd_t pmd)
269{
270 return pmd_clear_flags(pmd, _PAGE_RW);
271}
272
273static inline pmd_t pmd_mkdirty(pmd_t pmd)
274{
0f8975ec 275 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
276}
277
278static inline pmd_t pmd_mkhuge(pmd_t pmd)
279{
280 return pmd_set_flags(pmd, _PAGE_PSE);
281}
282
283static inline pmd_t pmd_mkyoung(pmd_t pmd)
284{
285 return pmd_set_flags(pmd, _PAGE_ACCESSED);
286}
287
288static inline pmd_t pmd_mkwrite(pmd_t pmd)
289{
290 return pmd_set_flags(pmd, _PAGE_RW);
291}
292
293static inline pmd_t pmd_mknotpresent(pmd_t pmd)
294{
295 return pmd_clear_flags(pmd, _PAGE_PRESENT);
296}
297
0f8975ec
PE
298static inline int pte_soft_dirty(pte_t pte)
299{
300 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
301}
302
303static inline int pmd_soft_dirty(pmd_t pmd)
304{
305 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
306}
307
308static inline pte_t pte_mksoft_dirty(pte_t pte)
309{
310 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
311}
312
313static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
314{
315 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
316}
317
179ef71c
CG
318static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
319{
320 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
321}
322
323static inline int pte_swp_soft_dirty(pte_t pte)
324{
325 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
326}
327
328static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
329{
330 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
331}
332
41bb3476
CG
333static inline pte_t pte_file_clear_soft_dirty(pte_t pte)
334{
335 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
336}
337
338static inline pte_t pte_file_mksoft_dirty(pte_t pte)
339{
340 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
341}
342
343static inline int pte_file_soft_dirty(pte_t pte)
344{
345 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
346}
347
b534816b
JF
348/*
349 * Mask out unsupported bits in a present pgprot. Non-present pgprots
350 * can use those bits for other purposes, so leave them be.
351 */
352static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
353{
354 pgprotval_t protval = pgprot_val(pgprot);
355
356 if (protval & _PAGE_PRESENT)
357 protval &= __supported_pte_mask;
358
359 return protval;
360}
361
6fdc05d4
JF
362static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
363{
b534816b
JF
364 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
365 massage_pgprot(pgprot));
6fdc05d4
JF
366}
367
368static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
369{
b534816b
JF
370 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
371 massage_pgprot(pgprot));
6fdc05d4
JF
372}
373
38472311
IM
374static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
375{
376 pteval_t val = pte_val(pte);
377
378 /*
379 * Chop off the NX bit (if present), and add the NX portion of
380 * the newprot (if present):
381 */
1c12c4cf 382 val &= _PAGE_CHG_MASK;
b534816b 383 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
384
385 return __pte(val);
386}
387
c489f125
JW
388static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
389{
390 pmdval_t val = pmd_val(pmd);
391
392 val &= _HPAGE_CHG_MASK;
393 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
394
395 return __pmd(val);
396}
397
1c12c4cf
VP
398/* mprotect needs to preserve PAT bits when updating vm_page_prot */
399#define pgprot_modify pgprot_modify
400static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
401{
402 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
403 pgprotval_t addbits = pgprot_val(newprot);
404 return __pgprot(preservebits | addbits);
405}
406
77be1fab 407#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 408
b534816b 409#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 410
1adcaafe
SS
411static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
412 unsigned long flags,
413 unsigned long new_flags)
afc7d20c 414{
1adcaafe 415 /*
55a6ca25 416 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 417 */
8a271389 418 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
419 return 1;
420
afc7d20c 421 /*
422 * Certain new memtypes are not allowed with certain
423 * requested memtype:
424 * - request is uncached, return cannot be write-back
425 * - request is write-combine, return cannot be write-back
426 */
427 if ((flags == _PAGE_CACHE_UC_MINUS &&
428 new_flags == _PAGE_CACHE_WB) ||
429 (flags == _PAGE_CACHE_WC &&
430 new_flags == _PAGE_CACHE_WB)) {
431 return 0;
432 }
433
434 return 1;
435}
436
458a3e64
TH
437pmd_t *populate_extra_pmd(unsigned long vaddr);
438pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
439#endif /* __ASSEMBLY__ */
440
96a388de 441#ifdef CONFIG_X86_32
a1ce3928 442# include <asm/pgtable_32.h>
96a388de 443#else
a1ce3928 444# include <asm/pgtable_64.h>
96a388de 445#endif
6c386655 446
aca159db 447#ifndef __ASSEMBLY__
f476961c 448#include <linux/mm_types.h>
4cbeb51b 449#include <linux/log2.h>
aca159db 450
a034a010
JF
451static inline int pte_none(pte_t pte)
452{
453 return !pte.pte;
454}
455
8de01da3
JF
456#define __HAVE_ARCH_PTE_SAME
457static inline int pte_same(pte_t a, pte_t b)
458{
459 return a.pte == b.pte;
460}
461
7c683851
JF
462static inline int pte_present(pte_t a)
463{
be3a7284
AA
464 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE |
465 _PAGE_NUMA);
7c683851
JF
466}
467
2c3cf556
RR
468#define pte_accessible pte_accessible
469static inline int pte_accessible(pte_t a)
470{
471 return pte_flags(a) & _PAGE_PRESENT;
472}
473
eb63657e 474static inline int pte_hidden(pte_t pte)
dfec072e 475{
eb63657e 476 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
477}
478
649e8ef6
JF
479static inline int pmd_present(pmd_t pmd)
480{
027ef6c8
AA
481 /*
482 * Checking for _PAGE_PSE is needed too because
483 * split_huge_page will temporarily clear the present bit (but
484 * the _PAGE_PSE flag will remain set at all times while the
485 * _PAGE_PRESENT bit is clear).
486 */
be3a7284
AA
487 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE |
488 _PAGE_NUMA);
649e8ef6
JF
489}
490
4fea801a
JF
491static inline int pmd_none(pmd_t pmd)
492{
493 /* Only check low word on 32-bit platforms, since it might be
494 out of sync with upper half. */
26c8e317 495 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
496}
497
3ffb3564
JF
498static inline unsigned long pmd_page_vaddr(pmd_t pmd)
499{
500 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
501}
502
e5f7f202
IM
503/*
504 * Currently stuck as a macro due to indirect forward reference to
505 * linux/mmzone.h's __section_mem_map_addr() definition:
506 */
db3eb96f 507#define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT)
20063ca4 508
e24d7eee
JF
509/*
510 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
511 *
512 * this macro returns the index of the entry in the pmd page which would
513 * control the given virtual address
514 */
ce0c0f9e 515static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
516{
517 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
518}
519
97e2817d
JF
520/*
521 * Conversion functions: convert a page and protection to a page entry,
522 * and a page entry and page directory to the page they refer to.
523 *
524 * (Currently stuck as a macro because of indirect forward reference
525 * to linux/mm.h:page_to_nid())
526 */
527#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
528
346309cf
JF
529/*
530 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
531 *
532 * this function returns the index of the entry in the pte page which would
533 * control the given virtual address
534 */
ce0c0f9e 535static inline unsigned long pte_index(unsigned long address)
346309cf
JF
536{
537 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
538}
539
3fbc2444
JF
540static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
541{
542 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
543}
544
99510238
JF
545static inline int pmd_bad(pmd_t pmd)
546{
be3a7284
AA
547#ifdef CONFIG_NUMA_BALANCING
548 /* pmd_numa check */
549 if ((pmd_flags(pmd) & (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA)
550 return 0;
551#endif
18a7a199 552 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
553}
554
cc290ca3
JF
555static inline unsigned long pages_to_mb(unsigned long npg)
556{
557 return npg >> (20 - PAGE_SHIFT);
558}
559
5ba7c913 560#if PAGETABLE_LEVELS > 2
deb79cfb
JF
561static inline int pud_none(pud_t pud)
562{
26c8e317 563 return native_pud_val(pud) == 0;
deb79cfb
JF
564}
565
5ba7c913
JF
566static inline int pud_present(pud_t pud)
567{
18a7a199 568 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 569}
6fff47e3
JF
570
571static inline unsigned long pud_page_vaddr(pud_t pud)
572{
573 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
574}
f476961c 575
e5f7f202
IM
576/*
577 * Currently stuck as a macro due to indirect forward reference to
578 * linux/mmzone.h's __section_mem_map_addr() definition:
579 */
580#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
01ade20d
JF
581
582/* Find an entry in the second-level page table.. */
583static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
584{
585 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
586}
3180fba0 587
3f6cbef1
JF
588static inline int pud_large(pud_t pud)
589{
e2f5bda9 590 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
591 (_PAGE_PSE | _PAGE_PRESENT);
592}
a61bb29a
JF
593
594static inline int pud_bad(pud_t pud)
595{
18a7a199 596 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 597}
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598#else
599static inline int pud_large(pud_t pud)
600{
601 return 0;
602}
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603#endif /* PAGETABLE_LEVELS > 2 */
604
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605#if PAGETABLE_LEVELS > 3
606static inline int pgd_present(pgd_t pgd)
607{
18a7a199 608 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 609}
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610
611static inline unsigned long pgd_page_vaddr(pgd_t pgd)
612{
613 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
614}
777cba16 615
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IM
616/*
617 * Currently stuck as a macro due to indirect forward reference to
618 * linux/mmzone.h's __section_mem_map_addr() definition:
619 */
620#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
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621
622/* to find an entry in a page-table-directory. */
ce0c0f9e 623static inline unsigned long pud_index(unsigned long address)
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624{
625 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
626}
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627
628static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
629{
630 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
631}
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JF
632
633static inline int pgd_bad(pgd_t pgd)
634{
18a7a199 635 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 636}
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637
638static inline int pgd_none(pgd_t pgd)
639{
26c8e317 640 return !native_pgd_val(pgd);
7325cc2e 641}
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642#endif /* PAGETABLE_LEVELS > 3 */
643
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644#endif /* __ASSEMBLY__ */
645
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646/*
647 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
648 *
649 * this macro returns the index of the entry in the pgd page which would
650 * control the given virtual address
651 */
652#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
653
654/*
655 * pgd_offset() returns a (pgd_t *)
656 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
657 */
658#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
659/*
660 * a shortcut which implies the use of the kernel's pgd, instead
661 * of a process's
662 */
663#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
664
665
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666#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
667#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
668
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669#ifndef __ASSEMBLY__
670
2c1b284e 671extern int direct_gbpages;
22ddfcaa 672void init_mem_mapping(void);
8d57470d 673void early_alloc_pgt_buf(void);
2c1b284e 674
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JF
675/* local pte updates need not use xchg for locking */
676static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
677{
678 pte_t res = *ptep;
679
680 /* Pure native function needs no input for mm, addr */
681 native_pte_clear(NULL, 0, ptep);
682 return res;
683}
684
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685static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
686{
687 pmd_t res = *pmdp;
688
689 native_pmd_clear(pmdp);
690 return res;
691}
692
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693static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
694 pte_t *ptep , pte_t pte)
695{
696 native_set_pte(ptep, pte);
697}
698
0a47de52
AA
699static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
700 pmd_t *pmdp , pmd_t pmd)
701{
702 native_set_pmd(pmdp, pmd);
703}
704
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705#ifndef CONFIG_PARAVIRT
706/*
707 * Rules for using pte_update - it must be called after any PTE update which
708 * has not been done using the set_pte / clear_pte interfaces. It is used by
709 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
710 * updates should either be sets, clears, or set_pte_atomic for P->P
711 * transitions, which means this hook should only be called for user PTEs.
712 * This hook implies a P->P protection or access change has taken place, which
713 * requires a subsequent TLB flush. The notification can optionally be delayed
714 * until the TLB flush event by using the pte_update_defer form of the
715 * interface, but care must be taken to assure that the flush happens while
716 * still holding the same page table lock so that the shadow and primary pages
717 * do not become out of sync on SMP.
718 */
719#define pte_update(mm, addr, ptep) do { } while (0)
720#define pte_update_defer(mm, addr, ptep) do { } while (0)
721#endif
722
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723/*
724 * We only update the dirty/accessed state if we set
725 * the dirty bit by hand in the kernel, since the hardware
726 * will do the accessed bit for us, and we don't want to
727 * race with other CPU's that might be updating the dirty
728 * bit at the same time.
729 */
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730struct vm_area_struct;
731
195466dc 732#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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733extern int ptep_set_access_flags(struct vm_area_struct *vma,
734 unsigned long address, pte_t *ptep,
735 pte_t entry, int dirty);
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736
737#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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738extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
739 unsigned long addr, pte_t *ptep);
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740
741#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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JF
742extern int ptep_clear_flush_young(struct vm_area_struct *vma,
743 unsigned long address, pte_t *ptep);
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744
745#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
746static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
747 pte_t *ptep)
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JF
748{
749 pte_t pte = native_ptep_get_and_clear(ptep);
750 pte_update(mm, addr, ptep);
751 return pte;
752}
753
754#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
755static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
756 unsigned long addr, pte_t *ptep,
757 int full)
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JF
758{
759 pte_t pte;
760 if (full) {
761 /*
762 * Full address destruction in progress; paravirt does not
763 * care about updates and native needs no locking
764 */
765 pte = native_local_ptep_get_and_clear(ptep);
766 } else {
767 pte = ptep_get_and_clear(mm, addr, ptep);
768 }
769 return pte;
770}
771
772#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
773static inline void ptep_set_wrprotect(struct mm_struct *mm,
774 unsigned long addr, pte_t *ptep)
195466dc 775{
d8d89827 776 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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JF
777 pte_update(mm, addr, ptep);
778}
779
2ac13462 780#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 781
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782#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
783
784#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
785extern int pmdp_set_access_flags(struct vm_area_struct *vma,
786 unsigned long address, pmd_t *pmdp,
787 pmd_t entry, int dirty);
788
789#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
790extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
791 unsigned long addr, pmd_t *pmdp);
792
793#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
794extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
795 unsigned long address, pmd_t *pmdp);
796
797
798#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
799extern void pmdp_splitting_flush(struct vm_area_struct *vma,
800 unsigned long addr, pmd_t *pmdp);
801
802#define __HAVE_ARCH_PMD_WRITE
803static inline int pmd_write(pmd_t pmd)
804{
805 return pmd_flags(pmd) & _PAGE_RW;
806}
807
808#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
809static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr,
810 pmd_t *pmdp)
811{
812 pmd_t pmd = native_pmdp_get_and_clear(pmdp);
813 pmd_update(mm, addr, pmdp);
814 return pmd;
815}
816
817#define __HAVE_ARCH_PMDP_SET_WRPROTECT
818static inline void pmdp_set_wrprotect(struct mm_struct *mm,
819 unsigned long addr, pmd_t *pmdp)
820{
821 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
822 pmd_update(mm, addr, pmdp);
823}
824
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JF
825/*
826 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
827 *
828 * dst - pointer to pgd range anwhere on a pgd page
829 * src - ""
830 * count - the number of pgds to copy.
831 *
832 * dst and src can be on the same page, but the range must not overlap,
833 * and must not cross a page boundary.
834 */
835static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
836{
837 memcpy(dst, src, count * sizeof(pgd_t));
838}
839
4cbeb51b
DH
840#define PTE_SHIFT ilog2(PTRS_PER_PTE)
841static inline int page_level_shift(enum pg_level level)
842{
843 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
844}
845static inline unsigned long page_level_size(enum pg_level level)
846{
847 return 1UL << page_level_shift(level);
848}
849static inline unsigned long page_level_mask(enum pg_level level)
850{
851 return ~(page_level_size(level) - 1);
852}
85958b46 853
602e0186
KS
854/*
855 * The x86 doesn't have any external MMU info: the kernel page
856 * tables contain all the necessary information.
857 */
858static inline void update_mmu_cache(struct vm_area_struct *vma,
859 unsigned long addr, pte_t *ptep)
860{
861}
862static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
863 unsigned long addr, pmd_t *pmd)
864{
865}
85958b46 866
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867#include <asm-generic/pgtable.h>
868#endif /* __ASSEMBLY__ */
869
1965aae3 870#endif /* _ASM_X86_PGTABLE_H */
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