x86: Use new cache mode type in asm/pgtable.h
[deliverable/linux.git] / arch / x86 / include / asm / pgtable.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
d85f3334
JG
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
8a7b12f7 16 : (prot))
17
4614139c 18#ifndef __ASSEMBLY__
55a6ca25
PA
19#include <asm/x86_init.h>
20
ef6bea6d
BP
21void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
22
8405b122
JF
23/*
24 * ZERO_PAGE is a global shared page that is always zero: used
25 * for zero-mapped memory areas etc..
26 */
277d5b40
AK
27extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
28 __visible;
8405b122
JF
29#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
30
e3ed910d
JF
31extern spinlock_t pgd_lock;
32extern struct list_head pgd_list;
8405b122 33
617d34d9
JF
34extern struct mm_struct *pgd_page_get_mm(struct page *page);
35
54321d94
JF
36#ifdef CONFIG_PARAVIRT
37#include <asm/paravirt.h>
38#else /* !CONFIG_PARAVIRT */
39#define set_pte(ptep, pte) native_set_pte(ptep, pte)
40#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
2609ae6d 41#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
54321d94 42
54321d94
JF
43#define set_pte_atomic(ptep, pte) \
44 native_set_pte_atomic(ptep, pte)
45
46#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
47
48#ifndef __PAGETABLE_PUD_FOLDED
49#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
50#define pgd_clear(pgd) native_pgd_clear(pgd)
51#endif
52
53#ifndef set_pud
54# define set_pud(pudp, pud) native_set_pud(pudp, pud)
55#endif
56
57#ifndef __PAGETABLE_PMD_FOLDED
58#define pud_clear(pud) native_pud_clear(pud)
59#endif
60
61#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
62#define pmd_clear(pmd) native_pmd_clear(pmd)
63
64#define pte_update(mm, addr, ptep) do { } while (0)
65#define pte_update_defer(mm, addr, ptep) do { } while (0)
2609ae6d
AA
66#define pmd_update(mm, addr, ptep) do { } while (0)
67#define pmd_update_defer(mm, addr, ptep) do { } while (0)
54321d94 68
54321d94
JF
69#define pgd_val(x) native_pgd_val(x)
70#define __pgd(x) native_make_pgd(x)
71
72#ifndef __PAGETABLE_PUD_FOLDED
73#define pud_val(x) native_pud_val(x)
74#define __pud(x) native_make_pud(x)
75#endif
76
77#ifndef __PAGETABLE_PMD_FOLDED
78#define pmd_val(x) native_pmd_val(x)
79#define __pmd(x) native_make_pmd(x)
80#endif
81
82#define pte_val(x) native_pte_val(x)
83#define __pte(x) native_make_pte(x)
84
224101ed
JF
85#define arch_end_context_switch(prev) do {} while(0)
86
54321d94
JF
87#endif /* CONFIG_PARAVIRT */
88
4614139c
JF
89/*
90 * The following only work if pte_present() is true.
91 * Undefined behaviour if not..
92 */
3cbaeafe
JP
93static inline int pte_dirty(pte_t pte)
94{
a15af1c9 95 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
96}
97
98static inline int pte_young(pte_t pte)
99{
a15af1c9 100 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
101}
102
f2d6bfe9
JW
103static inline int pmd_young(pmd_t pmd)
104{
105 return pmd_flags(pmd) & _PAGE_ACCESSED;
106}
107
3cbaeafe
JP
108static inline int pte_write(pte_t pte)
109{
a15af1c9 110 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
111}
112
113static inline int pte_file(pte_t pte)
114{
a15af1c9 115 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
116}
117
118static inline int pte_huge(pte_t pte)
119{
a15af1c9 120 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
121}
122
3cbaeafe
JP
123static inline int pte_global(pte_t pte)
124{
a15af1c9 125 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
126}
127
128static inline int pte_exec(pte_t pte)
129{
a15af1c9 130 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
131}
132
7e675137
NP
133static inline int pte_special(pte_t pte)
134{
b38af472
HD
135 /*
136 * See CONFIG_NUMA_BALANCING pte_numa in include/asm-generic/pgtable.h.
137 * On x86 we have _PAGE_BIT_NUMA == _PAGE_BIT_GLOBAL+1 ==
138 * __PAGE_BIT_SOFTW1 == _PAGE_BIT_SPECIAL.
139 */
140 return (pte_flags(pte) & _PAGE_SPECIAL) &&
141 (pte_flags(pte) & (_PAGE_PRESENT|_PAGE_PROTNONE));
7e675137
NP
142}
143
91030ca1
HD
144static inline unsigned long pte_pfn(pte_t pte)
145{
146 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
147}
148
087975b0
AM
149static inline unsigned long pmd_pfn(pmd_t pmd)
150{
151 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
152}
153
0ee364eb
MG
154static inline unsigned long pud_pfn(pud_t pud)
155{
156 return (pud_val(pud) & PTE_PFN_MASK) >> PAGE_SHIFT;
157}
158
91030ca1
HD
159#define pte_page(pte) pfn_to_page(pte_pfn(pte))
160
3cbaeafe
JP
161static inline int pmd_large(pmd_t pte)
162{
027ef6c8 163 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
164}
165
f2d6bfe9
JW
166#ifdef CONFIG_TRANSPARENT_HUGEPAGE
167static inline int pmd_trans_splitting(pmd_t pmd)
168{
169 return pmd_val(pmd) & _PAGE_SPLITTING;
170}
171
172static inline int pmd_trans_huge(pmd_t pmd)
173{
174 return pmd_val(pmd) & _PAGE_PSE;
175}
4b7167b9
AA
176
177static inline int has_transparent_hugepage(void)
178{
179 return cpu_has_pse;
180}
f2d6bfe9
JW
181#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
182
6522869c
JF
183static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
184{
185 pteval_t v = native_pte_val(pte);
186
187 return native_make_pte(v | set);
188}
189
190static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
191{
192 pteval_t v = native_pte_val(pte);
193
194 return native_make_pte(v & ~clear);
195}
196
3cbaeafe
JP
197static inline pte_t pte_mkclean(pte_t pte)
198{
6522869c 199 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
200}
201
202static inline pte_t pte_mkold(pte_t pte)
203{
6522869c 204 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
205}
206
207static inline pte_t pte_wrprotect(pte_t pte)
208{
6522869c 209 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
210}
211
212static inline pte_t pte_mkexec(pte_t pte)
213{
6522869c 214 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
215}
216
217static inline pte_t pte_mkdirty(pte_t pte)
218{
0f8975ec 219 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
220}
221
222static inline pte_t pte_mkyoung(pte_t pte)
223{
6522869c 224 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
225}
226
227static inline pte_t pte_mkwrite(pte_t pte)
228{
6522869c 229 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
230}
231
232static inline pte_t pte_mkhuge(pte_t pte)
233{
6522869c 234 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
235}
236
237static inline pte_t pte_clrhuge(pte_t pte)
238{
6522869c 239 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
240}
241
242static inline pte_t pte_mkglobal(pte_t pte)
243{
6522869c 244 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
245}
246
247static inline pte_t pte_clrglobal(pte_t pte)
248{
6522869c 249 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 250}
4614139c 251
7e675137
NP
252static inline pte_t pte_mkspecial(pte_t pte)
253{
6522869c 254 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
255}
256
f2d6bfe9
JW
257static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
258{
259 pmdval_t v = native_pmd_val(pmd);
260
261 return __pmd(v | set);
262}
263
264static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
265{
266 pmdval_t v = native_pmd_val(pmd);
267
268 return __pmd(v & ~clear);
269}
270
271static inline pmd_t pmd_mkold(pmd_t pmd)
272{
273 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
274}
275
276static inline pmd_t pmd_wrprotect(pmd_t pmd)
277{
278 return pmd_clear_flags(pmd, _PAGE_RW);
279}
280
281static inline pmd_t pmd_mkdirty(pmd_t pmd)
282{
0f8975ec 283 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
284}
285
286static inline pmd_t pmd_mkhuge(pmd_t pmd)
287{
288 return pmd_set_flags(pmd, _PAGE_PSE);
289}
290
291static inline pmd_t pmd_mkyoung(pmd_t pmd)
292{
293 return pmd_set_flags(pmd, _PAGE_ACCESSED);
294}
295
296static inline pmd_t pmd_mkwrite(pmd_t pmd)
297{
298 return pmd_set_flags(pmd, _PAGE_RW);
299}
300
301static inline pmd_t pmd_mknotpresent(pmd_t pmd)
302{
303 return pmd_clear_flags(pmd, _PAGE_PRESENT);
304}
305
2bf01f9f 306#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0f8975ec
PE
307static inline int pte_soft_dirty(pte_t pte)
308{
309 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
310}
311
312static inline int pmd_soft_dirty(pmd_t pmd)
313{
314 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
315}
316
317static inline pte_t pte_mksoft_dirty(pte_t pte)
318{
319 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
320}
321
322static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
323{
324 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
325}
326
41bb3476
CG
327static inline pte_t pte_file_clear_soft_dirty(pte_t pte)
328{
329 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
330}
331
332static inline pte_t pte_file_mksoft_dirty(pte_t pte)
333{
334 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
335}
336
337static inline int pte_file_soft_dirty(pte_t pte)
338{
339 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
340}
341
2bf01f9f
CG
342#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
343
b534816b
JF
344/*
345 * Mask out unsupported bits in a present pgprot. Non-present pgprots
346 * can use those bits for other purposes, so leave them be.
347 */
348static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
349{
350 pgprotval_t protval = pgprot_val(pgprot);
351
352 if (protval & _PAGE_PRESENT)
353 protval &= __supported_pte_mask;
354
355 return protval;
356}
357
6fdc05d4
JF
358static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
359{
b534816b
JF
360 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
361 massage_pgprot(pgprot));
6fdc05d4
JF
362}
363
364static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
365{
b534816b
JF
366 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
367 massage_pgprot(pgprot));
6fdc05d4
JF
368}
369
38472311
IM
370static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
371{
372 pteval_t val = pte_val(pte);
373
374 /*
375 * Chop off the NX bit (if present), and add the NX portion of
376 * the newprot (if present):
377 */
1c12c4cf 378 val &= _PAGE_CHG_MASK;
b534816b 379 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
380
381 return __pte(val);
382}
383
c489f125
JW
384static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
385{
386 pmdval_t val = pmd_val(pmd);
387
388 val &= _HPAGE_CHG_MASK;
389 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
390
391 return __pmd(val);
392}
393
1c12c4cf
VP
394/* mprotect needs to preserve PAT bits when updating vm_page_prot */
395#define pgprot_modify pgprot_modify
396static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
397{
398 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
399 pgprotval_t addbits = pgprot_val(newprot);
400 return __pgprot(preservebits | addbits);
401}
402
77be1fab 403#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 404
b534816b 405#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 406
1adcaafe 407static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
d85f3334
JG
408 enum page_cache_mode pcm,
409 enum page_cache_mode new_pcm)
afc7d20c 410{
1adcaafe 411 /*
55a6ca25 412 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 413 */
8a271389 414 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
415 return 1;
416
afc7d20c 417 /*
418 * Certain new memtypes are not allowed with certain
419 * requested memtype:
420 * - request is uncached, return cannot be write-back
421 * - request is write-combine, return cannot be write-back
422 */
d85f3334
JG
423 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
424 new_pcm == _PAGE_CACHE_MODE_WB) ||
425 (pcm == _PAGE_CACHE_MODE_WC &&
426 new_pcm == _PAGE_CACHE_MODE_WB)) {
afc7d20c 427 return 0;
428 }
429
430 return 1;
431}
432
458a3e64
TH
433pmd_t *populate_extra_pmd(unsigned long vaddr);
434pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
435#endif /* __ASSEMBLY__ */
436
96a388de 437#ifdef CONFIG_X86_32
a1ce3928 438# include <asm/pgtable_32.h>
96a388de 439#else
a1ce3928 440# include <asm/pgtable_64.h>
96a388de 441#endif
6c386655 442
aca159db 443#ifndef __ASSEMBLY__
f476961c 444#include <linux/mm_types.h>
fa0f281c 445#include <linux/mmdebug.h>
4cbeb51b 446#include <linux/log2.h>
aca159db 447
a034a010
JF
448static inline int pte_none(pte_t pte)
449{
450 return !pte.pte;
451}
452
8de01da3
JF
453#define __HAVE_ARCH_PTE_SAME
454static inline int pte_same(pte_t a, pte_t b)
455{
456 return a.pte == b.pte;
457}
458
7c683851
JF
459static inline int pte_present(pte_t a)
460{
5926f87f
DV
461 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE |
462 _PAGE_NUMA);
7c683851
JF
463}
464
c46a7c81
MG
465#define pte_present_nonuma pte_present_nonuma
466static inline int pte_present_nonuma(pte_t a)
467{
468 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
469}
470
2c3cf556 471#define pte_accessible pte_accessible
20841405 472static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
2c3cf556 473{
20841405
RR
474 if (pte_flags(a) & _PAGE_PRESENT)
475 return true;
476
477 if ((pte_flags(a) & (_PAGE_PROTNONE | _PAGE_NUMA)) &&
478 mm_tlb_flush_pending(mm))
479 return true;
480
481 return false;
2c3cf556
RR
482}
483
eb63657e 484static inline int pte_hidden(pte_t pte)
dfec072e 485{
eb63657e 486 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
487}
488
649e8ef6
JF
489static inline int pmd_present(pmd_t pmd)
490{
027ef6c8
AA
491 /*
492 * Checking for _PAGE_PSE is needed too because
493 * split_huge_page will temporarily clear the present bit (but
494 * the _PAGE_PSE flag will remain set at all times while the
495 * _PAGE_PRESENT bit is clear).
496 */
be3a7284
AA
497 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE |
498 _PAGE_NUMA);
649e8ef6
JF
499}
500
4fea801a
JF
501static inline int pmd_none(pmd_t pmd)
502{
503 /* Only check low word on 32-bit platforms, since it might be
504 out of sync with upper half. */
26c8e317 505 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
506}
507
3ffb3564
JF
508static inline unsigned long pmd_page_vaddr(pmd_t pmd)
509{
510 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
511}
512
e5f7f202
IM
513/*
514 * Currently stuck as a macro due to indirect forward reference to
515 * linux/mmzone.h's __section_mem_map_addr() definition:
516 */
db3eb96f 517#define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT)
20063ca4 518
e24d7eee
JF
519/*
520 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
521 *
522 * this macro returns the index of the entry in the pmd page which would
523 * control the given virtual address
524 */
ce0c0f9e 525static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
526{
527 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
528}
529
97e2817d
JF
530/*
531 * Conversion functions: convert a page and protection to a page entry,
532 * and a page entry and page directory to the page they refer to.
533 *
534 * (Currently stuck as a macro because of indirect forward reference
535 * to linux/mm.h:page_to_nid())
536 */
537#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
538
346309cf
JF
539/*
540 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
541 *
542 * this function returns the index of the entry in the pte page which would
543 * control the given virtual address
544 */
ce0c0f9e 545static inline unsigned long pte_index(unsigned long address)
346309cf
JF
546{
547 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
548}
549
3fbc2444
JF
550static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
551{
552 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
553}
554
99510238
JF
555static inline int pmd_bad(pmd_t pmd)
556{
be3a7284
AA
557#ifdef CONFIG_NUMA_BALANCING
558 /* pmd_numa check */
559 if ((pmd_flags(pmd) & (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA)
560 return 0;
561#endif
18a7a199 562 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
563}
564
cc290ca3
JF
565static inline unsigned long pages_to_mb(unsigned long npg)
566{
567 return npg >> (20 - PAGE_SHIFT);
568}
569
5ba7c913 570#if PAGETABLE_LEVELS > 2
deb79cfb
JF
571static inline int pud_none(pud_t pud)
572{
26c8e317 573 return native_pud_val(pud) == 0;
deb79cfb
JF
574}
575
5ba7c913
JF
576static inline int pud_present(pud_t pud)
577{
18a7a199 578 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 579}
6fff47e3
JF
580
581static inline unsigned long pud_page_vaddr(pud_t pud)
582{
583 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
584}
f476961c 585
e5f7f202
IM
586/*
587 * Currently stuck as a macro due to indirect forward reference to
588 * linux/mmzone.h's __section_mem_map_addr() definition:
589 */
590#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
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591
592/* Find an entry in the second-level page table.. */
593static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
594{
595 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
596}
3180fba0 597
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598static inline int pud_large(pud_t pud)
599{
e2f5bda9 600 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
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601 (_PAGE_PSE | _PAGE_PRESENT);
602}
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603
604static inline int pud_bad(pud_t pud)
605{
18a7a199 606 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 607}
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608#else
609static inline int pud_large(pud_t pud)
610{
611 return 0;
612}
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613#endif /* PAGETABLE_LEVELS > 2 */
614
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615#if PAGETABLE_LEVELS > 3
616static inline int pgd_present(pgd_t pgd)
617{
18a7a199 618 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 619}
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620
621static inline unsigned long pgd_page_vaddr(pgd_t pgd)
622{
623 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
624}
777cba16 625
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IM
626/*
627 * Currently stuck as a macro due to indirect forward reference to
628 * linux/mmzone.h's __section_mem_map_addr() definition:
629 */
630#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
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631
632/* to find an entry in a page-table-directory. */
ce0c0f9e 633static inline unsigned long pud_index(unsigned long address)
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634{
635 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
636}
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637
638static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
639{
640 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
641}
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642
643static inline int pgd_bad(pgd_t pgd)
644{
18a7a199 645 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 646}
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647
648static inline int pgd_none(pgd_t pgd)
649{
26c8e317 650 return !native_pgd_val(pgd);
7325cc2e 651}
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652#endif /* PAGETABLE_LEVELS > 3 */
653
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654#endif /* __ASSEMBLY__ */
655
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656/*
657 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
658 *
659 * this macro returns the index of the entry in the pgd page which would
660 * control the given virtual address
661 */
662#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
663
664/*
665 * pgd_offset() returns a (pgd_t *)
666 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
667 */
668#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
669/*
670 * a shortcut which implies the use of the kernel's pgd, instead
671 * of a process's
672 */
673#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
674
675
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676#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
677#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
678
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679#ifndef __ASSEMBLY__
680
2c1b284e 681extern int direct_gbpages;
22ddfcaa 682void init_mem_mapping(void);
8d57470d 683void early_alloc_pgt_buf(void);
2c1b284e 684
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685/* local pte updates need not use xchg for locking */
686static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
687{
688 pte_t res = *ptep;
689
690 /* Pure native function needs no input for mm, addr */
691 native_pte_clear(NULL, 0, ptep);
692 return res;
693}
694
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695static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
696{
697 pmd_t res = *pmdp;
698
699 native_pmd_clear(pmdp);
700 return res;
701}
702
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703static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
704 pte_t *ptep , pte_t pte)
705{
706 native_set_pte(ptep, pte);
707}
708
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709static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
710 pmd_t *pmdp , pmd_t pmd)
711{
712 native_set_pmd(pmdp, pmd);
713}
714
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715#ifndef CONFIG_PARAVIRT
716/*
717 * Rules for using pte_update - it must be called after any PTE update which
718 * has not been done using the set_pte / clear_pte interfaces. It is used by
719 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
720 * updates should either be sets, clears, or set_pte_atomic for P->P
721 * transitions, which means this hook should only be called for user PTEs.
722 * This hook implies a P->P protection or access change has taken place, which
723 * requires a subsequent TLB flush. The notification can optionally be delayed
724 * until the TLB flush event by using the pte_update_defer form of the
725 * interface, but care must be taken to assure that the flush happens while
726 * still holding the same page table lock so that the shadow and primary pages
727 * do not become out of sync on SMP.
728 */
729#define pte_update(mm, addr, ptep) do { } while (0)
730#define pte_update_defer(mm, addr, ptep) do { } while (0)
731#endif
732
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733/*
734 * We only update the dirty/accessed state if we set
735 * the dirty bit by hand in the kernel, since the hardware
736 * will do the accessed bit for us, and we don't want to
737 * race with other CPU's that might be updating the dirty
738 * bit at the same time.
739 */
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740struct vm_area_struct;
741
195466dc 742#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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743extern int ptep_set_access_flags(struct vm_area_struct *vma,
744 unsigned long address, pte_t *ptep,
745 pte_t entry, int dirty);
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746
747#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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748extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
749 unsigned long addr, pte_t *ptep);
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750
751#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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752extern int ptep_clear_flush_young(struct vm_area_struct *vma,
753 unsigned long address, pte_t *ptep);
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754
755#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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756static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
757 pte_t *ptep)
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758{
759 pte_t pte = native_ptep_get_and_clear(ptep);
760 pte_update(mm, addr, ptep);
761 return pte;
762}
763
764#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
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765static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
766 unsigned long addr, pte_t *ptep,
767 int full)
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768{
769 pte_t pte;
770 if (full) {
771 /*
772 * Full address destruction in progress; paravirt does not
773 * care about updates and native needs no locking
774 */
775 pte = native_local_ptep_get_and_clear(ptep);
776 } else {
777 pte = ptep_get_and_clear(mm, addr, ptep);
778 }
779 return pte;
780}
781
782#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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JP
783static inline void ptep_set_wrprotect(struct mm_struct *mm,
784 unsigned long addr, pte_t *ptep)
195466dc 785{
d8d89827 786 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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787 pte_update(mm, addr, ptep);
788}
789
2ac13462 790#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 791
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792#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
793
794#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
795extern int pmdp_set_access_flags(struct vm_area_struct *vma,
796 unsigned long address, pmd_t *pmdp,
797 pmd_t entry, int dirty);
798
799#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
800extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
801 unsigned long addr, pmd_t *pmdp);
802
803#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
804extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
805 unsigned long address, pmd_t *pmdp);
806
807
808#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
809extern void pmdp_splitting_flush(struct vm_area_struct *vma,
810 unsigned long addr, pmd_t *pmdp);
811
812#define __HAVE_ARCH_PMD_WRITE
813static inline int pmd_write(pmd_t pmd)
814{
815 return pmd_flags(pmd) & _PAGE_RW;
816}
817
818#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
819static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr,
820 pmd_t *pmdp)
821{
822 pmd_t pmd = native_pmdp_get_and_clear(pmdp);
823 pmd_update(mm, addr, pmdp);
824 return pmd;
825}
826
827#define __HAVE_ARCH_PMDP_SET_WRPROTECT
828static inline void pmdp_set_wrprotect(struct mm_struct *mm,
829 unsigned long addr, pmd_t *pmdp)
830{
831 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
832 pmd_update(mm, addr, pmdp);
833}
834
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835/*
836 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
837 *
838 * dst - pointer to pgd range anwhere on a pgd page
839 * src - ""
840 * count - the number of pgds to copy.
841 *
842 * dst and src can be on the same page, but the range must not overlap,
843 * and must not cross a page boundary.
844 */
845static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
846{
847 memcpy(dst, src, count * sizeof(pgd_t));
848}
849
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DH
850#define PTE_SHIFT ilog2(PTRS_PER_PTE)
851static inline int page_level_shift(enum pg_level level)
852{
853 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
854}
855static inline unsigned long page_level_size(enum pg_level level)
856{
857 return 1UL << page_level_shift(level);
858}
859static inline unsigned long page_level_mask(enum pg_level level)
860{
861 return ~(page_level_size(level) - 1);
862}
85958b46 863
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KS
864/*
865 * The x86 doesn't have any external MMU info: the kernel page
866 * tables contain all the necessary information.
867 */
868static inline void update_mmu_cache(struct vm_area_struct *vma,
869 unsigned long addr, pte_t *ptep)
870{
871}
872static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
873 unsigned long addr, pmd_t *pmd)
874{
875}
85958b46 876
2bf01f9f 877#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
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CG
878static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
879{
c46a7c81 880 VM_BUG_ON(pte_present_nonuma(pte));
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CG
881 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
882}
883
884static inline int pte_swp_soft_dirty(pte_t pte)
885{
c46a7c81 886 VM_BUG_ON(pte_present_nonuma(pte));
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CG
887 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
888}
889
890static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
891{
c46a7c81 892 VM_BUG_ON(pte_present_nonuma(pte));
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CG
893 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
894}
2bf01f9f 895#endif
fa0f281c 896
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897#include <asm-generic/pgtable.h>
898#endif /* __ASSEMBLY__ */
899
1965aae3 900#endif /* _ASM_X86_PGTABLE_H */
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