Merge tag 'tpm-fixes-for-4.2-rc2' of https://github.com/PeterHuewe/linux-tpmdd into...
[deliverable/linux.git] / arch / x86 / include / asm / smp.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_SMP_H
2#define _ASM_X86_SMP_H
c27cfeff 3#ifndef __ASSEMBLY__
53ebef49 4#include <linux/cpumask.h>
7e1efc0c 5#include <asm/percpu.h>
53ebef49 6
b23dab08
GC
7/*
8 * We need the APIC definitions automatically as part of 'smp.h'
9 */
10#ifdef CONFIG_X86_LOCAL_APIC
11# include <asm/mpspec.h>
12# include <asm/apic.h>
13# ifdef CONFIG_X86_IO_APIC
14# include <asm/io_apic.h>
15# endif
16#endif
b23dab08 17#include <asm/thread_info.h>
fb8fd077 18#include <asm/cpumask.h>
69092624 19#include <asm/cpufeature.h>
b23dab08 20
53ebef49
GC
21extern int smp_num_siblings;
22extern unsigned int num_processors;
c27cfeff 23
69092624
LM
24static inline bool cpu_has_ht_siblings(void)
25{
26 bool has_siblings = false;
27#ifdef CONFIG_SMP
28 has_siblings = cpu_has_ht && smp_num_siblings > 1;
29#endif
30 return has_siblings;
31}
32
0816b0f0
VZ
33DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map);
34DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map);
b3d7336d 35/* cpus sharing the last level cache: */
0816b0f0
VZ
36DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map);
37DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id);
38DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);
23ca4bba 39
b3d7336d
YL
40static inline struct cpumask *cpu_llc_shared_mask(int cpu)
41{
42 return per_cpu(cpu_llc_shared_map, cpu);
43}
44
0816b0f0
VZ
45DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid);
46DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid);
4e62445b 47#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
0816b0f0 48DECLARE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid);
4c321ff8 49#endif
7e1efc0c 50
9d97d0da 51/* Static state in head.S used to set up a CPU */
11d4c3f9 52extern unsigned long stack_start; /* Initial stack pointer address */
9d97d0da 53
8239c25f
TG
54struct task_struct;
55
16694024
GC
56struct smp_ops {
57 void (*smp_prepare_boot_cpu)(void);
58 void (*smp_prepare_cpus)(unsigned max_cpus);
16694024
GC
59 void (*smp_cpus_done)(unsigned max_cpus);
60
76fac077 61 void (*stop_other_cpus)(int wait);
16694024 62 void (*smp_send_reschedule)(int cpu);
3b16cf87 63
5cdaf183 64 int (*cpu_up)(unsigned cpu, struct task_struct *tidle);
93be71b6
AN
65 int (*cpu_disable)(void);
66 void (*cpu_die)(unsigned int cpu);
67 void (*play_dead)(void);
68
bcda016e 69 void (*send_call_func_ipi)(const struct cpumask *mask);
3b16cf87 70 void (*send_call_func_single_ipi)(int cpu);
16694024
GC
71};
72
14522076
GC
73/* Globals due to paravirt */
74extern void set_cpu_sibling_map(int cpu);
75
c76cb368 76#ifdef CONFIG_SMP
d0173aea
GOC
77#ifndef CONFIG_PARAVIRT
78#define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0)
79#endif
c76cb368 80extern struct smp_ops smp_ops;
8678969e 81
377d6984
GC
82static inline void smp_send_stop(void)
83{
76fac077
AK
84 smp_ops.stop_other_cpus(0);
85}
86
87static inline void stop_other_cpus(void)
88{
89 smp_ops.stop_other_cpus(1);
377d6984
GC
90}
91
1e3fac83
GC
92static inline void smp_prepare_boot_cpu(void)
93{
94 smp_ops.smp_prepare_boot_cpu();
95}
96
7557da67
GC
97static inline void smp_prepare_cpus(unsigned int max_cpus)
98{
99 smp_ops.smp_prepare_cpus(max_cpus);
100}
101
c5597649
GC
102static inline void smp_cpus_done(unsigned int max_cpus)
103{
104 smp_ops.smp_cpus_done(max_cpus);
105}
106
8239c25f 107static inline int __cpu_up(unsigned int cpu, struct task_struct *tidle)
71d19549 108{
5cdaf183 109 return smp_ops.cpu_up(cpu, tidle);
71d19549
GC
110}
111
93be71b6
AN
112static inline int __cpu_disable(void)
113{
114 return smp_ops.cpu_disable();
115}
116
117static inline void __cpu_die(unsigned int cpu)
118{
119 smp_ops.cpu_die(cpu);
120}
121
122static inline void play_dead(void)
123{
124 smp_ops.play_dead();
125}
126
8678969e
GC
127static inline void smp_send_reschedule(int cpu)
128{
129 smp_ops.smp_send_reschedule(cpu);
130}
64b1a21e 131
3b16cf87
JA
132static inline void arch_send_call_function_single_ipi(int cpu)
133{
134 smp_ops.send_call_func_single_ipi(cpu);
135}
136
b643deca 137static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
64b1a21e 138{
b643deca 139 smp_ops.send_call_func_ipi(mask);
64b1a21e 140}
71d19549 141
8227dce7 142void cpu_disable_common(void);
1e3fac83 143void native_smp_prepare_boot_cpu(void);
7557da67 144void native_smp_prepare_cpus(unsigned int max_cpus);
c5597649 145void native_smp_cpus_done(unsigned int max_cpus);
3f85483b 146void common_cpu_up(unsigned int cpunum, struct task_struct *tidle);
5cdaf183 147int native_cpu_up(unsigned int cpunum, struct task_struct *tidle);
93be71b6 148int native_cpu_disable(void);
2a442c9c 149int common_cpu_die(unsigned int cpu);
93be71b6
AN
150void native_cpu_die(unsigned int cpu);
151void native_play_dead(void);
a21f5d88 152void play_dead_common(void);
a7b480e7
BP
153void wbinvd_on_cpu(int cpu);
154int wbinvd_on_all_cpus(void);
93be71b6 155
bcda016e 156void native_send_call_func_ipi(const struct cpumask *mask);
3b16cf87 157void native_send_call_func_single_ipi(int cpu);
7eb43a6d 158void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle);
93b016f8 159
30106c17 160void smp_store_boot_cpu_info(void);
1d89a7f0 161void smp_store_cpu_info(int id);
c70dcb74 162#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
a9c057c1 163
a7b480e7
BP
164#else /* !CONFIG_SMP */
165#define wbinvd_on_cpu(cpu) wbinvd()
166static inline int wbinvd_on_all_cpus(void)
167{
168 wbinvd();
169 return 0;
170}
14adf855 171#endif /* CONFIG_SMP */
a9c057c1 172
148f9bb8 173extern unsigned disabled_cpus;
2fe60147 174
a9c057c1
GC
175#ifdef CONFIG_X86_32_SMP
176/*
177 * This function is needed by all SMP systems. It must _always_ be valid
178 * from the initial startup. We map APIC_BASE very early in page_setup(),
179 * so this is correct in the x86 case.
180 */
c6ae41e7 181#define raw_smp_processor_id() (this_cpu_read(cpu_number))
a9c057c1
GC
182extern int safe_smp_processor_id(void);
183
184#elif defined(CONFIG_X86_64_SMP)
c6ae41e7 185#define raw_smp_processor_id() (this_cpu_read(cpu_number))
a9c057c1
GC
186
187#define stack_smp_processor_id() \
188({ \
189 struct thread_info *ti; \
190 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
191 ti->cpu; \
192})
193#define safe_smp_processor_id() smp_processor_id()
194
c76cb368 195#endif
16694024 196
1b000843
GC
197#ifdef CONFIG_X86_LOCAL_APIC
198
1b374e4d 199#ifndef CONFIG_X86_64
1b000843
GC
200static inline int logical_smp_processor_id(void)
201{
202 /* we don't want to mark this access volatile - bad code generation */
4797f6b0 203 return GET_APIC_LOGICAL_ID(apic_read(APIC_LDR));
1b000843
GC
204}
205
ac23d4ee
JS
206#endif
207
1b000843 208extern int hard_smp_processor_id(void);
1b000843
GC
209
210#else /* CONFIG_X86_LOCAL_APIC */
211
212# ifndef CONFIG_SMP
213# define hard_smp_processor_id() 0
214# endif
215
216#endif /* CONFIG_X86_LOCAL_APIC */
217
99e8b9ca
DZ
218#ifdef CONFIG_DEBUG_NMI_SELFTEST
219extern void nmi_selftest(void);
220#else
221#define nmi_selftest() do { } while (0)
222#endif
223
c27cfeff 224#endif /* __ASSEMBLY__ */
1965aae3 225#endif /* _ASM_X86_SMP_H */
This page took 0.517757 seconds and 5 git commands to generate.