Merge branch 'regmap-linus' into regmap-next
[deliverable/linux.git] / arch / x86 / include / asm / smp.h
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1#ifndef _ASM_X86_SMP_H
2#define _ASM_X86_SMP_H
c27cfeff 3#ifndef __ASSEMBLY__
53ebef49 4#include <linux/cpumask.h>
93b016f8 5#include <linux/init.h>
7e1efc0c 6#include <asm/percpu.h>
53ebef49 7
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GC
8/*
9 * We need the APIC definitions automatically as part of 'smp.h'
10 */
11#ifdef CONFIG_X86_LOCAL_APIC
12# include <asm/mpspec.h>
13# include <asm/apic.h>
14# ifdef CONFIG_X86_IO_APIC
15# include <asm/io_apic.h>
16# endif
17#endif
b23dab08 18#include <asm/thread_info.h>
fb8fd077 19#include <asm/cpumask.h>
69092624 20#include <asm/cpufeature.h>
b23dab08 21
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22extern int smp_num_siblings;
23extern unsigned int num_processors;
c27cfeff 24
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25static inline bool cpu_has_ht_siblings(void)
26{
27 bool has_siblings = false;
28#ifdef CONFIG_SMP
29 has_siblings = cpu_has_ht && smp_num_siblings > 1;
30#endif
31 return has_siblings;
32}
33
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34DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
35DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
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36/* cpus sharing the last level cache: */
37DECLARE_PER_CPU(cpumask_var_t, cpu_llc_shared_map);
7e1efc0c 38DECLARE_PER_CPU(u16, cpu_llc_id);
fb26132b 39DECLARE_PER_CPU(int, cpu_number);
23ca4bba 40
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41static inline struct cpumask *cpu_sibling_mask(int cpu)
42{
7ad728f9 43 return per_cpu(cpu_sibling_map, cpu);
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44}
45
46static inline struct cpumask *cpu_core_mask(int cpu)
47{
7ad728f9 48 return per_cpu(cpu_core_map, cpu);
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49}
50
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51static inline struct cpumask *cpu_llc_shared_mask(int cpu)
52{
53 return per_cpu(cpu_llc_shared_map, cpu);
54}
55
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56DECLARE_EARLY_PER_CPU(u16, x86_cpu_to_apicid);
57DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
4e62445b 58#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
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59DECLARE_EARLY_PER_CPU(int, x86_cpu_to_logical_apicid);
60#endif
7e1efc0c 61
9d97d0da 62/* Static state in head.S used to set up a CPU */
11d4c3f9 63extern unsigned long stack_start; /* Initial stack pointer address */
9d97d0da 64
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65struct smp_ops {
66 void (*smp_prepare_boot_cpu)(void);
67 void (*smp_prepare_cpus)(unsigned max_cpus);
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68 void (*smp_cpus_done)(unsigned max_cpus);
69
76fac077 70 void (*stop_other_cpus)(int wait);
16694024 71 void (*smp_send_reschedule)(int cpu);
3b16cf87 72
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73 int (*cpu_up)(unsigned cpu);
74 int (*cpu_disable)(void);
75 void (*cpu_die)(unsigned int cpu);
76 void (*play_dead)(void);
77
bcda016e 78 void (*send_call_func_ipi)(const struct cpumask *mask);
3b16cf87 79 void (*send_call_func_single_ipi)(int cpu);
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80};
81
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82/* Globals due to paravirt */
83extern void set_cpu_sibling_map(int cpu);
84
c76cb368 85#ifdef CONFIG_SMP
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86#ifndef CONFIG_PARAVIRT
87#define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0)
88#endif
c76cb368 89extern struct smp_ops smp_ops;
8678969e 90
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91static inline void smp_send_stop(void)
92{
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93 smp_ops.stop_other_cpus(0);
94}
95
96static inline void stop_other_cpus(void)
97{
98 smp_ops.stop_other_cpus(1);
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99}
100
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101static inline void smp_prepare_boot_cpu(void)
102{
103 smp_ops.smp_prepare_boot_cpu();
104}
105
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106static inline void smp_prepare_cpus(unsigned int max_cpus)
107{
108 smp_ops.smp_prepare_cpus(max_cpus);
109}
110
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111static inline void smp_cpus_done(unsigned int max_cpus)
112{
113 smp_ops.smp_cpus_done(max_cpus);
114}
115
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116static inline int __cpu_up(unsigned int cpu)
117{
118 return smp_ops.cpu_up(cpu);
119}
120
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121static inline int __cpu_disable(void)
122{
123 return smp_ops.cpu_disable();
124}
125
126static inline void __cpu_die(unsigned int cpu)
127{
128 smp_ops.cpu_die(cpu);
129}
130
131static inline void play_dead(void)
132{
133 smp_ops.play_dead();
134}
135
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136static inline void smp_send_reschedule(int cpu)
137{
138 smp_ops.smp_send_reschedule(cpu);
139}
64b1a21e 140
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141static inline void arch_send_call_function_single_ipi(int cpu)
142{
143 smp_ops.send_call_func_single_ipi(cpu);
144}
145
b643deca 146static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
64b1a21e 147{
b643deca 148 smp_ops.send_call_func_ipi(mask);
64b1a21e 149}
71d19549 150
8227dce7 151void cpu_disable_common(void);
1e3fac83 152void native_smp_prepare_boot_cpu(void);
7557da67 153void native_smp_prepare_cpus(unsigned int max_cpus);
c5597649 154void native_smp_cpus_done(unsigned int max_cpus);
71d19549 155int native_cpu_up(unsigned int cpunum);
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156int native_cpu_disable(void);
157void native_cpu_die(unsigned int cpu);
158void native_play_dead(void);
a21f5d88 159void play_dead_common(void);
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160void wbinvd_on_cpu(int cpu);
161int wbinvd_on_all_cpus(void);
93be71b6 162
bcda016e 163void native_send_call_func_ipi(const struct cpumask *mask);
3b16cf87 164void native_send_call_func_single_ipi(int cpu);
93b016f8 165
1d89a7f0 166void smp_store_cpu_info(int id);
c70dcb74 167#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
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168
169/* We don't mark CPUs online until __cpu_up(), so we need another measure */
170static inline int num_booting_cpus(void)
171{
c2d1cec1 172 return cpumask_weight(cpu_callout_mask);
a9c057c1 173}
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174#else /* !CONFIG_SMP */
175#define wbinvd_on_cpu(cpu) wbinvd()
176static inline int wbinvd_on_all_cpus(void)
177{
178 wbinvd();
179 return 0;
180}
14adf855 181#endif /* CONFIG_SMP */
a9c057c1 182
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183extern unsigned disabled_cpus __cpuinitdata;
184
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185#ifdef CONFIG_X86_32_SMP
186/*
187 * This function is needed by all SMP systems. It must _always_ be valid
188 * from the initial startup. We map APIC_BASE very early in page_setup(),
189 * so this is correct in the x86 case.
190 */
6dbde353 191#define raw_smp_processor_id() (percpu_read(cpu_number))
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192extern int safe_smp_processor_id(void);
193
194#elif defined(CONFIG_X86_64_SMP)
ea927906 195#define raw_smp_processor_id() (percpu_read(cpu_number))
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196
197#define stack_smp_processor_id() \
198({ \
199 struct thread_info *ti; \
200 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
201 ti->cpu; \
202})
203#define safe_smp_processor_id() smp_processor_id()
204
c76cb368 205#endif
16694024 206
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207#ifdef CONFIG_X86_LOCAL_APIC
208
1b374e4d 209#ifndef CONFIG_X86_64
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210static inline int logical_smp_processor_id(void)
211{
212 /* we don't want to mark this access volatile - bad code generation */
4797f6b0 213 return GET_APIC_LOGICAL_ID(apic_read(APIC_LDR));
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214}
215
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216#endif
217
1b000843 218extern int hard_smp_processor_id(void);
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219
220#else /* CONFIG_X86_LOCAL_APIC */
221
222# ifndef CONFIG_SMP
223# define hard_smp_processor_id() 0
224# endif
225
226#endif /* CONFIG_X86_LOCAL_APIC */
227
c27cfeff 228#endif /* __ASSEMBLY__ */
1965aae3 229#endif /* _ASM_X86_SMP_H */
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