Commit | Line | Data |
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1965aae3 PA |
1 | #ifndef _ASM_X86_SMP_H |
2 | #define _ASM_X86_SMP_H | |
c27cfeff | 3 | #ifndef __ASSEMBLY__ |
53ebef49 | 4 | #include <linux/cpumask.h> |
93b016f8 | 5 | #include <linux/init.h> |
7e1efc0c | 6 | #include <asm/percpu.h> |
53ebef49 | 7 | |
b23dab08 GC |
8 | /* |
9 | * We need the APIC definitions automatically as part of 'smp.h' | |
10 | */ | |
11 | #ifdef CONFIG_X86_LOCAL_APIC | |
12 | # include <asm/mpspec.h> | |
13 | # include <asm/apic.h> | |
14 | # ifdef CONFIG_X86_IO_APIC | |
15 | # include <asm/io_apic.h> | |
16 | # endif | |
17 | #endif | |
b23dab08 | 18 | #include <asm/thread_info.h> |
fb8fd077 | 19 | #include <asm/cpumask.h> |
b23dab08 | 20 | |
53ebef49 GC |
21 | extern int smp_num_siblings; |
22 | extern unsigned int num_processors; | |
c27cfeff | 23 | |
7ad728f9 RR |
24 | DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map); |
25 | DECLARE_PER_CPU(cpumask_var_t, cpu_core_map); | |
7e1efc0c | 26 | DECLARE_PER_CPU(u16, cpu_llc_id); |
fb26132b | 27 | DECLARE_PER_CPU(int, cpu_number); |
23ca4bba | 28 | |
c2d1cec1 MT |
29 | static inline struct cpumask *cpu_sibling_mask(int cpu) |
30 | { | |
7ad728f9 | 31 | return per_cpu(cpu_sibling_map, cpu); |
c2d1cec1 MT |
32 | } |
33 | ||
34 | static inline struct cpumask *cpu_core_mask(int cpu) | |
35 | { | |
7ad728f9 | 36 | return per_cpu(cpu_core_map, cpu); |
c2d1cec1 MT |
37 | } |
38 | ||
23ca4bba MT |
39 | DECLARE_EARLY_PER_CPU(u16, x86_cpu_to_apicid); |
40 | DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid); | |
7e1efc0c | 41 | |
9d97d0da GOC |
42 | /* Static state in head.S used to set up a CPU */ |
43 | extern struct { | |
44 | void *sp; | |
45 | unsigned short ss; | |
46 | } stack_start; | |
47 | ||
16694024 GC |
48 | struct smp_ops { |
49 | void (*smp_prepare_boot_cpu)(void); | |
50 | void (*smp_prepare_cpus)(unsigned max_cpus); | |
16694024 GC |
51 | void (*smp_cpus_done)(unsigned max_cpus); |
52 | ||
76fac077 | 53 | void (*stop_other_cpus)(int wait); |
16694024 | 54 | void (*smp_send_reschedule)(int cpu); |
3b16cf87 | 55 | |
93be71b6 AN |
56 | int (*cpu_up)(unsigned cpu); |
57 | int (*cpu_disable)(void); | |
58 | void (*cpu_die)(unsigned int cpu); | |
59 | void (*play_dead)(void); | |
60 | ||
bcda016e | 61 | void (*send_call_func_ipi)(const struct cpumask *mask); |
3b16cf87 | 62 | void (*send_call_func_single_ipi)(int cpu); |
16694024 GC |
63 | }; |
64 | ||
14522076 GC |
65 | /* Globals due to paravirt */ |
66 | extern void set_cpu_sibling_map(int cpu); | |
67 | ||
c76cb368 | 68 | #ifdef CONFIG_SMP |
d0173aea GOC |
69 | #ifndef CONFIG_PARAVIRT |
70 | #define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0) | |
71 | #endif | |
c76cb368 | 72 | extern struct smp_ops smp_ops; |
8678969e | 73 | |
377d6984 GC |
74 | static inline void smp_send_stop(void) |
75 | { | |
76fac077 AK |
76 | smp_ops.stop_other_cpus(0); |
77 | } | |
78 | ||
79 | static inline void stop_other_cpus(void) | |
80 | { | |
81 | smp_ops.stop_other_cpus(1); | |
377d6984 GC |
82 | } |
83 | ||
1e3fac83 GC |
84 | static inline void smp_prepare_boot_cpu(void) |
85 | { | |
86 | smp_ops.smp_prepare_boot_cpu(); | |
87 | } | |
88 | ||
7557da67 GC |
89 | static inline void smp_prepare_cpus(unsigned int max_cpus) |
90 | { | |
91 | smp_ops.smp_prepare_cpus(max_cpus); | |
92 | } | |
93 | ||
c5597649 GC |
94 | static inline void smp_cpus_done(unsigned int max_cpus) |
95 | { | |
96 | smp_ops.smp_cpus_done(max_cpus); | |
97 | } | |
98 | ||
71d19549 GC |
99 | static inline int __cpu_up(unsigned int cpu) |
100 | { | |
101 | return smp_ops.cpu_up(cpu); | |
102 | } | |
103 | ||
93be71b6 AN |
104 | static inline int __cpu_disable(void) |
105 | { | |
106 | return smp_ops.cpu_disable(); | |
107 | } | |
108 | ||
109 | static inline void __cpu_die(unsigned int cpu) | |
110 | { | |
111 | smp_ops.cpu_die(cpu); | |
112 | } | |
113 | ||
114 | static inline void play_dead(void) | |
115 | { | |
116 | smp_ops.play_dead(); | |
117 | } | |
118 | ||
8678969e GC |
119 | static inline void smp_send_reschedule(int cpu) |
120 | { | |
121 | smp_ops.smp_send_reschedule(cpu); | |
122 | } | |
64b1a21e | 123 | |
3b16cf87 JA |
124 | static inline void arch_send_call_function_single_ipi(int cpu) |
125 | { | |
126 | smp_ops.send_call_func_single_ipi(cpu); | |
127 | } | |
128 | ||
b643deca | 129 | static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
64b1a21e | 130 | { |
b643deca | 131 | smp_ops.send_call_func_ipi(mask); |
64b1a21e | 132 | } |
71d19549 | 133 | |
8227dce7 | 134 | void cpu_disable_common(void); |
1e3fac83 | 135 | void native_smp_prepare_boot_cpu(void); |
7557da67 | 136 | void native_smp_prepare_cpus(unsigned int max_cpus); |
c5597649 | 137 | void native_smp_cpus_done(unsigned int max_cpus); |
71d19549 | 138 | int native_cpu_up(unsigned int cpunum); |
93be71b6 AN |
139 | int native_cpu_disable(void); |
140 | void native_cpu_die(unsigned int cpu); | |
141 | void native_play_dead(void); | |
a21f5d88 | 142 | void play_dead_common(void); |
a7b480e7 BP |
143 | void wbinvd_on_cpu(int cpu); |
144 | int wbinvd_on_all_cpus(void); | |
93be71b6 | 145 | |
bcda016e | 146 | void native_send_call_func_ipi(const struct cpumask *mask); |
3b16cf87 | 147 | void native_send_call_func_single_ipi(int cpu); |
93b016f8 | 148 | |
1d89a7f0 | 149 | void smp_store_cpu_info(int id); |
c70dcb74 | 150 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
a9c057c1 GC |
151 | |
152 | /* We don't mark CPUs online until __cpu_up(), so we need another measure */ | |
153 | static inline int num_booting_cpus(void) | |
154 | { | |
c2d1cec1 | 155 | return cpumask_weight(cpu_callout_mask); |
a9c057c1 | 156 | } |
a7b480e7 BP |
157 | #else /* !CONFIG_SMP */ |
158 | #define wbinvd_on_cpu(cpu) wbinvd() | |
159 | static inline int wbinvd_on_all_cpus(void) | |
160 | { | |
161 | wbinvd(); | |
162 | return 0; | |
163 | } | |
14adf855 | 164 | #endif /* CONFIG_SMP */ |
a9c057c1 | 165 | |
2fe60147 AS |
166 | extern unsigned disabled_cpus __cpuinitdata; |
167 | ||
a9c057c1 GC |
168 | #ifdef CONFIG_X86_32_SMP |
169 | /* | |
170 | * This function is needed by all SMP systems. It must _always_ be valid | |
171 | * from the initial startup. We map APIC_BASE very early in page_setup(), | |
172 | * so this is correct in the x86 case. | |
173 | */ | |
6dbde353 | 174 | #define raw_smp_processor_id() (percpu_read(cpu_number)) |
a9c057c1 GC |
175 | extern int safe_smp_processor_id(void); |
176 | ||
177 | #elif defined(CONFIG_X86_64_SMP) | |
ea927906 | 178 | #define raw_smp_processor_id() (percpu_read(cpu_number)) |
a9c057c1 GC |
179 | |
180 | #define stack_smp_processor_id() \ | |
181 | ({ \ | |
182 | struct thread_info *ti; \ | |
183 | __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \ | |
184 | ti->cpu; \ | |
185 | }) | |
186 | #define safe_smp_processor_id() smp_processor_id() | |
187 | ||
c76cb368 | 188 | #endif |
16694024 | 189 | |
1b000843 GC |
190 | #ifdef CONFIG_X86_LOCAL_APIC |
191 | ||
1b374e4d | 192 | #ifndef CONFIG_X86_64 |
1b000843 GC |
193 | static inline int logical_smp_processor_id(void) |
194 | { | |
195 | /* we don't want to mark this access volatile - bad code generation */ | |
4797f6b0 | 196 | return GET_APIC_LOGICAL_ID(apic_read(APIC_LDR)); |
1b000843 GC |
197 | } |
198 | ||
ac23d4ee JS |
199 | #endif |
200 | ||
1b000843 | 201 | extern int hard_smp_processor_id(void); |
1b000843 GC |
202 | |
203 | #else /* CONFIG_X86_LOCAL_APIC */ | |
204 | ||
205 | # ifndef CONFIG_SMP | |
206 | # define hard_smp_processor_id() 0 | |
207 | # endif | |
208 | ||
209 | #endif /* CONFIG_X86_LOCAL_APIC */ | |
210 | ||
c27cfeff | 211 | #endif /* __ASSEMBLY__ */ |
1965aae3 | 212 | #endif /* _ASM_X86_SMP_H */ |