Commit | Line | Data |
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1965aae3 PA |
1 | #ifndef _ASM_X86_SMP_H |
2 | #define _ASM_X86_SMP_H | |
c27cfeff | 3 | #ifndef __ASSEMBLY__ |
53ebef49 | 4 | #include <linux/cpumask.h> |
7e1efc0c | 5 | #include <asm/percpu.h> |
53ebef49 | 6 | |
b23dab08 GC |
7 | /* |
8 | * We need the APIC definitions automatically as part of 'smp.h' | |
9 | */ | |
10 | #ifdef CONFIG_X86_LOCAL_APIC | |
11 | # include <asm/mpspec.h> | |
12 | # include <asm/apic.h> | |
13 | # ifdef CONFIG_X86_IO_APIC | |
14 | # include <asm/io_apic.h> | |
15 | # endif | |
16 | #endif | |
b23dab08 | 17 | #include <asm/thread_info.h> |
fb8fd077 | 18 | #include <asm/cpumask.h> |
69092624 | 19 | #include <asm/cpufeature.h> |
b23dab08 | 20 | |
53ebef49 GC |
21 | extern int smp_num_siblings; |
22 | extern unsigned int num_processors; | |
c27cfeff | 23 | |
0816b0f0 VZ |
24 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map); |
25 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map); | |
b3d7336d | 26 | /* cpus sharing the last level cache: */ |
0816b0f0 VZ |
27 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); |
28 | DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id); | |
29 | DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number); | |
23ca4bba | 30 | |
b3d7336d YL |
31 | static inline struct cpumask *cpu_llc_shared_mask(int cpu) |
32 | { | |
33 | return per_cpu(cpu_llc_shared_map, cpu); | |
34 | } | |
35 | ||
0816b0f0 VZ |
36 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid); |
37 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); | |
4e62445b | 38 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
0816b0f0 | 39 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid); |
4c321ff8 | 40 | #endif |
7e1efc0c | 41 | |
9d97d0da | 42 | /* Static state in head.S used to set up a CPU */ |
11d4c3f9 | 43 | extern unsigned long stack_start; /* Initial stack pointer address */ |
9d97d0da | 44 | |
8239c25f TG |
45 | struct task_struct; |
46 | ||
16694024 GC |
47 | struct smp_ops { |
48 | void (*smp_prepare_boot_cpu)(void); | |
49 | void (*smp_prepare_cpus)(unsigned max_cpus); | |
16694024 GC |
50 | void (*smp_cpus_done)(unsigned max_cpus); |
51 | ||
76fac077 | 52 | void (*stop_other_cpus)(int wait); |
16694024 | 53 | void (*smp_send_reschedule)(int cpu); |
3b16cf87 | 54 | |
5cdaf183 | 55 | int (*cpu_up)(unsigned cpu, struct task_struct *tidle); |
93be71b6 AN |
56 | int (*cpu_disable)(void); |
57 | void (*cpu_die)(unsigned int cpu); | |
58 | void (*play_dead)(void); | |
59 | ||
bcda016e | 60 | void (*send_call_func_ipi)(const struct cpumask *mask); |
3b16cf87 | 61 | void (*send_call_func_single_ipi)(int cpu); |
16694024 GC |
62 | }; |
63 | ||
14522076 GC |
64 | /* Globals due to paravirt */ |
65 | extern void set_cpu_sibling_map(int cpu); | |
66 | ||
c76cb368 GC |
67 | #ifdef CONFIG_SMP |
68 | extern struct smp_ops smp_ops; | |
8678969e | 69 | |
377d6984 GC |
70 | static inline void smp_send_stop(void) |
71 | { | |
76fac077 AK |
72 | smp_ops.stop_other_cpus(0); |
73 | } | |
74 | ||
75 | static inline void stop_other_cpus(void) | |
76 | { | |
77 | smp_ops.stop_other_cpus(1); | |
377d6984 GC |
78 | } |
79 | ||
1e3fac83 GC |
80 | static inline void smp_prepare_boot_cpu(void) |
81 | { | |
82 | smp_ops.smp_prepare_boot_cpu(); | |
83 | } | |
84 | ||
7557da67 GC |
85 | static inline void smp_prepare_cpus(unsigned int max_cpus) |
86 | { | |
87 | smp_ops.smp_prepare_cpus(max_cpus); | |
88 | } | |
89 | ||
c5597649 GC |
90 | static inline void smp_cpus_done(unsigned int max_cpus) |
91 | { | |
92 | smp_ops.smp_cpus_done(max_cpus); | |
93 | } | |
94 | ||
8239c25f | 95 | static inline int __cpu_up(unsigned int cpu, struct task_struct *tidle) |
71d19549 | 96 | { |
5cdaf183 | 97 | return smp_ops.cpu_up(cpu, tidle); |
71d19549 GC |
98 | } |
99 | ||
93be71b6 AN |
100 | static inline int __cpu_disable(void) |
101 | { | |
102 | return smp_ops.cpu_disable(); | |
103 | } | |
104 | ||
105 | static inline void __cpu_die(unsigned int cpu) | |
106 | { | |
107 | smp_ops.cpu_die(cpu); | |
108 | } | |
109 | ||
110 | static inline void play_dead(void) | |
111 | { | |
112 | smp_ops.play_dead(); | |
113 | } | |
114 | ||
8678969e GC |
115 | static inline void smp_send_reschedule(int cpu) |
116 | { | |
117 | smp_ops.smp_send_reschedule(cpu); | |
118 | } | |
64b1a21e | 119 | |
3b16cf87 JA |
120 | static inline void arch_send_call_function_single_ipi(int cpu) |
121 | { | |
122 | smp_ops.send_call_func_single_ipi(cpu); | |
123 | } | |
124 | ||
b643deca | 125 | static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
64b1a21e | 126 | { |
b643deca | 127 | smp_ops.send_call_func_ipi(mask); |
64b1a21e | 128 | } |
71d19549 | 129 | |
8227dce7 | 130 | void cpu_disable_common(void); |
1e3fac83 | 131 | void native_smp_prepare_boot_cpu(void); |
7557da67 | 132 | void native_smp_prepare_cpus(unsigned int max_cpus); |
c5597649 | 133 | void native_smp_cpus_done(unsigned int max_cpus); |
3f85483b | 134 | void common_cpu_up(unsigned int cpunum, struct task_struct *tidle); |
5cdaf183 | 135 | int native_cpu_up(unsigned int cpunum, struct task_struct *tidle); |
93be71b6 | 136 | int native_cpu_disable(void); |
2a442c9c | 137 | int common_cpu_die(unsigned int cpu); |
93be71b6 AN |
138 | void native_cpu_die(unsigned int cpu); |
139 | void native_play_dead(void); | |
a21f5d88 | 140 | void play_dead_common(void); |
a7b480e7 BP |
141 | void wbinvd_on_cpu(int cpu); |
142 | int wbinvd_on_all_cpus(void); | |
93be71b6 | 143 | |
bcda016e | 144 | void native_send_call_func_ipi(const struct cpumask *mask); |
3b16cf87 | 145 | void native_send_call_func_single_ipi(int cpu); |
7eb43a6d | 146 | void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle); |
93b016f8 | 147 | |
30106c17 | 148 | void smp_store_boot_cpu_info(void); |
1d89a7f0 | 149 | void smp_store_cpu_info(int id); |
c70dcb74 | 150 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
a9c057c1 | 151 | |
a7b480e7 BP |
152 | #else /* !CONFIG_SMP */ |
153 | #define wbinvd_on_cpu(cpu) wbinvd() | |
154 | static inline int wbinvd_on_all_cpus(void) | |
155 | { | |
156 | wbinvd(); | |
157 | return 0; | |
158 | } | |
14adf855 | 159 | #endif /* CONFIG_SMP */ |
a9c057c1 | 160 | |
148f9bb8 | 161 | extern unsigned disabled_cpus; |
2fe60147 | 162 | |
a9c057c1 GC |
163 | #ifdef CONFIG_X86_32_SMP |
164 | /* | |
165 | * This function is needed by all SMP systems. It must _always_ be valid | |
166 | * from the initial startup. We map APIC_BASE very early in page_setup(), | |
167 | * so this is correct in the x86 case. | |
168 | */ | |
c6ae41e7 | 169 | #define raw_smp_processor_id() (this_cpu_read(cpu_number)) |
a9c057c1 GC |
170 | extern int safe_smp_processor_id(void); |
171 | ||
172 | #elif defined(CONFIG_X86_64_SMP) | |
c6ae41e7 | 173 | #define raw_smp_processor_id() (this_cpu_read(cpu_number)) |
a9c057c1 GC |
174 | |
175 | #define stack_smp_processor_id() \ | |
176 | ({ \ | |
177 | struct thread_info *ti; \ | |
178 | __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \ | |
179 | ti->cpu; \ | |
180 | }) | |
181 | #define safe_smp_processor_id() smp_processor_id() | |
182 | ||
c76cb368 | 183 | #endif |
16694024 | 184 | |
1b000843 GC |
185 | #ifdef CONFIG_X86_LOCAL_APIC |
186 | ||
1b374e4d | 187 | #ifndef CONFIG_X86_64 |
1b000843 GC |
188 | static inline int logical_smp_processor_id(void) |
189 | { | |
190 | /* we don't want to mark this access volatile - bad code generation */ | |
4797f6b0 | 191 | return GET_APIC_LOGICAL_ID(apic_read(APIC_LDR)); |
1b000843 GC |
192 | } |
193 | ||
ac23d4ee JS |
194 | #endif |
195 | ||
1b000843 | 196 | extern int hard_smp_processor_id(void); |
1b000843 GC |
197 | |
198 | #else /* CONFIG_X86_LOCAL_APIC */ | |
199 | ||
200 | # ifndef CONFIG_SMP | |
201 | # define hard_smp_processor_id() 0 | |
202 | # endif | |
203 | ||
204 | #endif /* CONFIG_X86_LOCAL_APIC */ | |
205 | ||
99e8b9ca DZ |
206 | #ifdef CONFIG_DEBUG_NMI_SELFTEST |
207 | extern void nmi_selftest(void); | |
208 | #else | |
209 | #define nmi_selftest() do { } while (0) | |
210 | #endif | |
211 | ||
c27cfeff | 212 | #endif /* __ASSEMBLY__ */ |
1965aae3 | 213 | #endif /* _ASM_X86_SMP_H */ |