projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 2272b0e0 | 1 | /* |
| 2f0798a3 | 2 | * x86 TSC related functions |
| 2272b0e0 | 3 | */ |
| 1965aae3 PA |
4 | #ifndef _ASM_X86_TSC_H |
| 5 | #define _ASM_X86_TSC_H | |
| 2272b0e0 AS |
6 | |
| 7 | #include <asm/processor.h> | |
| 8 | ||
| 2f0798a3 TG |
9 | #define NS_SCALE 10 /* 2^10, carefully chosen */ |
| 10 | #define US_SCALE 32 /* 2^32, arbitralrily chosen */ | |
| 11 | ||
| 2272b0e0 AS |
12 | /* |
| 13 | * Standard way to access the cycle counter. | |
| 14 | */ | |
| 15 | typedef unsigned long long cycles_t; | |
| 16 | ||
| 17 | extern unsigned int cpu_khz; | |
| 18 | extern unsigned int tsc_khz; | |
| 73018a66 GOC |
19 | |
| 20 | extern void disable_TSC(void); | |
| 2272b0e0 AS |
21 | |
| 22 | static inline cycles_t get_cycles(void) | |
| 23 | { | |
| 2272b0e0 AS |
24 | #ifndef CONFIG_X86_TSC |
| 25 | if (!cpu_has_tsc) | |
| 26 | return 0; | |
| 27 | #endif | |
| 2272b0e0 | 28 | |
| 4ea1636b | 29 | return rdtsc(); |
| 6d63de8d | 30 | } |
| 4e87173e | 31 | |
| f9677e0f CH |
32 | extern struct system_counterval_t convert_art_to_tsc(cycle_t art); |
| 33 | ||
| 2272b0e0 | 34 | extern void tsc_init(void); |
| 5a90cf20 | 35 | extern void mark_tsc_unstable(char *reason); |
| 2272b0e0 | 36 | extern int unsynchronized_tsc(void); |
| 2d826404 | 37 | extern int check_tsc_unstable(void); |
| c73deb6a | 38 | extern int check_tsc_disabled(void); |
| 2d826404 | 39 | extern unsigned long native_calibrate_tsc(void); |
| a94cab23 | 40 | extern unsigned long long native_sched_clock_from_tsc(u64 tsc); |
| 2272b0e0 | 41 | |
| 28a00184 SS |
42 | extern int tsc_clocksource_reliable; |
| 43 | ||
| 2272b0e0 AS |
44 | /* |
| 45 | * Boot-time check whether the TSCs are synchronized across | |
| 46 | * all CPUs/cores: | |
| 47 | */ | |
| 48 | extern void check_tsc_sync_source(int cpu); | |
| 49 | extern void check_tsc_sync_target(void); | |
| 50 | ||
| 80ca9c98 | 51 | extern int notsc_setup(char *); |
| b74f05d6 MT |
52 | extern void tsc_save_sched_clock_state(void); |
| 53 | extern void tsc_restore_sched_clock_state(void); | |
| d371698e | 54 | |
| 7da7c156 | 55 | /* MSR based TSC calibration for Intel Atom SoC platforms */ |
| 5f0e0309 | 56 | unsigned long try_msr_calibrate_tsc(void); |
| 7da7c156 | 57 | |
| 1965aae3 | 58 | #endif /* _ASM_X86_TSC_H */ |