[deliverable/linux.git] / arch / x86 / include / uapi / asm / sigcontext.h

#ifndef _UAPI_ASM_X86_SIGCONTEXT_H
#define _UAPI_ASM_X86_SIGCONTEXT_H

/*
 * Linux signal context definitions. The sigcontext includes a complex
 * hierarchy of CPU and FPU state, available to user-space (on the stack) when
 * a signal handler is executed.
 *
 * As over the years this ABI grew from its very simple roots towards
 * supporting more and more CPU state organically, some of the details (which
 * were rather clever hacks back in the days) became a bit quirky by today.
 *
 * The current ABI includes flexible provisions for future extensions, so we
 * won't have to grow new quirks for quite some time. Promise!
 */

#include <linux/compiler.h>
#include <linux/types.h>

#define FP_XSTATE_MAGIC1		0x46505853U
#define FP_XSTATE_MAGIC2		0x46505845U
#define FP_XSTATE_MAGIC2_SIZE		sizeof(FP_XSTATE_MAGIC2)

/*
 * Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame
 * are reserved for SW usage. On CPUs supporting XSAVE/XRSTOR, these bytes are
 * used to extend the fpstate pointer in the sigcontext, which now includes the
 * extended state information along with fpstate information.
 *
 * If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then there's a
 * sw_reserved.extended_size bytes large extended context area present. (The
 * last 32-bit word of this extended area (at the
 * fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to
 * FP_XSTATE_MAGIC2 so that you can sanity check your size calculations.)
 *
 * This extended area typically grows with newer CPUs that have larger and
 * larger XSAVE areas.
 */
struct _fpx_sw_bytes {
	/*
	 * If set to FP_XSTATE_MAGIC1 then this is an xstate context.
	 * 0 if a legacy frame.
	 */
	__u32				magic1;

	/*
	 * Total size of the fpstate area:
	 *
	 *  - if magic1 == 0 then it's sizeof(struct _fpstate)
	 *  - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate)
	 *    plus extensions (if any)
	 */
	__u32				extended_size;

	/*
	 * Feature bit mask (including FP/SSE/extended state) that is present
	 * in the memory layout:
	 */
	__u64				xfeatures;

	/*
	 * Actual XSAVE state size, based on the xfeatures saved in the layout.
	 * 'extended_size' is greater than 'xstate_size':
	 */
	__u32				xstate_size;

	/* For future use: */
	__u32				padding[7];
};

/*
 * As documented in the iBCS2 standard:
 *
 * The first part of "struct _fpstate" is just the normal i387 hardware setup,
 * the extra "status" word is used to save the coprocessor status word before
 * entering the handler.
 *
 * The FPU state data structure has had to grow to accommodate the extended FPU
 * state required by the Streaming SIMD Extensions.  There is no documented
 * standard to accomplish this at the moment.
 */

/* 10-byte legacy floating point register: */
struct _fpreg {
	__u16				significand[4];
	__u16				exponent;
};

/* 16-byte floating point register: */
struct _fpxreg {
	__u16				significand[4];
	__u16				exponent;
	__u16				padding[3];
};

/* 16-byte XMM register: */
struct _xmmreg {
	__u32				element[4];
};

#define X86_FXSR_MAGIC			0x0000

/*
 * The 32-bit FPU frame:
 */
struct _fpstate_32 {
	/* Legacy FPU environment: */
	__u32				cw;
	__u32				sw;
	__u32				tag;
	__u32				ipoff;
	__u32				cssel;
	__u32				dataoff;
	__u32				datasel;
	struct _fpreg			_st[8];
	__u16				status;
	__u16				magic;		/* 0xffff: regular FPU data only */
							/* 0x0000: FXSR FPU data */

	/* FXSR FPU environment */
	__u32				_fxsr_env[6];	/* FXSR FPU env is ignored */
	__u32				mxcsr;
	__u32				reserved;
	struct _fpxreg			_fxsr_st[8];	/* FXSR FPU reg data is ignored */
	struct _xmmreg			_xmm[8];	/* First 8 XMM registers */
	union {
		__u32			padding1[44];	/* Second 8 XMM registers plus padding */
		__u32			padding[44];	/* Alias name for old user-space */
	};

	union {
		__u32			padding2[12];
		struct _fpx_sw_bytes	sw_reserved;	/* Potential extended state is encoded here */
	};
};

/*
 * The 64-bit FPU frame. (FXSAVE format and later)
 *
 * Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is
 *        larger: 'struct _xstate'. Note that 'struct _xstate' embedds
 *        'struct _fpstate' so that you can always assume the _fpstate portion
 *        exists so that you can check the magic value.
 *
 * Note2: Reserved fields may someday contain valuable data. Always
 *	  save/restore them when you change signal frames.
 */
struct _fpstate_64 {
	__u16				cwd;
	__u16				swd;
	/* Note this is not the same as the 32-bit/x87/FSAVE twd: */
	__u16				twd;
	__u16				fop;
	__u64				rip;
	__u64				rdp;
	__u32				mxcsr;
	__u32				mxcsr_mask;
	__u32				st_space[32];	/*  8x  FP registers, 16 bytes each */
	__u32				xmm_space[64];	/* 16x XMM registers, 16 bytes each */
	__u32				reserved2[12];
	union {
		__u32			reserved3[12];
		struct _fpx_sw_bytes	sw_reserved;	/* Potential extended state is encoded here */
	};
};

#ifdef __i386__
# define _fpstate _fpstate_32
#else
# define _fpstate _fpstate_64
#endif

struct _header {
	__u64				xfeatures;
	__u64				reserved1[2];
	__u64				reserved2[5];
};

struct _ymmh_state {
	/* 16x YMM registers, 16 bytes each: */
	__u32				ymmh_space[64];
};

/*
 * Extended state pointed to by sigcontext::fpstate.
 *
 * In addition to the fpstate, information encoded in _xstate::xstate_hdr
 * indicates the presence of other extended state information supported
 * by the CPU and kernel:
 */
struct _xstate {
	struct _fpstate			fpstate;
	struct _header			xstate_hdr;
	struct _ymmh_state		ymmh;
	/* New processor state extensions go here: */
};

/*
 * The 32-bit signal frame:
 */
struct sigcontext_32 {
	__u16				gs, __gsh;
	__u16				fs, __fsh;
	__u16				es, __esh;
	__u16				ds, __dsh;
	__u32				di;
	__u32				si;
	__u32				bp;
	__u32				sp;
	__u32				bx;
	__u32				dx;
	__u32				cx;
	__u32				ax;
	__u32				trapno;
	__u32				err;
	__u32				ip;
	__u16				cs, __csh;
	__u32				flags;
	__u32				sp_at_signal;
	__u16				ss, __ssh;

	/*
	 * fpstate is really (struct _fpstate *) or (struct _xstate *)
	 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
	 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
	 * of extended memory layout. See comments at the definition of
	 * (struct _fpx_sw_bytes)
	 */
	__u32				fpstate; /* Zero when no FPU/extended context */
	__u32				oldmask;
	__u32				cr2;
};

/*
 * The 64-bit signal frame:
 */
struct sigcontext_64 {
	__u64				r8;
	__u64				r9;
	__u64				r10;
	__u64				r11;
	__u64				r12;
	__u64				r13;
	__u64				r14;
	__u64				r15;
	__u64				di;
	__u64				si;
	__u64				bp;
	__u64				bx;
	__u64				dx;
	__u64				ax;
	__u64				cx;
	__u64				sp;
	__u64				ip;
	__u64				flags;
	__u16				cs;
	__u16				gs;
	__u16				fs;
	__u16				__pad0;
	__u64				err;
	__u64				trapno;
	__u64				oldmask;
	__u64				cr2;

	/*
	 * fpstate is really (struct _fpstate *) or (struct _xstate *)
	 * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
	 * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
	 * of extended memory layout. See comments at the definition of
	 * (struct _fpx_sw_bytes)
	 */
	__u64				fpstate; /* Zero when no FPU/extended context */
	__u64				reserved1[8];
};

/*
 * Create the real 'struct sigcontext' type:
 */
#ifdef __KERNEL__
# ifdef __i386__
#  define sigcontext sigcontext_32
# else
#  define sigcontext sigcontext_64
# endif
#endif

/*
 * The old user-space sigcontext definition, just in case user-space still
 * relies on it. The kernel definition (in asm/sigcontext.h) has unified
 * field names but otherwise the same layout.
 */
#ifndef __KERNEL__

#define _fpstate_ia32			_fpstate_32
#define sigcontext_ia32			sigcontext_32


# ifdef __i386__
struct sigcontext {
	__u16				gs, __gsh;
	__u16				fs, __fsh;
	__u16				es, __esh;
	__u16				ds, __dsh;
	__u32				edi;
	__u32				esi;
	__u32				ebp;
	__u32				esp;
	__u32				ebx;
	__u32				edx;
	__u32				ecx;
	__u32				eax;
	__u32				trapno;
	__u32				err;
	__u32				eip;
	__u16				cs, __csh;
	__u32				eflags;
	__u32				esp_at_signal;
	__u16				ss, __ssh;
	struct _fpstate __user		*fpstate;
	__u32				oldmask;
	__u32				cr2;
};
# else /* __x86_64__: */
struct sigcontext {
	__u64				r8;
	__u64				r9;
	__u64				r10;
	__u64				r11;
	__u64				r12;
	__u64				r13;
	__u64				r14;
	__u64				r15;
	__u64				rdi;
	__u64				rsi;
	__u64				rbp;
	__u64				rbx;
	__u64				rdx;
	__u64				rax;
	__u64				rcx;
	__u64				rsp;
	__u64				rip;
	__u64				eflags;		/* RFLAGS */
	__u16				cs;
	__u16				gs;
	__u16				fs;
	__u16				__pad0;
	__u64				err;
	__u64				trapno;
	__u64				oldmask;
	__u64				cr2;
	struct _fpstate __user		*fpstate;	/* Zero when no FPU context */
#  ifdef __ILP32__
	__u32				__fpstate_pad;
#  endif
	__u64				reserved1[8];
};
# endif /* __x86_64__ */
#endif /* !__KERNEL__ */

#endif /* _UAPI_ASM_X86_SIGCONTEXT_H */
Commit	Line	Data
af170c50 DH	1	#ifndef _UAPI_ASM_X86_SIGCONTEXT_H
	2	#define _UAPI_ASM_X86_SIGCONTEXT_H
	3
cbf5f4fb	4	/*
0e2815de PZ	5	* Linux signal context definitions. The sigcontext includes a complex
	6	* hierarchy of CPU and FPU state, available to user-space (on the stack) when
	7	* a signal handler is executed.
cbf5f4fb	8	*
0e2815de PZ	9	* As over the years this ABI grew from its very simple roots towards
	10	* supporting more and more CPU state organically, some of the details (which
	11	* were rather clever hacks back in the days) became a bit quirky by today.
cbf5f4fb	12	*
0e2815de PZ	13	* The current ABI includes flexible provisions for future extensions, so we
0e2815de PZ	14	* won't have to grow new quirks for quite some time. Promise!
cbf5f4fb IM	15	*/
cbf5f4fb IM	16
af170c50 DH	17	#include <linux/compiler.h>
	18	#include <linux/types.h>
	19
cbf5f4fb IM	20	#define FP_XSTATE_MAGIC1 0x46505853U
	21	#define FP_XSTATE_MAGIC2 0x46505845U
	22	#define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2)
af170c50 DH	23
af170c50 DH	24	/*
cbf5f4fb	25	* Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame
0e2815de PZ	26	* are reserved for SW usage. On CPUs supporting XSAVE/XRSTOR, these bytes are
	27	* used to extend the fpstate pointer in the sigcontext, which now includes the
	28	* extended state information along with fpstate information.
af170c50	29	*
0e2815de PZ	30	* If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then there's a
	31	* sw_reserved.extended_size bytes large extended context area present. (The
	32	* last 32-bit word of this extended area (at the
	33	* fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to
cbf5f4fb IM	34	* FP_XSTATE_MAGIC2 so that you can sanity check your size calculations.)
cbf5f4fb IM	35	*
0e2815de PZ	36	* This extended area typically grows with newer CPUs that have larger and
0e2815de PZ	37	* larger XSAVE areas.
af170c50 DH	38	*/
af170c50 DH	39	struct _fpx_sw_bytes {
0e2815de PZ	40	/*
	41	* If set to FP_XSTATE_MAGIC1 then this is an xstate context.
	42	* 0 if a legacy frame.
	43	*/
cbf5f4fb IM	44	__u32 magic1;
	45
	46	/*
	47	* Total size of the fpstate area:
	48	*
	49	* - if magic1 == 0 then it's sizeof(struct _fpstate)
0e2815de PZ	50	* - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate)
0e2815de PZ	51	* plus extensions (if any)
cbf5f4fb IM	52	*/
	53	__u32 extended_size;
	54
	55	/*
	56	* Feature bit mask (including FP/SSE/extended state) that is present
	57	* in the memory layout:
	58	*/
	59	__u64 xfeatures;
	60
	61	/*
	62	* Actual XSAVE state size, based on the xfeatures saved in the layout.
	63	* 'extended_size' is greater than 'xstate_size':
	64	*/
	65	__u32 xstate_size;
	66
	67	/* For future use: */
	68	__u32 padding[7];
af170c50 DH	69	};
af170c50 DH	70
af170c50	71	/*
cbf5f4fb	72	* As documented in the iBCS2 standard:
af170c50	73	*
0e2815de PZ	74	* The first part of "struct _fpstate" is just the normal i387 hardware setup,
	75	* the extra "status" word is used to save the coprocessor status word before
	76	* entering the handler.
af170c50	77	*
0e2815de PZ	78	* The FPU state data structure has had to grow to accommodate the extended FPU
	79	* state required by the Streaming SIMD Extensions. There is no documented
	80	* standard to accomplish this at the moment.
af170c50	81	*/
cbf5f4fb IM	82
cbf5f4fb IM	83	/* 10-byte legacy floating point register: */
af170c50	84	struct _fpreg {
3f623a5b IM	85	__u16 significand[4];
3f623a5b IM	86	__u16 exponent;
af170c50 DH	87	};
af170c50 DH	88
cbf5f4fb	89	/* 16-byte floating point register: */
af170c50	90	struct _fpxreg {
3f623a5b IM	91	__u16 significand[4];
	92	__u16 exponent;
	93	__u16 padding[3];
af170c50 DH	94	};
af170c50 DH	95
cbf5f4fb	96	/* 16-byte XMM register: */
af170c50	97	struct _xmmreg {
3f623a5b	98	__u32 element[4];
af170c50 DH	99	};
af170c50 DH	100
cbf5f4fb IM	101	#define X86_FXSR_MAGIC 0x0000
cbf5f4fb IM	102
7bb0dc22 IM	103	/*
	104	* The 32-bit FPU frame:
	105	*/
	106	struct _fpstate_32 {
cbf5f4fb	107	/* Legacy FPU environment: */
3f623a5b IM	108	__u32 cw;
	109	__u32 sw;
	110	__u32 tag;
	111	__u32 ipoff;
	112	__u32 cssel;
	113	__u32 dataoff;
	114	__u32 datasel;
cbf5f4fb	115	struct _fpreg _st[8];
3f623a5b IM	116	__u16 status;
3f623a5b IM	117	__u16 magic; /* 0xffff: regular FPU data only */
cbf5f4fb	118	/* 0x0000: FXSR FPU data */
af170c50 DH	119
af170c50 DH	120	/* FXSR FPU environment */
3f623a5b IM	121	__u32 _fxsr_env[6]; /* FXSR FPU env is ignored */
	122	__u32 mxcsr;
	123	__u32 reserved;
cbf5f4fb IM	124	struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */
cbf5f4fb IM	125	struct _xmmreg _xmm[8]; /* First 8 XMM registers */
7bb0dc22 IM	126	union {
	127	__u32 padding1[44]; /* Second 8 XMM registers plus padding */
	128	__u32 padding[44]; /* Alias name for old user-space */
	129	};
af170c50 DH	130
af170c50 DH	131	union {
3f623a5b	132	__u32 padding2[12];
cbf5f4fb	133	struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */
af170c50 DH	134	};
	135	};
	136
cbf5f4fb	137	/*
7bb0dc22	138	* The 64-bit FPU frame. (FXSAVE format and later)
cbf5f4fb IM	139	*
	140	* Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is
	141	* larger: 'struct _xstate'. Note that 'struct _xstate' embedds
	142	* 'struct _fpstate' so that you can always assume the _fpstate portion
	143	* exists so that you can check the magic value.
	144	*
0e2815de PZ	145	* Note2: Reserved fields may someday contain valuable data. Always
0e2815de PZ	146	* save/restore them when you change signal frames.
cbf5f4fb	147	*/
7bb0dc22	148	struct _fpstate_64 {
cbf5f4fb IM	149	__u16 cwd;
	150	__u16 swd;
	151	/* Note this is not the same as the 32-bit/x87/FSAVE twd: */
	152	__u16 twd;
	153	__u16 fop;
	154	__u64 rip;
	155	__u64 rdp;
	156	__u32 mxcsr;
	157	__u32 mxcsr_mask;
	158	__u32 st_space[32]; /* 8x FP registers, 16 bytes each */
	159	__u32 xmm_space[64]; /* 16x XMM registers, 16 bytes each */
	160	__u32 reserved2[12];
af170c50	161	union {
cbf5f4fb IM	162	__u32 reserved3[12];
cbf5f4fb IM	163	struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */
af170c50 DH	164	};
	165	};
	166
7bb0dc22 IM	167	#ifdef __i386__
	168	# define _fpstate _fpstate_32
	169	#else
	170	# define _fpstate _fpstate_64
	171	#endif
	172
128f8257 IM	173	struct _header {
	174	__u64 xfeatures;
	175	__u64 reserved1[2];
	176	__u64 reserved2[5];
	177	};
	178
	179	struct _ymmh_state {
	180	/* 16x YMM registers, 16 bytes each: */
	181	__u32 ymmh_space[64];
	182	};
	183
af170c50	184	/*
128f8257 IM	185	* Extended state pointed to by sigcontext::fpstate.
	186	*
	187	* In addition to the fpstate, information encoded in _xstate::xstate_hdr
	188	* indicates the presence of other extended state information supported
	189	* by the CPU and kernel:
af170c50	190	*/
128f8257 IM	191	struct _xstate {
	192	struct _fpstate fpstate;
	193	struct _header xstate_hdr;
	194	struct _ymmh_state ymmh;
	195	/* New processor state extensions go here: */
	196	};
	197
8fcb346b IM	198	/*
	199	* The 32-bit signal frame:
	200	*/
f2c609bc IM	201	struct sigcontext_32 {
	202	__u16 gs, __gsh;
	203	__u16 fs, __fsh;
	204	__u16 es, __esh;
	205	__u16 ds, __dsh;
	206	__u32 di;
	207	__u32 si;
	208	__u32 bp;
	209	__u32 sp;
	210	__u32 bx;
	211	__u32 dx;
	212	__u32 cx;
	213	__u32 ax;
	214	__u32 trapno;
	215	__u32 err;
	216	__u32 ip;
	217	__u16 cs, __csh;
	218	__u32 flags;
	219	__u32 sp_at_signal;
	220	__u16 ss, __ssh;
	221
	222	/*
	223	* fpstate is really (struct _fpstate ) or (struct _xstate )
	224	* depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
	225	* bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
	226	* of extended memory layout. See comments at the definition of
	227	* (struct _fpx_sw_bytes)
	228	*/
530e5c82	229	__u32 fpstate; /* Zero when no FPU/extended context */
f2c609bc IM	230	__u32 oldmask;
	231	__u32 cr2;
	232	};
	233
8fcb346b IM	234	/*
	235	* The 64-bit signal frame:
	236	*/
f2c609bc IM	237	struct sigcontext_64 {
	238	__u64 r8;
	239	__u64 r9;
	240	__u64 r10;
	241	__u64 r11;
	242	__u64 r12;
	243	__u64 r13;
	244	__u64 r14;
	245	__u64 r15;
	246	__u64 di;
	247	__u64 si;
	248	__u64 bp;
	249	__u64 bx;
	250	__u64 dx;
	251	__u64 ax;
	252	__u64 cx;
	253	__u64 sp;
	254	__u64 ip;
	255	__u64 flags;
	256	__u16 cs;
	257	__u16 gs;
	258	__u16 fs;
	259	__u16 __pad0;
	260	__u64 err;
	261	__u64 trapno;
	262	__u64 oldmask;
	263	__u64 cr2;
	264
	265	/*
	266	* fpstate is really (struct _fpstate ) or (struct _xstate )
	267	* depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
	268	* bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
	269	* of extended memory layout. See comments at the definition of
	270	* (struct _fpx_sw_bytes)
	271	*/
530e5c82	272	__u64 fpstate; /* Zero when no FPU/extended context */
f2c609bc IM	273	__u64 reserved1[8];
	274	};
	275
	276	/*
	277	* Create the real 'struct sigcontext' type:
	278	*/
	279	#ifdef __KERNEL__
	280	# ifdef __i386__
	281	# define sigcontext sigcontext_32
	282	# else
	283	# define sigcontext sigcontext_64
	284	# endif
	285	#endif
	286
128f8257 IM	287	/*
	288	* The old user-space sigcontext definition, just in case user-space still
	289	* relies on it. The kernel definition (in asm/sigcontext.h) has unified
	290	* field names but otherwise the same layout.
	291	*/
	292	#ifndef __KERNEL__
86e9fc3a	293
8fcb346b IM	294	#define _fpstate_ia32 _fpstate_32
	295	#define sigcontext_ia32 sigcontext_32
	296
86e9fc3a	297
128f8257 IM	298	# ifdef __i386__
128f8257 IM	299	struct sigcontext {
3f623a5b IM	300	__u16 gs, __gsh;
	301	__u16 fs, __fsh;
	302	__u16 es, __esh;
	303	__u16 ds, __dsh;
	304	__u32 edi;
	305	__u32 esi;
	306	__u32 ebp;
	307	__u32 esp;
	308	__u32 ebx;
	309	__u32 edx;
	310	__u32 ecx;
	311	__u32 eax;
	312	__u32 trapno;
	313	__u32 err;
	314	__u32 eip;
	315	__u16 cs, __csh;
	316	__u32 eflags;
	317	__u32 esp_at_signal;
	318	__u16 ss, __ssh;
128f8257	319	struct _fpstate __user *fpstate;
3f623a5b IM	320	__u32 oldmask;
3f623a5b IM	321	__u32 cr2;
128f8257 IM	322	};
128f8257 IM	323	# else /* __x86_64__: */
af170c50	324	struct sigcontext {
cbf5f4fb IM	325	__u64 r8;
	326	__u64 r9;
	327	__u64 r10;
	328	__u64 r11;
	329	__u64 r12;
	330	__u64 r13;
	331	__u64 r14;
	332	__u64 r15;
	333	__u64 rdi;
	334	__u64 rsi;
	335	__u64 rbp;
	336	__u64 rbx;
	337	__u64 rdx;
	338	__u64 rax;
	339	__u64 rcx;
	340	__u64 rsp;
	341	__u64 rip;
	342	__u64 eflags; /* RFLAGS */
	343	__u16 cs;
	344	__u16 gs;
	345	__u16 fs;
	346	__u16 __pad0;
	347	__u64 err;
	348	__u64 trapno;
	349	__u64 oldmask;
	350	__u64 cr2;
	351	struct _fpstate __user fpstate; / Zero when no FPU context */
	352	# ifdef __ILP32__
	353	__u32 __fpstate_pad;
	354	# endif
	355	__u64 reserved1[8];
af170c50	356	};
128f8257 IM	357	# endif /* __x86_64__ */
128f8257 IM	358	#endif /* !__KERNEL__ */
af170c50 DH	359
af170c50 DH	360	#endif /* _UAPI_ASM_X86_SIGCONTEXT_H */