Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
5 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
24 | */ | |
25 | ||
26 | #include <linux/init.h> | |
1da177e4 | 27 | #include <linux/acpi.h> |
d66bea57 | 28 | #include <linux/acpi_pmtmr.h> |
1da177e4 | 29 | #include <linux/efi.h> |
73fea175 | 30 | #include <linux/cpumask.h> |
1da177e4 | 31 | #include <linux/module.h> |
aea00143 | 32 | #include <linux/dmi.h> |
b33fa1f3 | 33 | #include <linux/irq.h> |
f0f4c343 | 34 | #include <linux/bootmem.h> |
35 | #include <linux/ioport.h> | |
1da177e4 LT |
36 | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/io_apic.h> | |
39 | #include <asm/apic.h> | |
183fe065 | 40 | #include <asm/genapic.h> |
1da177e4 | 41 | #include <asm/io.h> |
1da177e4 | 42 | #include <asm/mpspec.h> |
dfac2189 | 43 | #include <asm/smp.h> |
1da177e4 | 44 | |
f6bc4029 GOC |
45 | #ifdef CONFIG_X86_LOCAL_APIC |
46 | # include <mach_apic.h> | |
47 | #endif | |
48 | ||
e8924acb | 49 | static int __initdata acpi_force = 0; |
1a3f239d | 50 | |
df3bb57d AK |
51 | #ifdef CONFIG_ACPI |
52 | int acpi_disabled = 0; | |
53 | #else | |
54 | int acpi_disabled = 1; | |
55 | #endif | |
56 | EXPORT_SYMBOL(acpi_disabled); | |
57 | ||
1da177e4 LT |
58 | #ifdef CONFIG_X86_64 |
59 | ||
1da177e4 | 60 | #include <asm/proto.h> |
ae261868 | 61 | #include <asm/genapic.h> |
637029c6 | 62 | |
4be44fcd | 63 | #else /* X86 */ |
1da177e4 LT |
64 | |
65 | #ifdef CONFIG_X86_LOCAL_APIC | |
66 | #include <mach_apic.h> | |
67 | #include <mach_mpparse.h> | |
4be44fcd | 68 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 69 | |
4be44fcd | 70 | #endif /* X86 */ |
1da177e4 LT |
71 | |
72 | #define BAD_MADT_ENTRY(entry, end) ( \ | |
73 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | |
5f3b1a8b | 74 | ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) |
1da177e4 LT |
75 | |
76 | #define PREFIX "ACPI: " | |
77 | ||
90d53909 | 78 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
6e4be1ff YL |
79 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
80 | EXPORT_SYMBOL(acpi_pci_disabled); | |
1da177e4 LT |
81 | int acpi_ht __initdata = 1; /* enable HT */ |
82 | ||
83 | int acpi_lapic; | |
84 | int acpi_ioapic; | |
85 | int acpi_strict; | |
1da177e4 | 86 | |
5f3b1a8b | 87 | u8 acpi_sci_flags __initdata; |
1da177e4 LT |
88 | int acpi_sci_override_gsi __initdata; |
89 | int acpi_skip_timer_override __initdata; | |
fa18f477 | 90 | int acpi_use_timer_override __initdata; |
1da177e4 LT |
91 | |
92 | #ifdef CONFIG_X86_LOCAL_APIC | |
93 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | |
94 | #endif | |
95 | ||
96 | #ifndef __HAVE_ARCH_CMPXCHG | |
97 | #warning ACPI uses CMPXCHG, i486 and later hardware | |
98 | #endif | |
99 | ||
a726c600 JK |
100 | static int acpi_mcfg_64bit_base_addr __initdata = FALSE; |
101 | ||
1da177e4 LT |
102 | /* -------------------------------------------------------------------------- |
103 | Boot-time Configuration | |
104 | -------------------------------------------------------------------------- */ | |
105 | ||
106 | /* | |
107 | * The default interrupt routing model is PIC (8259). This gets | |
27b46d76 | 108 | * overridden if IOAPICs are enumerated (below). |
1da177e4 | 109 | */ |
4be44fcd | 110 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
1da177e4 | 111 | |
1da177e4 LT |
112 | |
113 | /* | |
114 | * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END, | |
115 | * to map the target physical address. The problem is that set_fixmap() | |
116 | * provides a single page, and it is possible that the page is not | |
117 | * sufficient. | |
118 | * By using this area, we can map up to MAX_IO_APICS pages temporarily, | |
119 | * i.e. until the next __va_range() call. | |
120 | * | |
121 | * Important Safety Note: The fixed I/O APIC page numbers are *subtracted* | |
122 | * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and | |
123 | * count idx down while incrementing the phys address. | |
124 | */ | |
2fdf0741 | 125 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) |
1da177e4 LT |
126 | { |
127 | unsigned long base, offset, mapped_size; | |
128 | int idx; | |
129 | ||
f34fa82b YL |
130 | if (!phys || !size) |
131 | return NULL; | |
132 | ||
f361a450 | 133 | if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT)) |
4be44fcd | 134 | return __va(phys); |
1da177e4 LT |
135 | |
136 | offset = phys & (PAGE_SIZE - 1); | |
137 | mapped_size = PAGE_SIZE - offset; | |
f34fa82b | 138 | clear_fixmap(FIX_ACPI_END); |
1da177e4 LT |
139 | set_fixmap(FIX_ACPI_END, phys); |
140 | base = fix_to_virt(FIX_ACPI_END); | |
141 | ||
142 | /* | |
143 | * Most cases can be covered by the below. | |
144 | */ | |
145 | idx = FIX_ACPI_END; | |
146 | while (mapped_size < size) { | |
147 | if (--idx < FIX_ACPI_BEGIN) | |
148 | return NULL; /* cannot handle this */ | |
149 | phys += PAGE_SIZE; | |
f34fa82b | 150 | clear_fixmap(idx); |
1da177e4 LT |
151 | set_fixmap(idx, phys); |
152 | mapped_size += PAGE_SIZE; | |
153 | } | |
154 | ||
4be44fcd | 155 | return ((unsigned char *)base + offset); |
1da177e4 | 156 | } |
1da177e4 LT |
157 | |
158 | #ifdef CONFIG_PCI_MMCONFIG | |
54549391 | 159 | /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ |
15a58ed1 | 160 | struct acpi_mcfg_allocation *pci_mmcfg_config; |
54549391 GKH |
161 | int pci_mmcfg_config_num; |
162 | ||
a726c600 JK |
163 | static int __init acpi_mcfg_oem_check(struct acpi_table_mcfg *mcfg) |
164 | { | |
165 | if (!strcmp(mcfg->header.oem_id, "SGI")) | |
166 | acpi_mcfg_64bit_base_addr = TRUE; | |
167 | ||
168 | return 0; | |
169 | } | |
170 | ||
ceb6c468 | 171 | int __init acpi_parse_mcfg(struct acpi_table_header *header) |
1da177e4 LT |
172 | { |
173 | struct acpi_table_mcfg *mcfg; | |
54549391 GKH |
174 | unsigned long i; |
175 | int config_size; | |
1da177e4 | 176 | |
ceb6c468 | 177 | if (!header) |
1da177e4 LT |
178 | return -EINVAL; |
179 | ||
ceb6c468 | 180 | mcfg = (struct acpi_table_mcfg *)header; |
1da177e4 | 181 | |
54549391 GKH |
182 | /* how many config structures do we have */ |
183 | pci_mmcfg_config_num = 0; | |
ceb6c468 | 184 | i = header->length - sizeof(struct acpi_table_mcfg); |
15a58ed1 | 185 | while (i >= sizeof(struct acpi_mcfg_allocation)) { |
54549391 | 186 | ++pci_mmcfg_config_num; |
15a58ed1 | 187 | i -= sizeof(struct acpi_mcfg_allocation); |
54549391 GKH |
188 | }; |
189 | if (pci_mmcfg_config_num == 0) { | |
190 | printk(KERN_ERR PREFIX "MMCONFIG has no entries\n"); | |
1da177e4 LT |
191 | return -ENODEV; |
192 | } | |
193 | ||
54549391 GKH |
194 | config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config); |
195 | pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL); | |
196 | if (!pci_mmcfg_config) { | |
197 | printk(KERN_WARNING PREFIX | |
198 | "No memory for MCFG config tables\n"); | |
199 | return -ENOMEM; | |
200 | } | |
201 | ||
ad363f80 | 202 | memcpy(pci_mmcfg_config, &mcfg[1], config_size); |
a726c600 JK |
203 | |
204 | acpi_mcfg_oem_check(mcfg); | |
205 | ||
54549391 | 206 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
a726c600 JK |
207 | if ((pci_mmcfg_config[i].address > 0xFFFFFFFF) && |
208 | !acpi_mcfg_64bit_base_addr) { | |
54549391 GKH |
209 | printk(KERN_ERR PREFIX |
210 | "MMCONFIG not in low 4GB of memory\n"); | |
acc7c2e0 KR |
211 | kfree(pci_mmcfg_config); |
212 | pci_mmcfg_config_num = 0; | |
54549391 GKH |
213 | return -ENODEV; |
214 | } | |
215 | } | |
1da177e4 LT |
216 | |
217 | return 0; | |
218 | } | |
4be44fcd | 219 | #endif /* CONFIG_PCI_MMCONFIG */ |
1da177e4 LT |
220 | |
221 | #ifdef CONFIG_X86_LOCAL_APIC | |
15a58ed1 | 222 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
1da177e4 | 223 | { |
4be44fcd | 224 | struct acpi_table_madt *madt = NULL; |
1da177e4 | 225 | |
15a58ed1 | 226 | if (!cpu_has_apic) |
1da177e4 LT |
227 | return -EINVAL; |
228 | ||
15a58ed1 | 229 | madt = (struct acpi_table_madt *)table; |
1da177e4 LT |
230 | if (!madt) { |
231 | printk(KERN_WARNING PREFIX "Unable to map MADT\n"); | |
232 | return -ENODEV; | |
233 | } | |
234 | ||
ad363f80 AS |
235 | if (madt->address) { |
236 | acpi_lapic_addr = (u64) madt->address; | |
1da177e4 LT |
237 | |
238 | printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n", | |
ad363f80 | 239 | madt->address); |
1da177e4 LT |
240 | } |
241 | ||
242 | acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id); | |
4be44fcd | 243 | |
1da177e4 LT |
244 | return 0; |
245 | } | |
246 | ||
dfac2189 AS |
247 | static void __cpuinit acpi_register_lapic(int id, u8 enabled) |
248 | { | |
fb3bbd6a YL |
249 | unsigned int ver = 0; |
250 | ||
dfac2189 AS |
251 | if (!enabled) { |
252 | ++disabled_cpus; | |
253 | return; | |
254 | } | |
255 | ||
fb3bbd6a YL |
256 | #ifdef CONFIG_X86_32 |
257 | if (boot_cpu_physical_apicid != -1U) | |
258 | ver = apic_version[boot_cpu_physical_apicid]; | |
259 | #endif | |
260 | ||
261 | generic_processor_info(id, ver); | |
dfac2189 AS |
262 | } |
263 | ||
1da177e4 | 264 | static int __init |
5f3b1a8b | 265 | acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 266 | { |
5f3b1a8b | 267 | struct acpi_madt_local_apic *processor = NULL; |
1da177e4 | 268 | |
5f3b1a8b | 269 | processor = (struct acpi_madt_local_apic *)header; |
1da177e4 LT |
270 | |
271 | if (BAD_MADT_ENTRY(processor, end)) | |
272 | return -EINVAL; | |
273 | ||
274 | acpi_table_print_madt_entry(header); | |
275 | ||
7f66ae48 AR |
276 | /* |
277 | * We need to register disabled CPU as well to permit | |
278 | * counting disabled CPUs. This allows us to size | |
279 | * cpus_possible_map more accurately, to permit | |
280 | * to not preallocating memory for all NR_CPUS | |
281 | * when we use CPU hotplug. | |
282 | */ | |
dfac2189 AS |
283 | acpi_register_lapic(processor->id, /* APIC ID */ |
284 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
1da177e4 LT |
285 | |
286 | return 0; | |
287 | } | |
288 | ||
ac049c1d JS |
289 | static int __init |
290 | acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end) | |
291 | { | |
292 | struct acpi_madt_local_sapic *processor = NULL; | |
293 | ||
294 | processor = (struct acpi_madt_local_sapic *)header; | |
295 | ||
296 | if (BAD_MADT_ENTRY(processor, end)) | |
297 | return -EINVAL; | |
298 | ||
299 | acpi_table_print_madt_entry(header); | |
300 | ||
dfac2189 AS |
301 | acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ |
302 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
ac049c1d JS |
303 | |
304 | return 0; | |
305 | } | |
306 | ||
1da177e4 | 307 | static int __init |
5f3b1a8b | 308 | acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header, |
4be44fcd | 309 | const unsigned long end) |
1da177e4 | 310 | { |
5f3b1a8b | 311 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
1da177e4 | 312 | |
5f3b1a8b | 313 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
1da177e4 LT |
314 | |
315 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) | |
316 | return -EINVAL; | |
317 | ||
318 | acpi_lapic_addr = lapic_addr_ovr->address; | |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
323 | static int __init | |
5f3b1a8b | 324 | acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 325 | { |
5f3b1a8b | 326 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
1da177e4 | 327 | |
5f3b1a8b | 328 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
1da177e4 LT |
329 | |
330 | if (BAD_MADT_ENTRY(lapic_nmi, end)) | |
331 | return -EINVAL; | |
332 | ||
333 | acpi_table_print_madt_entry(header); | |
334 | ||
335 | if (lapic_nmi->lint != 1) | |
336 | printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n"); | |
337 | ||
338 | return 0; | |
339 | } | |
340 | ||
4be44fcd | 341 | #endif /*CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 342 | |
8466361a | 343 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
344 | |
345 | static int __init | |
5f3b1a8b | 346 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 347 | { |
5f3b1a8b | 348 | struct acpi_madt_io_apic *ioapic = NULL; |
1da177e4 | 349 | |
5f3b1a8b | 350 | ioapic = (struct acpi_madt_io_apic *)header; |
1da177e4 LT |
351 | |
352 | if (BAD_MADT_ENTRY(ioapic, end)) | |
353 | return -EINVAL; | |
4be44fcd | 354 | |
1da177e4 LT |
355 | acpi_table_print_madt_entry(header); |
356 | ||
4be44fcd LB |
357 | mp_register_ioapic(ioapic->id, |
358 | ioapic->address, ioapic->global_irq_base); | |
359 | ||
1da177e4 LT |
360 | return 0; |
361 | } | |
362 | ||
363 | /* | |
364 | * Parse Interrupt Source Override for the ACPI SCI | |
365 | */ | |
e82c354b | 366 | static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger) |
1da177e4 LT |
367 | { |
368 | if (trigger == 0) /* compatible SCI trigger is level */ | |
369 | trigger = 3; | |
370 | ||
371 | if (polarity == 0) /* compatible SCI polarity is low */ | |
372 | polarity = 3; | |
373 | ||
374 | /* Command-line over-ride via acpi_sci= */ | |
5f3b1a8b AS |
375 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
376 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; | |
1da177e4 | 377 | |
5f3b1a8b AS |
378 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
379 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; | |
1da177e4 LT |
380 | |
381 | /* | |
4be44fcd | 382 | * mp_config_acpi_legacy_irqs() already setup IRQs < 16 |
1da177e4 LT |
383 | * If GSI is < 16, this will update its flags, |
384 | * else it will create a new mp_irqs[] entry. | |
385 | */ | |
7bdd21ce | 386 | mp_override_legacy_irq(gsi, polarity, trigger, gsi); |
1da177e4 LT |
387 | |
388 | /* | |
389 | * stash over-ride to indicate we've been here | |
cee324b1 | 390 | * and for later update of acpi_gbl_FADT |
1da177e4 | 391 | */ |
7bdd21ce | 392 | acpi_sci_override_gsi = gsi; |
1da177e4 LT |
393 | return; |
394 | } | |
395 | ||
396 | static int __init | |
5f3b1a8b | 397 | acpi_parse_int_src_ovr(struct acpi_subtable_header * header, |
4be44fcd | 398 | const unsigned long end) |
1da177e4 | 399 | { |
5f3b1a8b | 400 | struct acpi_madt_interrupt_override *intsrc = NULL; |
1da177e4 | 401 | |
5f3b1a8b | 402 | intsrc = (struct acpi_madt_interrupt_override *)header; |
1da177e4 LT |
403 | |
404 | if (BAD_MADT_ENTRY(intsrc, end)) | |
405 | return -EINVAL; | |
406 | ||
407 | acpi_table_print_madt_entry(header); | |
408 | ||
5f3b1a8b | 409 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
7bdd21ce | 410 | acpi_sci_ioapic_setup(intsrc->global_irq, |
5f3b1a8b AS |
411 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
412 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2); | |
1da177e4 LT |
413 | return 0; |
414 | } | |
415 | ||
416 | if (acpi_skip_timer_override && | |
5f3b1a8b | 417 | intsrc->source_irq == 0 && intsrc->global_irq == 2) { |
4be44fcd LB |
418 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); |
419 | return 0; | |
1da177e4 LT |
420 | } |
421 | ||
5f3b1a8b AS |
422 | mp_override_legacy_irq(intsrc->source_irq, |
423 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, | |
424 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, | |
425 | intsrc->global_irq); | |
1da177e4 LT |
426 | |
427 | return 0; | |
428 | } | |
429 | ||
1da177e4 | 430 | static int __init |
5f3b1a8b | 431 | acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 432 | { |
5f3b1a8b | 433 | struct acpi_madt_nmi_source *nmi_src = NULL; |
1da177e4 | 434 | |
5f3b1a8b | 435 | nmi_src = (struct acpi_madt_nmi_source *)header; |
1da177e4 LT |
436 | |
437 | if (BAD_MADT_ENTRY(nmi_src, end)) | |
438 | return -EINVAL; | |
439 | ||
440 | acpi_table_print_madt_entry(header); | |
441 | ||
442 | /* TBD: Support nimsrc entries? */ | |
443 | ||
444 | return 0; | |
445 | } | |
446 | ||
4be44fcd | 447 | #endif /* CONFIG_X86_IO_APIC */ |
1da177e4 | 448 | |
1da177e4 LT |
449 | /* |
450 | * acpi_pic_sci_set_trigger() | |
5f3b1a8b | 451 | * |
1da177e4 LT |
452 | * use ELCR to set PIC-mode trigger type for SCI |
453 | * | |
454 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's | |
455 | * it may require Edge Trigger -- use "acpi_sci=edge" | |
456 | * | |
457 | * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers | |
458 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. | |
27b46d76 SA |
459 | * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
460 | * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0) | |
1da177e4 LT |
461 | */ |
462 | ||
4be44fcd | 463 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
1da177e4 LT |
464 | { |
465 | unsigned int mask = 1 << irq; | |
466 | unsigned int old, new; | |
467 | ||
468 | /* Real old ELCR mask */ | |
469 | old = inb(0x4d0) | (inb(0x4d1) << 8); | |
470 | ||
471 | /* | |
27b46d76 | 472 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
1da177e4 LT |
473 | * since we will set it correctly as we enable the PCI irq |
474 | * routing. | |
475 | */ | |
476 | new = acpi_noirq ? old : 0; | |
477 | ||
478 | /* | |
479 | * Update SCI information in the ELCR, it isn't in the PCI | |
480 | * routing tables.. | |
481 | */ | |
482 | switch (trigger) { | |
4be44fcd | 483 | case 1: /* Edge - clear */ |
1da177e4 LT |
484 | new &= ~mask; |
485 | break; | |
4be44fcd | 486 | case 3: /* Level - set */ |
1da177e4 LT |
487 | new |= mask; |
488 | break; | |
489 | } | |
490 | ||
491 | if (old == new) | |
492 | return; | |
493 | ||
494 | printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old); | |
495 | outb(new, 0x4d0); | |
496 | outb(new >> 8, 0x4d1); | |
497 | } | |
498 | ||
1da177e4 LT |
499 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) |
500 | { | |
f023d764 | 501 | *irq = gsi; |
1da177e4 LT |
502 | return 0; |
503 | } | |
504 | ||
1f3a6a15 KK |
505 | /* |
506 | * success: return IRQ number (>=0) | |
507 | * failure: return < 0 | |
508 | */ | |
cb654695 | 509 | int acpi_register_gsi(u32 gsi, int triggering, int polarity) |
1da177e4 LT |
510 | { |
511 | unsigned int irq; | |
512 | unsigned int plat_gsi = gsi; | |
513 | ||
514 | #ifdef CONFIG_PCI | |
515 | /* | |
516 | * Make sure all (legacy) PCI IRQs are set as level-triggered. | |
517 | */ | |
518 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { | |
cb654695 | 519 | if (triggering == ACPI_LEVEL_SENSITIVE) |
4be44fcd | 520 | eisa_set_level_irq(gsi); |
1da177e4 LT |
521 | } |
522 | #endif | |
523 | ||
524 | #ifdef CONFIG_X86_IO_APIC | |
525 | if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) { | |
cb654695 | 526 | plat_gsi = mp_register_gsi(gsi, triggering, polarity); |
1da177e4 LT |
527 | } |
528 | #endif | |
529 | acpi_gsi_to_irq(plat_gsi, &irq); | |
530 | return irq; | |
531 | } | |
4be44fcd | 532 | |
1da177e4 LT |
533 | /* |
534 | * ACPI based hotplug support for CPU | |
535 | */ | |
536 | #ifdef CONFIG_ACPI_HOTPLUG_CPU | |
009cbadb SR |
537 | |
538 | static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
1da177e4 | 539 | { |
73fea175 AR |
540 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
541 | union acpi_object *obj; | |
5f3b1a8b | 542 | struct acpi_madt_local_apic *lapic; |
73fea175 AR |
543 | cpumask_t tmp_map, new_map; |
544 | u8 physid; | |
545 | int cpu; | |
546 | ||
547 | if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer))) | |
548 | return -EINVAL; | |
549 | ||
550 | if (!buffer.length || !buffer.pointer) | |
551 | return -EINVAL; | |
552 | ||
553 | obj = buffer.pointer; | |
554 | if (obj->type != ACPI_TYPE_BUFFER || | |
555 | obj->buffer.length < sizeof(*lapic)) { | |
556 | kfree(buffer.pointer); | |
557 | return -EINVAL; | |
558 | } | |
559 | ||
5f3b1a8b | 560 | lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer; |
73fea175 | 561 | |
5f3b1a8b AS |
562 | if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC || |
563 | !(lapic->lapic_flags & ACPI_MADT_ENABLED)) { | |
73fea175 AR |
564 | kfree(buffer.pointer); |
565 | return -EINVAL; | |
566 | } | |
567 | ||
568 | physid = lapic->id; | |
569 | ||
570 | kfree(buffer.pointer); | |
571 | buffer.length = ACPI_ALLOCATE_BUFFER; | |
572 | buffer.pointer = NULL; | |
573 | ||
574 | tmp_map = cpu_present_map; | |
dfac2189 | 575 | acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED); |
73fea175 AR |
576 | |
577 | /* | |
578 | * If mp_register_lapic successfully generates a new logical cpu | |
579 | * number, then the following will get us exactly what was mapped | |
580 | */ | |
581 | cpus_andnot(new_map, cpu_present_map, tmp_map); | |
582 | if (cpus_empty(new_map)) { | |
583 | printk ("Unable to map lapic to logical cpu number\n"); | |
584 | return -EINVAL; | |
585 | } | |
586 | ||
587 | cpu = first_cpu(new_map); | |
588 | ||
589 | *pcpu = cpu; | |
590 | return 0; | |
1da177e4 | 591 | } |
1da177e4 | 592 | |
009cbadb SR |
593 | /* wrapper to silence section mismatch warning */ |
594 | int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
595 | { | |
596 | return _acpi_map_lsapic(handle, pcpu); | |
597 | } | |
4be44fcd | 598 | EXPORT_SYMBOL(acpi_map_lsapic); |
1da177e4 | 599 | |
4be44fcd | 600 | int acpi_unmap_lsapic(int cpu) |
1da177e4 | 601 | { |
71fff5e6 | 602 | per_cpu(x86_cpu_to_apicid, cpu) = -1; |
73fea175 AR |
603 | cpu_clear(cpu, cpu_present_map); |
604 | num_processors--; | |
605 | ||
606 | return (0); | |
1da177e4 | 607 | } |
4be44fcd | 608 | |
1da177e4 | 609 | EXPORT_SYMBOL(acpi_unmap_lsapic); |
4be44fcd | 610 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
1da177e4 | 611 | |
4be44fcd | 612 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
b1bb248a KK |
613 | { |
614 | /* TBD */ | |
615 | return -EINVAL; | |
616 | } | |
4be44fcd | 617 | |
b1bb248a KK |
618 | EXPORT_SYMBOL(acpi_register_ioapic); |
619 | ||
4be44fcd | 620 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
b1bb248a KK |
621 | { |
622 | /* TBD */ | |
623 | return -EINVAL; | |
624 | } | |
4be44fcd | 625 | |
b1bb248a KK |
626 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
627 | ||
5f3b1a8b | 628 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
1da177e4 | 629 | { |
5f3b1a8b | 630 | struct acpi_table_boot *sb; |
1da177e4 | 631 | |
5f3b1a8b | 632 | sb = (struct acpi_table_boot *)table; |
1da177e4 LT |
633 | if (!sb) { |
634 | printk(KERN_WARNING PREFIX "Unable to map SBF\n"); | |
635 | return -ENODEV; | |
636 | } | |
637 | ||
5f3b1a8b | 638 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
1da177e4 LT |
639 | |
640 | return 0; | |
641 | } | |
642 | ||
1da177e4 | 643 | #ifdef CONFIG_HPET_TIMER |
2d0c87c3 | 644 | #include <asm/hpet.h> |
1da177e4 | 645 | |
a1dfd851 AD |
646 | static struct __initdata resource *hpet_res; |
647 | ||
5f3b1a8b | 648 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
1da177e4 LT |
649 | { |
650 | struct acpi_table_hpet *hpet_tbl; | |
651 | ||
5f3b1a8b | 652 | hpet_tbl = (struct acpi_table_hpet *)table; |
1da177e4 LT |
653 | if (!hpet_tbl) { |
654 | printk(KERN_WARNING PREFIX "Unable to map HPET\n"); | |
655 | return -ENODEV; | |
656 | } | |
657 | ||
ad363f80 | 658 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
1da177e4 LT |
659 | printk(KERN_WARNING PREFIX "HPET timers must be located in " |
660 | "memory.\n"); | |
661 | return -1; | |
662 | } | |
f0f4c343 | 663 | |
2d0c87c3 | 664 | hpet_address = hpet_tbl->address.address; |
f4df73c2 TG |
665 | |
666 | /* | |
667 | * Some broken BIOSes advertise HPET at 0x0. We really do not | |
668 | * want to allocate a resource there. | |
669 | */ | |
670 | if (!hpet_address) { | |
671 | printk(KERN_WARNING PREFIX | |
672 | "HPET id: %#x base: %#lx is invalid\n", | |
673 | hpet_tbl->id, hpet_address); | |
674 | return 0; | |
675 | } | |
676 | #ifdef CONFIG_X86_64 | |
677 | /* | |
678 | * Some even more broken BIOSes advertise HPET at | |
679 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add | |
680 | * some noise: | |
681 | */ | |
682 | if (hpet_address == 0xfed0000000000000UL) { | |
683 | if (!hpet_force_user) { | |
684 | printk(KERN_WARNING PREFIX "HPET id: %#x " | |
685 | "base: 0xfed0000000000000 is bogus\n " | |
686 | "try hpet=force on the kernel command line to " | |
687 | "fix it up to 0xfed00000.\n", hpet_tbl->id); | |
688 | hpet_address = 0; | |
689 | return 0; | |
690 | } | |
691 | printk(KERN_WARNING PREFIX | |
692 | "HPET id: %#x base: 0xfed0000000000000 fixed up " | |
693 | "to 0xfed00000.\n", hpet_tbl->id); | |
694 | hpet_address >>= 32; | |
695 | } | |
696 | #endif | |
4be44fcd | 697 | printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", |
2d0c87c3 | 698 | hpet_tbl->id, hpet_address); |
1da177e4 | 699 | |
a1dfd851 AD |
700 | /* |
701 | * Allocate and initialize the HPET firmware resource for adding into | |
702 | * the resource tree during the lateinit timeframe. | |
703 | */ | |
704 | #define HPET_RESOURCE_NAME_SIZE 9 | |
705 | hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); | |
706 | ||
a1dfd851 AD |
707 | hpet_res->name = (void *)&hpet_res[1]; |
708 | hpet_res->flags = IORESOURCE_MEM; | |
709 | snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", | |
710 | hpet_tbl->sequence); | |
711 | ||
712 | hpet_res->start = hpet_address; | |
713 | hpet_res->end = hpet_address + (1 * 1024) - 1; | |
714 | ||
1da177e4 LT |
715 | return 0; |
716 | } | |
a1dfd851 AD |
717 | |
718 | /* | |
719 | * hpet_insert_resource inserts the HPET resources used into the resource | |
720 | * tree. | |
721 | */ | |
722 | static __init int hpet_insert_resource(void) | |
723 | { | |
724 | if (!hpet_res) | |
725 | return 1; | |
726 | ||
727 | return insert_resource(&iomem_resource, hpet_res); | |
728 | } | |
729 | ||
730 | late_initcall(hpet_insert_resource); | |
731 | ||
1da177e4 LT |
732 | #else |
733 | #define acpi_parse_hpet NULL | |
734 | #endif | |
735 | ||
5f3b1a8b | 736 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
1da177e4 | 737 | { |
90660ec3 | 738 | |
1da177e4 LT |
739 | #ifdef CONFIG_X86_PM_TIMER |
740 | /* detect the location of the ACPI PM Timer */ | |
5f3b1a8b | 741 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
1da177e4 | 742 | /* FADT rev. 2 */ |
5f3b1a8b | 743 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
4be44fcd | 744 | ACPI_ADR_SPACE_SYSTEM_IO) |
1da177e4 LT |
745 | return 0; |
746 | ||
5f3b1a8b | 747 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
e6e87b4b DSL |
748 | /* |
749 | * "X" fields are optional extensions to the original V1.0 | |
750 | * fields, so we must selectively expand V1.0 fields if the | |
751 | * corresponding X field is zero. | |
752 | */ | |
753 | if (!pmtmr_ioport) | |
5f3b1a8b | 754 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
755 | } else { |
756 | /* FADT rev. 1 */ | |
5f3b1a8b | 757 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
758 | } |
759 | if (pmtmr_ioport) | |
4be44fcd LB |
760 | printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n", |
761 | pmtmr_ioport); | |
1da177e4 LT |
762 | #endif |
763 | return 0; | |
764 | } | |
765 | ||
1da177e4 LT |
766 | #ifdef CONFIG_X86_LOCAL_APIC |
767 | /* | |
768 | * Parse LAPIC entries in MADT | |
769 | * returns 0 on success, < 0 on error | |
770 | */ | |
31d2092e AS |
771 | |
772 | static void __init acpi_register_lapic_address(unsigned long address) | |
773 | { | |
774 | mp_lapic_addr = address; | |
775 | ||
776 | set_fixmap_nocache(FIX_APIC_BASE, address); | |
fb3bbd6a | 777 | if (boot_cpu_physical_apicid == -1U) { |
31d2092e | 778 | boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); |
fb3bbd6a YL |
779 | #ifdef CONFIG_X86_32 |
780 | apic_version[boot_cpu_physical_apicid] = | |
781 | GET_APIC_VERSION(apic_read(APIC_LVR)); | |
782 | #endif | |
783 | } | |
31d2092e AS |
784 | } |
785 | ||
cbf9bd60 YL |
786 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
787 | { | |
788 | int count; | |
789 | ||
790 | if (!cpu_has_apic) | |
791 | return -ENODEV; | |
792 | ||
793 | /* | |
794 | * Note that the LAPIC address is obtained from the MADT (32-bit value) | |
795 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
796 | */ | |
797 | ||
798 | count = | |
799 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, | |
800 | acpi_parse_lapic_addr_ovr, 0); | |
801 | if (count < 0) { | |
802 | printk(KERN_ERR PREFIX | |
803 | "Error parsing LAPIC address override entry\n"); | |
804 | return count; | |
805 | } | |
806 | ||
807 | acpi_register_lapic_address(acpi_lapic_addr); | |
808 | ||
809 | return count; | |
810 | } | |
811 | ||
4be44fcd | 812 | static int __init acpi_parse_madt_lapic_entries(void) |
1da177e4 LT |
813 | { |
814 | int count; | |
815 | ||
0fcd2709 AK |
816 | if (!cpu_has_apic) |
817 | return -ENODEV; | |
818 | ||
5f3b1a8b | 819 | /* |
1da177e4 LT |
820 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
821 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
822 | */ | |
823 | ||
4be44fcd | 824 | count = |
5f3b1a8b | 825 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
4be44fcd | 826 | acpi_parse_lapic_addr_ovr, 0); |
1da177e4 | 827 | if (count < 0) { |
4be44fcd LB |
828 | printk(KERN_ERR PREFIX |
829 | "Error parsing LAPIC address override entry\n"); | |
1da177e4 LT |
830 | return count; |
831 | } | |
832 | ||
31d2092e | 833 | acpi_register_lapic_address(acpi_lapic_addr); |
1da177e4 | 834 | |
ac049c1d JS |
835 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, |
836 | acpi_parse_sapic, MAX_APICS); | |
837 | ||
838 | if (!count) | |
839 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, | |
840 | acpi_parse_lapic, MAX_APICS); | |
4be44fcd | 841 | if (!count) { |
1da177e4 LT |
842 | printk(KERN_ERR PREFIX "No LAPIC entries present\n"); |
843 | /* TBD: Cleanup to allow fallback to MPS */ | |
844 | return -ENODEV; | |
4be44fcd | 845 | } else if (count < 0) { |
1da177e4 LT |
846 | printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n"); |
847 | /* TBD: Cleanup to allow fallback to MPS */ | |
848 | return count; | |
849 | } | |
850 | ||
4be44fcd | 851 | count = |
5f3b1a8b | 852 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0); |
1da177e4 LT |
853 | if (count < 0) { |
854 | printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n"); | |
855 | /* TBD: Cleanup to allow fallback to MPS */ | |
856 | return count; | |
857 | } | |
858 | return 0; | |
859 | } | |
4be44fcd | 860 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 861 | |
8466361a | 862 | #ifdef CONFIG_X86_IO_APIC |
11113f84 AS |
863 | #define MP_ISA_BUS 0 |
864 | ||
d49c4288 | 865 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
866 | extern int es7000_plat; |
867 | #endif | |
868 | ||
5f895148 AS |
869 | static struct { |
870 | int apic_id; | |
871 | int gsi_base; | |
872 | int gsi_end; | |
873 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | |
874 | } mp_ioapic_routing[MAX_IO_APICS]; | |
11113f84 AS |
875 | |
876 | static int mp_find_ioapic(int gsi) | |
877 | { | |
878 | int i = 0; | |
879 | ||
880 | /* Find the IOAPIC that manages this GSI. */ | |
881 | for (i = 0; i < nr_ioapics; i++) { | |
882 | if ((gsi >= mp_ioapic_routing[i].gsi_base) | |
883 | && (gsi <= mp_ioapic_routing[i].gsi_end)) | |
884 | return i; | |
885 | } | |
886 | ||
887 | printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); | |
888 | return -1; | |
889 | } | |
890 | ||
891 | static u8 __init uniq_ioapic_id(u8 id) | |
892 | { | |
893 | #ifdef CONFIG_X86_32 | |
894 | if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && | |
895 | !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) | |
896 | return io_apic_get_unique_id(nr_ioapics, id); | |
897 | else | |
898 | return id; | |
899 | #else | |
900 | int i; | |
901 | DECLARE_BITMAP(used, 256); | |
902 | bitmap_zero(used, 256); | |
903 | for (i = 0; i < nr_ioapics; i++) { | |
ec2cd0a2 AS |
904 | struct mp_config_ioapic *ia = &mp_ioapics[i]; |
905 | __set_bit(ia->mp_apicid, used); | |
11113f84 AS |
906 | } |
907 | if (!test_bit(id, used)) | |
908 | return id; | |
909 | return find_first_zero_bit(used, 256); | |
910 | #endif | |
911 | } | |
912 | ||
913 | static int bad_ioapic(unsigned long address) | |
914 | { | |
915 | if (nr_ioapics >= MAX_IO_APICS) { | |
916 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
917 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
918 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
919 | } | |
920 | if (!address) { | |
921 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
922 | " found in table, skipping!\n"); | |
923 | return 1; | |
924 | } | |
925 | return 0; | |
926 | } | |
927 | ||
928 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) | |
929 | { | |
930 | int idx = 0; | |
931 | ||
932 | if (bad_ioapic(address)) | |
933 | return; | |
934 | ||
935 | idx = nr_ioapics; | |
936 | ||
ec2cd0a2 AS |
937 | mp_ioapics[idx].mp_type = MP_IOAPIC; |
938 | mp_ioapics[idx].mp_flags = MPC_APIC_USABLE; | |
939 | mp_ioapics[idx].mp_apicaddr = address; | |
11113f84 AS |
940 | |
941 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); | |
ec2cd0a2 | 942 | mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id); |
11113f84 | 943 | #ifdef CONFIG_X86_32 |
ec2cd0a2 | 944 | mp_ioapics[idx].mp_apicver = io_apic_get_version(idx); |
11113f84 | 945 | #else |
ec2cd0a2 | 946 | mp_ioapics[idx].mp_apicver = 0; |
11113f84 AS |
947 | #endif |
948 | /* | |
949 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups | |
950 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). | |
951 | */ | |
ec2cd0a2 | 952 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid; |
11113f84 AS |
953 | mp_ioapic_routing[idx].gsi_base = gsi_base; |
954 | mp_ioapic_routing[idx].gsi_end = gsi_base + | |
955 | io_apic_get_redir_entries(idx); | |
956 | ||
ec2cd0a2 AS |
957 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, " |
958 | "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid, | |
959 | mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr, | |
11113f84 AS |
960 | mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); |
961 | ||
962 | nr_ioapics++; | |
963 | } | |
964 | ||
fcfa146e YL |
965 | static void assign_to_mp_irq(struct mp_config_intsrc *m, |
966 | struct mp_config_intsrc *mp_irq) | |
967 | { | |
968 | memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
969 | } | |
970 | ||
971 | static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, | |
972 | struct mp_config_intsrc *m) | |
973 | { | |
974 | return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
975 | } | |
976 | ||
977 | static void save_mp_irq(struct mp_config_intsrc *m) | |
978 | { | |
979 | int i; | |
980 | ||
981 | for (i = 0; i < mp_irq_entries; i++) { | |
982 | if (!mp_irq_cmp(&mp_irqs[i], m)) | |
983 | return; | |
984 | } | |
985 | ||
986 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
987 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | |
988 | panic("Max # of irq sources exceeded!!\n"); | |
989 | } | |
990 | ||
11113f84 AS |
991 | void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) |
992 | { | |
6df8809b YL |
993 | int ioapic; |
994 | int pin; | |
fcfa146e | 995 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
996 | |
997 | /* | |
998 | * Convert 'gsi' to 'ioapic.pin'. | |
999 | */ | |
1000 | ioapic = mp_find_ioapic(gsi); | |
1001 | if (ioapic < 0) | |
1002 | return; | |
1003 | pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1004 | ||
1005 | /* | |
1006 | * TBD: This check is for faulty timer entries, where the override | |
1007 | * erroneously sets the trigger to level, resulting in a HUGE | |
1008 | * increase of timer interrupts! | |
1009 | */ | |
1010 | if ((bus_irq == 0) && (trigger == 3)) | |
1011 | trigger = 1; | |
1012 | ||
fcfa146e YL |
1013 | mp_irq.mp_type = MP_INTSRC; |
1014 | mp_irq.mp_irqtype = mp_INT; | |
1015 | mp_irq.mp_irqflag = (trigger << 2) | polarity; | |
1016 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1017 | mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ | |
1018 | mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */ | |
1019 | mp_irq.mp_dstirq = pin; /* INTIN# */ | |
11113f84 | 1020 | |
fcfa146e | 1021 | save_mp_irq(&mp_irq); |
11113f84 AS |
1022 | } |
1023 | ||
1024 | void __init mp_config_acpi_legacy_irqs(void) | |
1025 | { | |
6df8809b YL |
1026 | int i; |
1027 | int ioapic; | |
1028 | unsigned int dstapic; | |
fcfa146e | 1029 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
1030 | |
1031 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) | |
1032 | /* | |
1033 | * Fabricate the legacy ISA bus (bus #31). | |
1034 | */ | |
1035 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; | |
1036 | #endif | |
1037 | set_bit(MP_ISA_BUS, mp_bus_not_pci); | |
cfc1b9a6 | 1038 | pr_debug("Bus #%d is ISA\n", MP_ISA_BUS); |
11113f84 | 1039 | |
d49c4288 | 1040 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
1041 | /* |
1042 | * Older generations of ES7000 have no legacy identity mappings | |
1043 | */ | |
1044 | if (es7000_plat == 1) | |
1045 | return; | |
1046 | #endif | |
1047 | ||
1048 | /* | |
1049 | * Locate the IOAPIC that manages the ISA IRQs (0-15). | |
1050 | */ | |
1051 | ioapic = mp_find_ioapic(0); | |
1052 | if (ioapic < 0) | |
1053 | return; | |
6df8809b | 1054 | dstapic = mp_ioapics[ioapic].mp_apicid; |
11113f84 | 1055 | |
11113f84 AS |
1056 | /* |
1057 | * Use the default configuration for the IRQs 0-15. Unless | |
1058 | * overridden by (MADT) interrupt source override entries. | |
1059 | */ | |
1060 | for (i = 0; i < 16; i++) { | |
1061 | int idx; | |
1062 | ||
1063 | for (idx = 0; idx < mp_irq_entries; idx++) { | |
2fddb6e2 | 1064 | struct mp_config_intsrc *irq = mp_irqs + idx; |
11113f84 AS |
1065 | |
1066 | /* Do we already have a mapping for this ISA IRQ? */ | |
2fddb6e2 AS |
1067 | if (irq->mp_srcbus == MP_ISA_BUS |
1068 | && irq->mp_srcbusirq == i) | |
11113f84 AS |
1069 | break; |
1070 | ||
1071 | /* Do we already have a mapping for this IOAPIC pin */ | |
6df8809b YL |
1072 | if (irq->mp_dstapic == dstapic && |
1073 | irq->mp_dstirq == i) | |
11113f84 AS |
1074 | break; |
1075 | } | |
1076 | ||
1077 | if (idx != mp_irq_entries) { | |
1078 | printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); | |
1079 | continue; /* IRQ already used */ | |
1080 | } | |
1081 | ||
fcfa146e YL |
1082 | mp_irq.mp_type = MP_INTSRC; |
1083 | mp_irq.mp_irqflag = 0; /* Conforming */ | |
1084 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1085 | mp_irq.mp_dstapic = dstapic; | |
1086 | mp_irq.mp_irqtype = mp_INT; | |
1087 | mp_irq.mp_srcbusirq = i; /* Identity mapped */ | |
1088 | mp_irq.mp_dstirq = i; | |
11113f84 | 1089 | |
fcfa146e | 1090 | save_mp_irq(&mp_irq); |
11113f84 AS |
1091 | } |
1092 | } | |
1093 | ||
1094 | int mp_register_gsi(u32 gsi, int triggering, int polarity) | |
1095 | { | |
1096 | int ioapic; | |
1097 | int ioapic_pin; | |
1098 | #ifdef CONFIG_X86_32 | |
1099 | #define MAX_GSI_NUM 4096 | |
1100 | #define IRQ_COMPRESSION_START 64 | |
1101 | ||
1102 | static int pci_irq = IRQ_COMPRESSION_START; | |
1103 | /* | |
1104 | * Mapping between Global System Interrupts, which | |
1105 | * represent all possible interrupts, and IRQs | |
1106 | * assigned to actual devices. | |
1107 | */ | |
1108 | static int gsi_to_irq[MAX_GSI_NUM]; | |
1109 | #else | |
1110 | ||
1111 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | |
1112 | return gsi; | |
1113 | #endif | |
1114 | ||
1115 | /* Don't set up the ACPI SCI because it's already set up */ | |
1116 | if (acpi_gbl_FADT.sci_interrupt == gsi) | |
1117 | return gsi; | |
1118 | ||
1119 | ioapic = mp_find_ioapic(gsi); | |
1120 | if (ioapic < 0) { | |
1121 | printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); | |
1122 | return gsi; | |
1123 | } | |
1124 | ||
1125 | ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1126 | ||
1127 | #ifdef CONFIG_X86_32 | |
1128 | if (ioapic_renumber_irq) | |
1129 | gsi = ioapic_renumber_irq(ioapic, gsi); | |
1130 | #endif | |
1131 | ||
1132 | /* | |
1133 | * Avoid pin reprogramming. PRTs typically include entries | |
1134 | * with redundant pin->gsi mappings (but unique PCI devices); | |
1135 | * we only program the IOAPIC on the first. | |
1136 | */ | |
1137 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | |
1138 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | |
1139 | "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, | |
1140 | ioapic_pin); | |
1141 | return gsi; | |
1142 | } | |
1143 | if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { | |
cfc1b9a6 TG |
1144 | pr_debug(KERN_DEBUG "Pin %d-%d already programmed\n", |
1145 | mp_ioapic_routing[ioapic].apic_id, ioapic_pin); | |
11113f84 AS |
1146 | #ifdef CONFIG_X86_32 |
1147 | return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); | |
1148 | #else | |
1149 | return gsi; | |
1150 | #endif | |
1151 | } | |
1152 | ||
1153 | set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); | |
1154 | #ifdef CONFIG_X86_32 | |
1155 | /* | |
1156 | * For GSI >= 64, use IRQ compression | |
1157 | */ | |
1158 | if ((gsi >= IRQ_COMPRESSION_START) | |
1159 | && (triggering == ACPI_LEVEL_SENSITIVE)) { | |
1160 | /* | |
1161 | * For PCI devices assign IRQs in order, avoiding gaps | |
1162 | * due to unused I/O APIC pins. | |
1163 | */ | |
1164 | int irq = gsi; | |
1165 | if (gsi < MAX_GSI_NUM) { | |
1166 | /* | |
1167 | * Retain the VIA chipset work-around (gsi > 15), but | |
1168 | * avoid a problem where the 8254 timer (IRQ0) is setup | |
1169 | * via an override (so it's not on pin 0 of the ioapic), | |
1170 | * and at the same time, the pin 0 interrupt is a PCI | |
1171 | * type. The gsi > 15 test could cause these two pins | |
1172 | * to be shared as IRQ0, and they are not shareable. | |
1173 | * So test for this condition, and if necessary, avoid | |
1174 | * the pin collision. | |
1175 | */ | |
1176 | gsi = pci_irq++; | |
1177 | /* | |
1178 | * Don't assign IRQ used by ACPI SCI | |
1179 | */ | |
1180 | if (gsi == acpi_gbl_FADT.sci_interrupt) | |
1181 | gsi = pci_irq++; | |
1182 | gsi_to_irq[irq] = gsi; | |
1183 | } else { | |
1184 | printk(KERN_ERR "GSI %u is too high\n", gsi); | |
1185 | return gsi; | |
1186 | } | |
1187 | } | |
1188 | #endif | |
1189 | io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, | |
1190 | triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, | |
1191 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | |
1192 | return gsi; | |
1193 | } | |
1194 | ||
2944e16b YL |
1195 | int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, |
1196 | u32 gsi, int triggering, int polarity) | |
1197 | { | |
fcfa146e YL |
1198 | #ifdef CONFIG_X86_MPPARSE |
1199 | struct mp_config_intsrc mp_irq; | |
2944e16b YL |
1200 | int ioapic; |
1201 | ||
fcfa146e | 1202 | if (!acpi_ioapic) |
d867e531 YL |
1203 | return 0; |
1204 | ||
2944e16b | 1205 | /* print the entry should happen on mptable identically */ |
fcfa146e YL |
1206 | mp_irq.mp_type = MP_INTSRC; |
1207 | mp_irq.mp_irqtype = mp_INT; | |
1208 | mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | |
2944e16b | 1209 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
fcfa146e YL |
1210 | mp_irq.mp_srcbus = number; |
1211 | mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | |
2944e16b | 1212 | ioapic = mp_find_ioapic(gsi); |
fcfa146e YL |
1213 | mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; |
1214 | mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
2944e16b | 1215 | |
fcfa146e YL |
1216 | save_mp_irq(&mp_irq); |
1217 | #endif | |
2944e16b YL |
1218 | return 0; |
1219 | } | |
1220 | ||
1da177e4 LT |
1221 | /* |
1222 | * Parse IOAPIC related entries in MADT | |
1223 | * returns 0 on success, < 0 on error | |
1224 | */ | |
4be44fcd | 1225 | static int __init acpi_parse_madt_ioapic_entries(void) |
1da177e4 LT |
1226 | { |
1227 | int count; | |
1228 | ||
1229 | /* | |
1230 | * ACPI interpreter is required to complete interrupt setup, | |
1231 | * so if it is off, don't enumerate the io-apics with ACPI. | |
1232 | * If MPS is present, it will handle them, | |
1233 | * otherwise the system will stay in PIC mode | |
1234 | */ | |
1235 | if (acpi_disabled || acpi_noirq) { | |
1236 | return -ENODEV; | |
4be44fcd | 1237 | } |
1da177e4 | 1238 | |
5f3b1a8b | 1239 | if (!cpu_has_apic) |
d3b6a349 AK |
1240 | return -ENODEV; |
1241 | ||
1da177e4 | 1242 | /* |
4be44fcd | 1243 | * if "noapic" boot option, don't look for IO-APICs |
1da177e4 LT |
1244 | */ |
1245 | if (skip_ioapic_setup) { | |
1246 | printk(KERN_INFO PREFIX "Skipping IOAPIC probe " | |
4be44fcd | 1247 | "due to 'noapic' option.\n"); |
1da177e4 LT |
1248 | return -ENODEV; |
1249 | } | |
1250 | ||
4be44fcd | 1251 | count = |
5f3b1a8b | 1252 | acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, |
4be44fcd | 1253 | MAX_IO_APICS); |
1da177e4 LT |
1254 | if (!count) { |
1255 | printk(KERN_ERR PREFIX "No IOAPIC entries present\n"); | |
1256 | return -ENODEV; | |
4be44fcd | 1257 | } else if (count < 0) { |
1da177e4 LT |
1258 | printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n"); |
1259 | return count; | |
1260 | } | |
1261 | ||
4be44fcd | 1262 | count = |
5f3b1a8b | 1263 | acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr, |
4be44fcd | 1264 | NR_IRQ_VECTORS); |
1da177e4 | 1265 | if (count < 0) { |
4be44fcd LB |
1266 | printk(KERN_ERR PREFIX |
1267 | "Error parsing interrupt source overrides entry\n"); | |
1da177e4 LT |
1268 | /* TBD: Cleanup to allow fallback to MPS */ |
1269 | return count; | |
1270 | } | |
1271 | ||
1272 | /* | |
1273 | * If BIOS did not supply an INT_SRC_OVR for the SCI | |
1274 | * pretend we got one so we can set the SCI flags. | |
1275 | */ | |
1276 | if (!acpi_sci_override_gsi) | |
cee324b1 | 1277 | acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); |
1da177e4 LT |
1278 | |
1279 | /* Fill in identity legacy mapings where no override */ | |
1280 | mp_config_acpi_legacy_irqs(); | |
1281 | ||
4be44fcd | 1282 | count = |
5f3b1a8b | 1283 | acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src, |
4be44fcd | 1284 | NR_IRQ_VECTORS); |
1da177e4 LT |
1285 | if (count < 0) { |
1286 | printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); | |
1287 | /* TBD: Cleanup to allow fallback to MPS */ | |
1288 | return count; | |
1289 | } | |
1290 | ||
1291 | return 0; | |
1292 | } | |
1293 | #else | |
1294 | static inline int acpi_parse_madt_ioapic_entries(void) | |
1295 | { | |
1296 | return -1; | |
1297 | } | |
8466361a | 1298 | #endif /* !CONFIG_X86_IO_APIC */ |
1da177e4 | 1299 | |
cbf9bd60 YL |
1300 | static void __init early_acpi_process_madt(void) |
1301 | { | |
1302 | #ifdef CONFIG_X86_LOCAL_APIC | |
1303 | int error; | |
1304 | ||
1305 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { | |
1306 | ||
1307 | /* | |
1308 | * Parse MADT LAPIC entries | |
1309 | */ | |
1310 | error = early_acpi_parse_madt_lapic_addr_ovr(); | |
1311 | if (!error) { | |
1312 | acpi_lapic = 1; | |
1313 | smp_found_config = 1; | |
1314 | } | |
1315 | if (error == -EINVAL) { | |
1316 | /* | |
1317 | * Dell Precision Workstation 410, 610 come here. | |
1318 | */ | |
1319 | printk(KERN_ERR PREFIX | |
1320 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1321 | disable_acpi(); | |
1322 | } | |
1323 | } | |
1324 | #endif | |
1325 | } | |
1326 | ||
4be44fcd | 1327 | static void __init acpi_process_madt(void) |
1da177e4 LT |
1328 | { |
1329 | #ifdef CONFIG_X86_LOCAL_APIC | |
7f8f97c3 | 1330 | int error; |
1da177e4 | 1331 | |
7f8f97c3 | 1332 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { |
1da177e4 LT |
1333 | |
1334 | /* | |
1335 | * Parse MADT LAPIC entries | |
1336 | */ | |
1337 | error = acpi_parse_madt_lapic_entries(); | |
1338 | if (!error) { | |
1339 | acpi_lapic = 1; | |
1340 | ||
911a62d4 VP |
1341 | #ifdef CONFIG_X86_GENERICARCH |
1342 | generic_bigsmp_probe(); | |
1343 | #endif | |
1da177e4 LT |
1344 | /* |
1345 | * Parse MADT IO-APIC entries | |
1346 | */ | |
1347 | error = acpi_parse_madt_ioapic_entries(); | |
1348 | if (!error) { | |
1349 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; | |
1350 | acpi_irq_balance_set(NULL); | |
1351 | acpi_ioapic = 1; | |
1352 | ||
1353 | smp_found_config = 1; | |
3c43f039 | 1354 | setup_apic_routing(); |
1da177e4 LT |
1355 | } |
1356 | } | |
1357 | if (error == -EINVAL) { | |
1358 | /* | |
1359 | * Dell Precision Workstation 410, 610 come here. | |
1360 | */ | |
4be44fcd LB |
1361 | printk(KERN_ERR PREFIX |
1362 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1da177e4 LT |
1363 | disable_acpi(); |
1364 | } | |
1365 | } | |
1366 | #endif | |
1367 | return; | |
1368 | } | |
1369 | ||
1855256c | 1370 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
aea00143 AP |
1371 | { |
1372 | if (!acpi_force) { | |
1373 | printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n", | |
1374 | d->ident); | |
1375 | acpi_noirq_set(); | |
1376 | } | |
1377 | return 0; | |
1378 | } | |
1379 | ||
1855256c | 1380 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
aea00143 AP |
1381 | { |
1382 | if (!acpi_force) { | |
1383 | printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n", | |
1384 | d->ident); | |
1385 | acpi_disable_pci(); | |
1386 | } | |
1387 | return 0; | |
1388 | } | |
aea00143 | 1389 | |
1855256c | 1390 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
aea00143 AP |
1391 | { |
1392 | if (!acpi_force) { | |
4be44fcd | 1393 | printk(KERN_NOTICE "%s detected: acpi off\n", d->ident); |
aea00143 AP |
1394 | disable_acpi(); |
1395 | } else { | |
1396 | printk(KERN_NOTICE | |
1397 | "Warning: DMI blacklist says broken, but acpi forced\n"); | |
1398 | } | |
1399 | return 0; | |
1400 | } | |
1401 | ||
1402 | /* | |
1403 | * Limit ACPI to CPU enumeration for HT | |
1404 | */ | |
1855256c | 1405 | static int __init force_acpi_ht(const struct dmi_system_id *d) |
aea00143 AP |
1406 | { |
1407 | if (!acpi_force) { | |
4be44fcd LB |
1408 | printk(KERN_NOTICE "%s detected: force use of acpi=ht\n", |
1409 | d->ident); | |
aea00143 AP |
1410 | disable_acpi(); |
1411 | acpi_ht = 1; | |
1412 | } else { | |
1413 | printk(KERN_NOTICE | |
1414 | "Warning: acpi=force overrules DMI blacklist: acpi=ht\n"); | |
1415 | } | |
1416 | return 0; | |
1417 | } | |
1418 | ||
e2079c43 RW |
1419 | /* |
1420 | * Force ignoring BIOS IRQ0 pin2 override | |
1421 | */ | |
1422 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) | |
1423 | { | |
1424 | pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", d->ident); | |
1425 | acpi_skip_timer_override = 1; | |
e2079c43 RW |
1426 | return 0; |
1427 | } | |
1428 | ||
aea00143 AP |
1429 | /* |
1430 | * If your system is blacklisted here, but you find that acpi=force | |
1431 | * works for you, please contact acpi-devel@sourceforge.net | |
1432 | */ | |
1433 | static struct dmi_system_id __initdata acpi_dmi_table[] = { | |
1434 | /* | |
1435 | * Boxes that need ACPI disabled | |
1436 | */ | |
1437 | { | |
4be44fcd LB |
1438 | .callback = dmi_disable_acpi, |
1439 | .ident = "IBM Thinkpad", | |
1440 | .matches = { | |
1441 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1442 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), | |
1443 | }, | |
1444 | }, | |
aea00143 AP |
1445 | |
1446 | /* | |
1447 | * Boxes that need acpi=ht | |
1448 | */ | |
1449 | { | |
4be44fcd LB |
1450 | .callback = force_acpi_ht, |
1451 | .ident = "FSC Primergy T850", | |
1452 | .matches = { | |
1453 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | |
1454 | DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"), | |
1455 | }, | |
1456 | }, | |
aea00143 | 1457 | { |
4be44fcd LB |
1458 | .callback = force_acpi_ht, |
1459 | .ident = "HP VISUALIZE NT Workstation", | |
1460 | .matches = { | |
1461 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
1462 | DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"), | |
1463 | }, | |
1464 | }, | |
aea00143 | 1465 | { |
4be44fcd LB |
1466 | .callback = force_acpi_ht, |
1467 | .ident = "Compaq Workstation W8000", | |
1468 | .matches = { | |
1469 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | |
1470 | DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"), | |
1471 | }, | |
1472 | }, | |
aea00143 | 1473 | { |
4be44fcd LB |
1474 | .callback = force_acpi_ht, |
1475 | .ident = "ASUS P4B266", | |
1476 | .matches = { | |
1477 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1478 | DMI_MATCH(DMI_BOARD_NAME, "P4B266"), | |
1479 | }, | |
1480 | }, | |
aea00143 | 1481 | { |
4be44fcd LB |
1482 | .callback = force_acpi_ht, |
1483 | .ident = "ASUS P2B-DS", | |
1484 | .matches = { | |
1485 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1486 | DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"), | |
1487 | }, | |
1488 | }, | |
aea00143 | 1489 | { |
4be44fcd LB |
1490 | .callback = force_acpi_ht, |
1491 | .ident = "ASUS CUR-DLS", | |
1492 | .matches = { | |
1493 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1494 | DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"), | |
1495 | }, | |
1496 | }, | |
aea00143 | 1497 | { |
4be44fcd LB |
1498 | .callback = force_acpi_ht, |
1499 | .ident = "ABIT i440BX-W83977", | |
1500 | .matches = { | |
1501 | DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"), | |
1502 | DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"), | |
1503 | }, | |
1504 | }, | |
aea00143 | 1505 | { |
4be44fcd LB |
1506 | .callback = force_acpi_ht, |
1507 | .ident = "IBM Bladecenter", | |
1508 | .matches = { | |
1509 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1510 | DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"), | |
1511 | }, | |
1512 | }, | |
aea00143 | 1513 | { |
4be44fcd LB |
1514 | .callback = force_acpi_ht, |
1515 | .ident = "IBM eServer xSeries 360", | |
1516 | .matches = { | |
1517 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1518 | DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"), | |
1519 | }, | |
1520 | }, | |
aea00143 | 1521 | { |
4be44fcd LB |
1522 | .callback = force_acpi_ht, |
1523 | .ident = "IBM eserver xSeries 330", | |
1524 | .matches = { | |
1525 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1526 | DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"), | |
1527 | }, | |
1528 | }, | |
aea00143 | 1529 | { |
4be44fcd LB |
1530 | .callback = force_acpi_ht, |
1531 | .ident = "IBM eserver xSeries 440", | |
1532 | .matches = { | |
1533 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1534 | DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"), | |
1535 | }, | |
1536 | }, | |
aea00143 | 1537 | |
aea00143 AP |
1538 | /* |
1539 | * Boxes that need ACPI PCI IRQ routing disabled | |
1540 | */ | |
1541 | { | |
4be44fcd LB |
1542 | .callback = disable_acpi_irq, |
1543 | .ident = "ASUS A7V", | |
1544 | .matches = { | |
1545 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), | |
1546 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), | |
1547 | /* newer BIOS, Revision 1011, does work */ | |
1548 | DMI_MATCH(DMI_BIOS_VERSION, | |
1549 | "ASUS A7V ACPI BIOS Revision 1007"), | |
1550 | }, | |
1551 | }, | |
74586fca LB |
1552 | { |
1553 | /* | |
1554 | * Latest BIOS for IBM 600E (1.16) has bad pcinum | |
1555 | * for LPC bridge, which is needed for the PCI | |
1556 | * interrupt links to work. DSDT fix is in bug 5966. | |
1557 | * 2645, 2646 model numbers are shared with 600/600E/600X | |
1558 | */ | |
1559 | .callback = disable_acpi_irq, | |
1560 | .ident = "IBM Thinkpad 600 Series 2645", | |
1561 | .matches = { | |
1562 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1563 | DMI_MATCH(DMI_BOARD_NAME, "2645"), | |
1564 | }, | |
1565 | }, | |
1566 | { | |
1567 | .callback = disable_acpi_irq, | |
1568 | .ident = "IBM Thinkpad 600 Series 2646", | |
1569 | .matches = { | |
1570 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1571 | DMI_MATCH(DMI_BOARD_NAME, "2646"), | |
1572 | }, | |
1573 | }, | |
aea00143 AP |
1574 | /* |
1575 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled | |
1576 | */ | |
4be44fcd LB |
1577 | { /* _BBN 0 bug */ |
1578 | .callback = disable_acpi_pci, | |
1579 | .ident = "ASUS PR-DLS", | |
1580 | .matches = { | |
1581 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1582 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), | |
1583 | DMI_MATCH(DMI_BIOS_VERSION, | |
1584 | "ASUS PR-DLS ACPI BIOS Revision 1010"), | |
1585 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") | |
1586 | }, | |
1587 | }, | |
aea00143 | 1588 | { |
4be44fcd LB |
1589 | .callback = disable_acpi_pci, |
1590 | .ident = "Acer TravelMate 36x Laptop", | |
1591 | .matches = { | |
1592 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
1593 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), | |
1594 | }, | |
1595 | }, | |
e2079c43 RW |
1596 | /* |
1597 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1598 | * which includes some code which overrides all temperature | |
1599 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1600 | * is enabled. This input is incorrectly designated the | |
1601 | * ISA IRQ 0 via an interrupt source override even though | |
1602 | * it is wired to the output of the master 8259A and INTIN0 | |
1603 | * is not connected at all. Force ignoring BIOS IRQ0 pin2 | |
1604 | * override in that cases. | |
1605 | */ | |
1606 | { | |
1607 | .callback = dmi_ignore_irq0_timer_override, | |
1608 | .ident = "HP NX6125 laptop", | |
1609 | .matches = { | |
1610 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1611 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1612 | }, | |
1613 | }, | |
1614 | { | |
1615 | .callback = dmi_ignore_irq0_timer_override, | |
1616 | .ident = "HP NX6325 laptop", | |
1617 | .matches = { | |
1618 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1619 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1620 | }, | |
1621 | }, | |
4be44fcd | 1622 | {} |
aea00143 AP |
1623 | }; |
1624 | ||
1da177e4 LT |
1625 | /* |
1626 | * acpi_boot_table_init() and acpi_boot_init() | |
1627 | * called from setup_arch(), always. | |
1628 | * 1. checksums all tables | |
1629 | * 2. enumerates lapics | |
1630 | * 3. enumerates io-apics | |
1631 | * | |
1632 | * acpi_table_init() is separate to allow reading SRAT without | |
1633 | * other side effects. | |
1634 | * | |
1635 | * side effects of acpi_boot_init: | |
1636 | * acpi_lapic = 1 if LAPIC found | |
1637 | * acpi_ioapic = 1 if IOAPIC found | |
1638 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; | |
1639 | * if acpi_blacklisted() acpi_disabled = 1; | |
1640 | * acpi_irq_model=... | |
1641 | * ... | |
1642 | * | |
1643 | * return value: (currently ignored) | |
1644 | * 0: success | |
1645 | * !0: failure | |
1646 | */ | |
1647 | ||
4be44fcd | 1648 | int __init acpi_boot_table_init(void) |
1da177e4 LT |
1649 | { |
1650 | int error; | |
1651 | ||
aea00143 | 1652 | dmi_check_system(acpi_dmi_table); |
aea00143 | 1653 | |
1da177e4 LT |
1654 | /* |
1655 | * If acpi_disabled, bail out | |
1656 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1657 | */ | |
1658 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1659 | return 1; |
1da177e4 | 1660 | |
5f3b1a8b | 1661 | /* |
1da177e4 LT |
1662 | * Initialize the ACPI boot-time table parser. |
1663 | */ | |
1664 | error = acpi_table_init(); | |
1665 | if (error) { | |
1666 | disable_acpi(); | |
1667 | return error; | |
1668 | } | |
1da177e4 | 1669 | |
5f3b1a8b | 1670 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1671 | |
1672 | /* | |
1673 | * blacklist may disable ACPI entirely | |
1674 | */ | |
1675 | error = acpi_blacklisted(); | |
1676 | if (error) { | |
1da177e4 LT |
1677 | if (acpi_force) { |
1678 | printk(KERN_WARNING PREFIX "acpi=force override\n"); | |
1679 | } else { | |
1680 | printk(KERN_WARNING PREFIX "Disabling ACPI support\n"); | |
1681 | disable_acpi(); | |
1682 | return error; | |
1683 | } | |
1684 | } | |
cbf9bd60 YL |
1685 | |
1686 | return 0; | |
1687 | } | |
1688 | ||
1689 | int __init early_acpi_boot_init(void) | |
1690 | { | |
1691 | /* | |
1692 | * If acpi_disabled, bail out | |
1693 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1694 | */ | |
1695 | if (acpi_disabled && !acpi_ht) | |
1696 | return 1; | |
1697 | ||
1698 | /* | |
1699 | * Process the Multiple APIC Description Table (MADT), if present | |
1700 | */ | |
1701 | early_acpi_process_madt(); | |
1da177e4 LT |
1702 | |
1703 | return 0; | |
1704 | } | |
1705 | ||
1da177e4 LT |
1706 | int __init acpi_boot_init(void) |
1707 | { | |
1708 | /* | |
1709 | * If acpi_disabled, bail out | |
1710 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1711 | */ | |
1712 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1713 | return 1; |
1da177e4 | 1714 | |
5f3b1a8b | 1715 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1716 | |
1717 | /* | |
1718 | * set sci_int and PM timer address | |
1719 | */ | |
ceb6c468 | 1720 | acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); |
1da177e4 LT |
1721 | |
1722 | /* | |
1723 | * Process the Multiple APIC Description Table (MADT), if present | |
1724 | */ | |
1725 | acpi_process_madt(); | |
1726 | ||
5f3b1a8b | 1727 | acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); |
1da177e4 LT |
1728 | |
1729 | return 0; | |
1730 | } | |
1a3f239d RR |
1731 | |
1732 | static int __init parse_acpi(char *arg) | |
1733 | { | |
1734 | if (!arg) | |
1735 | return -EINVAL; | |
1736 | ||
1737 | /* "acpi=off" disables both ACPI table parsing and interpreter */ | |
1738 | if (strcmp(arg, "off") == 0) { | |
1739 | disable_acpi(); | |
1740 | } | |
1741 | /* acpi=force to over-ride black-list */ | |
1742 | else if (strcmp(arg, "force") == 0) { | |
1743 | acpi_force = 1; | |
1744 | acpi_ht = 1; | |
1745 | acpi_disabled = 0; | |
1746 | } | |
1747 | /* acpi=strict disables out-of-spec workarounds */ | |
1748 | else if (strcmp(arg, "strict") == 0) { | |
1749 | acpi_strict = 1; | |
1750 | } | |
1751 | /* Limit ACPI just to boot-time to enable HT */ | |
1752 | else if (strcmp(arg, "ht") == 0) { | |
1753 | if (!acpi_force) | |
1754 | disable_acpi(); | |
1755 | acpi_ht = 1; | |
1756 | } | |
1757 | /* "acpi=noirq" disables ACPI interrupt routing */ | |
1758 | else if (strcmp(arg, "noirq") == 0) { | |
1759 | acpi_noirq_set(); | |
1760 | } else { | |
1761 | /* Core will printk when we return error. */ | |
1762 | return -EINVAL; | |
1763 | } | |
1764 | return 0; | |
1765 | } | |
1766 | early_param("acpi", parse_acpi); | |
1767 | ||
1768 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ | |
1769 | static int __init parse_pci(char *arg) | |
1770 | { | |
1771 | if (arg && strcmp(arg, "noacpi") == 0) | |
1772 | acpi_disable_pci(); | |
1773 | return 0; | |
1774 | } | |
1775 | early_param("pci", parse_pci); | |
1776 | ||
3c999f14 YL |
1777 | int __init acpi_mps_check(void) |
1778 | { | |
1779 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) | |
1780 | /* mptable code is not built-in*/ | |
1781 | if (acpi_disabled || acpi_noirq) { | |
1782 | printk(KERN_WARNING "MPS support code is not built-in.\n" | |
1783 | "Using acpi=off or acpi=noirq or pci=noacpi " | |
1784 | "may have problem\n"); | |
1785 | return 1; | |
1786 | } | |
1787 | #endif | |
1788 | return 0; | |
1789 | } | |
1790 | ||
1a3f239d RR |
1791 | #ifdef CONFIG_X86_IO_APIC |
1792 | static int __init parse_acpi_skip_timer_override(char *arg) | |
1793 | { | |
1794 | acpi_skip_timer_override = 1; | |
1795 | return 0; | |
1796 | } | |
1797 | early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); | |
fa18f477 AK |
1798 | |
1799 | static int __init parse_acpi_use_timer_override(char *arg) | |
1800 | { | |
1801 | acpi_use_timer_override = 1; | |
1802 | return 0; | |
1803 | } | |
1804 | early_param("acpi_use_timer_override", parse_acpi_use_timer_override); | |
1a3f239d RR |
1805 | #endif /* CONFIG_X86_IO_APIC */ |
1806 | ||
1807 | static int __init setup_acpi_sci(char *s) | |
1808 | { | |
1809 | if (!s) | |
1810 | return -EINVAL; | |
1811 | if (!strcmp(s, "edge")) | |
5f3b1a8b AS |
1812 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1813 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1814 | else if (!strcmp(s, "level")) |
5f3b1a8b AS |
1815 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1816 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1817 | else if (!strcmp(s, "high")) |
5f3b1a8b AS |
1818 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1819 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d | 1820 | else if (!strcmp(s, "low")) |
5f3b1a8b AS |
1821 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1822 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d RR |
1823 | else |
1824 | return -EINVAL; | |
1825 | return 0; | |
1826 | } | |
1827 | early_param("acpi_sci", setup_acpi_sci); | |
d0a9081b AM |
1828 | |
1829 | int __acpi_acquire_global_lock(unsigned int *lock) | |
1830 | { | |
1831 | unsigned int old, new, val; | |
1832 | do { | |
1833 | old = *lock; | |
1834 | new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); | |
1835 | val = cmpxchg(lock, old, new); | |
1836 | } while (unlikely (val != old)); | |
1837 | return (new < 3) ? -1 : 0; | |
1838 | } | |
1839 | ||
1840 | int __acpi_release_global_lock(unsigned int *lock) | |
1841 | { | |
1842 | unsigned int old, new, val; | |
1843 | do { | |
1844 | old = *lock; | |
1845 | new = old & ~0x3; | |
1846 | val = cmpxchg(lock, old, new); | |
1847 | } while (unlikely (val != old)); | |
1848 | return old & 0x1; | |
1849 | } |