x86: make generic arch support NUMAQ
[deliverable/linux.git] / arch / x86 / kernel / acpi / boot.c
CommitLineData
1da177e4
LT
1/*
2 * boot.c - Architecture-Specific Low-Level ACPI Boot Support
3 *
4 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
5 * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 */
25
26#include <linux/init.h>
1da177e4 27#include <linux/acpi.h>
d66bea57 28#include <linux/acpi_pmtmr.h>
1da177e4 29#include <linux/efi.h>
73fea175 30#include <linux/cpumask.h>
1da177e4 31#include <linux/module.h>
aea00143 32#include <linux/dmi.h>
b33fa1f3 33#include <linux/irq.h>
f0f4c343 34#include <linux/bootmem.h>
35#include <linux/ioport.h>
1da177e4
LT
36
37#include <asm/pgtable.h>
38#include <asm/io_apic.h>
39#include <asm/apic.h>
40#include <asm/io.h>
1da177e4 41#include <asm/mpspec.h>
dfac2189 42#include <asm/smp.h>
1da177e4 43
f6bc4029
GOC
44#ifdef CONFIG_X86_LOCAL_APIC
45# include <mach_apic.h>
46#endif
47
e8924acb 48static int __initdata acpi_force = 0;
1a3f239d 49
df3bb57d
AK
50#ifdef CONFIG_ACPI
51int acpi_disabled = 0;
52#else
53int acpi_disabled = 1;
54#endif
55EXPORT_SYMBOL(acpi_disabled);
56
1da177e4
LT
57#ifdef CONFIG_X86_64
58
1da177e4 59#include <asm/proto.h>
ae261868 60#include <asm/genapic.h>
637029c6 61
4be44fcd 62#else /* X86 */
1da177e4
LT
63
64#ifdef CONFIG_X86_LOCAL_APIC
65#include <mach_apic.h>
66#include <mach_mpparse.h>
4be44fcd 67#endif /* CONFIG_X86_LOCAL_APIC */
1da177e4 68
4be44fcd 69#endif /* X86 */
1da177e4
LT
70
71#define BAD_MADT_ENTRY(entry, end) ( \
72 (!entry) || (unsigned long)entry + sizeof(*entry) > end || \
5f3b1a8b 73 ((struct acpi_subtable_header *)entry)->length < sizeof(*entry))
1da177e4
LT
74
75#define PREFIX "ACPI: "
76
90d53909 77int acpi_noirq; /* skip ACPI IRQ initialization */
6e4be1ff
YL
78int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
79EXPORT_SYMBOL(acpi_pci_disabled);
1da177e4
LT
80int acpi_ht __initdata = 1; /* enable HT */
81
82int acpi_lapic;
83int acpi_ioapic;
84int acpi_strict;
1da177e4 85
5f3b1a8b 86u8 acpi_sci_flags __initdata;
1da177e4
LT
87int acpi_sci_override_gsi __initdata;
88int acpi_skip_timer_override __initdata;
fa18f477 89int acpi_use_timer_override __initdata;
1da177e4
LT
90
91#ifdef CONFIG_X86_LOCAL_APIC
92static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
93#endif
94
95#ifndef __HAVE_ARCH_CMPXCHG
96#warning ACPI uses CMPXCHG, i486 and later hardware
97#endif
98
1da177e4
LT
99/* --------------------------------------------------------------------------
100 Boot-time Configuration
101 -------------------------------------------------------------------------- */
102
103/*
104 * The default interrupt routing model is PIC (8259). This gets
27b46d76 105 * overridden if IOAPICs are enumerated (below).
1da177e4 106 */
4be44fcd 107enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
1da177e4
LT
108
109#ifdef CONFIG_X86_64
110
111/* rely on all ACPI tables being in the direct mapping */
2fdf0741 112char *__init __acpi_map_table(unsigned long phys_addr, unsigned long size)
1da177e4
LT
113{
114 if (!phys_addr || !size)
4be44fcd 115 return NULL;
1da177e4 116
67794292 117 if (phys_addr+size <= (max_pfn_mapped << PAGE_SHIFT) + PAGE_SIZE)
1da177e4
LT
118 return __va(phys_addr);
119
120 return NULL;
121}
122
123#else
124
125/*
126 * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END,
127 * to map the target physical address. The problem is that set_fixmap()
128 * provides a single page, and it is possible that the page is not
129 * sufficient.
130 * By using this area, we can map up to MAX_IO_APICS pages temporarily,
131 * i.e. until the next __va_range() call.
132 *
133 * Important Safety Note: The fixed I/O APIC page numbers are *subtracted*
134 * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and
135 * count idx down while incrementing the phys address.
136 */
2fdf0741 137char *__init __acpi_map_table(unsigned long phys, unsigned long size)
1da177e4
LT
138{
139 unsigned long base, offset, mapped_size;
140 int idx;
141
4be44fcd
LB
142 if (phys + size < 8 * 1024 * 1024)
143 return __va(phys);
1da177e4
LT
144
145 offset = phys & (PAGE_SIZE - 1);
146 mapped_size = PAGE_SIZE - offset;
147 set_fixmap(FIX_ACPI_END, phys);
148 base = fix_to_virt(FIX_ACPI_END);
149
150 /*
151 * Most cases can be covered by the below.
152 */
153 idx = FIX_ACPI_END;
154 while (mapped_size < size) {
155 if (--idx < FIX_ACPI_BEGIN)
156 return NULL; /* cannot handle this */
157 phys += PAGE_SIZE;
158 set_fixmap(idx, phys);
159 mapped_size += PAGE_SIZE;
160 }
161
4be44fcd 162 return ((unsigned char *)base + offset);
1da177e4
LT
163}
164#endif
165
166#ifdef CONFIG_PCI_MMCONFIG
54549391 167/* The physical address of the MMCONFIG aperture. Set from ACPI tables. */
15a58ed1 168struct acpi_mcfg_allocation *pci_mmcfg_config;
54549391
GKH
169int pci_mmcfg_config_num;
170
ceb6c468 171int __init acpi_parse_mcfg(struct acpi_table_header *header)
1da177e4
LT
172{
173 struct acpi_table_mcfg *mcfg;
54549391
GKH
174 unsigned long i;
175 int config_size;
1da177e4 176
ceb6c468 177 if (!header)
1da177e4
LT
178 return -EINVAL;
179
ceb6c468 180 mcfg = (struct acpi_table_mcfg *)header;
1da177e4 181
54549391
GKH
182 /* how many config structures do we have */
183 pci_mmcfg_config_num = 0;
ceb6c468 184 i = header->length - sizeof(struct acpi_table_mcfg);
15a58ed1 185 while (i >= sizeof(struct acpi_mcfg_allocation)) {
54549391 186 ++pci_mmcfg_config_num;
15a58ed1 187 i -= sizeof(struct acpi_mcfg_allocation);
54549391
GKH
188 };
189 if (pci_mmcfg_config_num == 0) {
190 printk(KERN_ERR PREFIX "MMCONFIG has no entries\n");
1da177e4
LT
191 return -ENODEV;
192 }
193
54549391
GKH
194 config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config);
195 pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL);
196 if (!pci_mmcfg_config) {
197 printk(KERN_WARNING PREFIX
198 "No memory for MCFG config tables\n");
199 return -ENOMEM;
200 }
201
ad363f80 202 memcpy(pci_mmcfg_config, &mcfg[1], config_size);
54549391 203 for (i = 0; i < pci_mmcfg_config_num; ++i) {
15a58ed1 204 if (pci_mmcfg_config[i].address > 0xFFFFFFFF) {
54549391
GKH
205 printk(KERN_ERR PREFIX
206 "MMCONFIG not in low 4GB of memory\n");
acc7c2e0
KR
207 kfree(pci_mmcfg_config);
208 pci_mmcfg_config_num = 0;
54549391
GKH
209 return -ENODEV;
210 }
211 }
1da177e4
LT
212
213 return 0;
214}
4be44fcd 215#endif /* CONFIG_PCI_MMCONFIG */
1da177e4
LT
216
217#ifdef CONFIG_X86_LOCAL_APIC
15a58ed1 218static int __init acpi_parse_madt(struct acpi_table_header *table)
1da177e4 219{
4be44fcd 220 struct acpi_table_madt *madt = NULL;
1da177e4 221
15a58ed1 222 if (!cpu_has_apic)
1da177e4
LT
223 return -EINVAL;
224
15a58ed1 225 madt = (struct acpi_table_madt *)table;
1da177e4
LT
226 if (!madt) {
227 printk(KERN_WARNING PREFIX "Unable to map MADT\n");
228 return -ENODEV;
229 }
230
ad363f80
AS
231 if (madt->address) {
232 acpi_lapic_addr = (u64) madt->address;
1da177e4
LT
233
234 printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n",
ad363f80 235 madt->address);
1da177e4
LT
236 }
237
238 acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id);
4be44fcd 239
1da177e4
LT
240 return 0;
241}
242
dfac2189
AS
243static void __cpuinit acpi_register_lapic(int id, u8 enabled)
244{
245 if (!enabled) {
246 ++disabled_cpus;
247 return;
248 }
249
250 generic_processor_info(id, 0);
251}
252
1da177e4 253static int __init
5f3b1a8b 254acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end)
1da177e4 255{
5f3b1a8b 256 struct acpi_madt_local_apic *processor = NULL;
1da177e4 257
5f3b1a8b 258 processor = (struct acpi_madt_local_apic *)header;
1da177e4
LT
259
260 if (BAD_MADT_ENTRY(processor, end))
261 return -EINVAL;
262
263 acpi_table_print_madt_entry(header);
264
7f66ae48
AR
265 /*
266 * We need to register disabled CPU as well to permit
267 * counting disabled CPUs. This allows us to size
268 * cpus_possible_map more accurately, to permit
269 * to not preallocating memory for all NR_CPUS
270 * when we use CPU hotplug.
271 */
dfac2189
AS
272 acpi_register_lapic(processor->id, /* APIC ID */
273 processor->lapic_flags & ACPI_MADT_ENABLED);
1da177e4
LT
274
275 return 0;
276}
277
ac049c1d
JS
278static int __init
279acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end)
280{
281 struct acpi_madt_local_sapic *processor = NULL;
282
283 processor = (struct acpi_madt_local_sapic *)header;
284
285 if (BAD_MADT_ENTRY(processor, end))
286 return -EINVAL;
287
288 acpi_table_print_madt_entry(header);
289
dfac2189
AS
290 acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */
291 processor->lapic_flags & ACPI_MADT_ENABLED);
ac049c1d
JS
292
293 return 0;
294}
295
1da177e4 296static int __init
5f3b1a8b 297acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header,
4be44fcd 298 const unsigned long end)
1da177e4 299{
5f3b1a8b 300 struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
1da177e4 301
5f3b1a8b 302 lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
1da177e4
LT
303
304 if (BAD_MADT_ENTRY(lapic_addr_ovr, end))
305 return -EINVAL;
306
307 acpi_lapic_addr = lapic_addr_ovr->address;
308
309 return 0;
310}
311
312static int __init
5f3b1a8b 313acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end)
1da177e4 314{
5f3b1a8b 315 struct acpi_madt_local_apic_nmi *lapic_nmi = NULL;
1da177e4 316
5f3b1a8b 317 lapic_nmi = (struct acpi_madt_local_apic_nmi *)header;
1da177e4
LT
318
319 if (BAD_MADT_ENTRY(lapic_nmi, end))
320 return -EINVAL;
321
322 acpi_table_print_madt_entry(header);
323
324 if (lapic_nmi->lint != 1)
325 printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n");
326
327 return 0;
328}
329
4be44fcd 330#endif /*CONFIG_X86_LOCAL_APIC */
1da177e4 331
8466361a 332#ifdef CONFIG_X86_IO_APIC
1da177e4
LT
333
334static int __init
5f3b1a8b 335acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
1da177e4 336{
5f3b1a8b 337 struct acpi_madt_io_apic *ioapic = NULL;
1da177e4 338
5f3b1a8b 339 ioapic = (struct acpi_madt_io_apic *)header;
1da177e4
LT
340
341 if (BAD_MADT_ENTRY(ioapic, end))
342 return -EINVAL;
4be44fcd 343
1da177e4
LT
344 acpi_table_print_madt_entry(header);
345
4be44fcd
LB
346 mp_register_ioapic(ioapic->id,
347 ioapic->address, ioapic->global_irq_base);
348
1da177e4
LT
349 return 0;
350}
351
352/*
353 * Parse Interrupt Source Override for the ACPI SCI
354 */
e82c354b 355static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger)
1da177e4
LT
356{
357 if (trigger == 0) /* compatible SCI trigger is level */
358 trigger = 3;
359
360 if (polarity == 0) /* compatible SCI polarity is low */
361 polarity = 3;
362
363 /* Command-line over-ride via acpi_sci= */
5f3b1a8b
AS
364 if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK)
365 trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2;
1da177e4 366
5f3b1a8b
AS
367 if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
368 polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
1da177e4
LT
369
370 /*
4be44fcd 371 * mp_config_acpi_legacy_irqs() already setup IRQs < 16
1da177e4
LT
372 * If GSI is < 16, this will update its flags,
373 * else it will create a new mp_irqs[] entry.
374 */
7bdd21ce 375 mp_override_legacy_irq(gsi, polarity, trigger, gsi);
1da177e4
LT
376
377 /*
378 * stash over-ride to indicate we've been here
cee324b1 379 * and for later update of acpi_gbl_FADT
1da177e4 380 */
7bdd21ce 381 acpi_sci_override_gsi = gsi;
1da177e4
LT
382 return;
383}
384
385static int __init
5f3b1a8b 386acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
4be44fcd 387 const unsigned long end)
1da177e4 388{
5f3b1a8b 389 struct acpi_madt_interrupt_override *intsrc = NULL;
1da177e4 390
5f3b1a8b 391 intsrc = (struct acpi_madt_interrupt_override *)header;
1da177e4
LT
392
393 if (BAD_MADT_ENTRY(intsrc, end))
394 return -EINVAL;
395
396 acpi_table_print_madt_entry(header);
397
5f3b1a8b 398 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
7bdd21ce 399 acpi_sci_ioapic_setup(intsrc->global_irq,
5f3b1a8b
AS
400 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
401 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2);
1da177e4
LT
402 return 0;
403 }
404
405 if (acpi_skip_timer_override &&
5f3b1a8b 406 intsrc->source_irq == 0 && intsrc->global_irq == 2) {
4be44fcd
LB
407 printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n");
408 return 0;
1da177e4
LT
409 }
410
5f3b1a8b
AS
411 mp_override_legacy_irq(intsrc->source_irq,
412 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
413 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
414 intsrc->global_irq);
1da177e4
LT
415
416 return 0;
417}
418
1da177e4 419static int __init
5f3b1a8b 420acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end)
1da177e4 421{
5f3b1a8b 422 struct acpi_madt_nmi_source *nmi_src = NULL;
1da177e4 423
5f3b1a8b 424 nmi_src = (struct acpi_madt_nmi_source *)header;
1da177e4
LT
425
426 if (BAD_MADT_ENTRY(nmi_src, end))
427 return -EINVAL;
428
429 acpi_table_print_madt_entry(header);
430
431 /* TBD: Support nimsrc entries? */
432
433 return 0;
434}
435
4be44fcd 436#endif /* CONFIG_X86_IO_APIC */
1da177e4 437
1da177e4
LT
438/*
439 * acpi_pic_sci_set_trigger()
5f3b1a8b 440 *
1da177e4
LT
441 * use ELCR to set PIC-mode trigger type for SCI
442 *
443 * If a PIC-mode SCI is not recognized or gives spurious IRQ7's
444 * it may require Edge Trigger -- use "acpi_sci=edge"
445 *
446 * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
447 * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge.
27b46d76
SA
448 * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0)
449 * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0)
1da177e4
LT
450 */
451
4be44fcd 452void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
1da177e4
LT
453{
454 unsigned int mask = 1 << irq;
455 unsigned int old, new;
456
457 /* Real old ELCR mask */
458 old = inb(0x4d0) | (inb(0x4d1) << 8);
459
460 /*
27b46d76 461 * If we use ACPI to set PCI IRQs, then we should clear ELCR
1da177e4
LT
462 * since we will set it correctly as we enable the PCI irq
463 * routing.
464 */
465 new = acpi_noirq ? old : 0;
466
467 /*
468 * Update SCI information in the ELCR, it isn't in the PCI
469 * routing tables..
470 */
471 switch (trigger) {
4be44fcd 472 case 1: /* Edge - clear */
1da177e4
LT
473 new &= ~mask;
474 break;
4be44fcd 475 case 3: /* Level - set */
1da177e4
LT
476 new |= mask;
477 break;
478 }
479
480 if (old == new)
481 return;
482
483 printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old);
484 outb(new, 0x4d0);
485 outb(new >> 8, 0x4d1);
486}
487
1da177e4
LT
488int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
489{
f023d764 490 *irq = gsi;
1da177e4
LT
491 return 0;
492}
493
1f3a6a15
KK
494/*
495 * success: return IRQ number (>=0)
496 * failure: return < 0
497 */
cb654695 498int acpi_register_gsi(u32 gsi, int triggering, int polarity)
1da177e4
LT
499{
500 unsigned int irq;
501 unsigned int plat_gsi = gsi;
502
503#ifdef CONFIG_PCI
504 /*
505 * Make sure all (legacy) PCI IRQs are set as level-triggered.
506 */
507 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
508 extern void eisa_set_level_irq(unsigned int irq);
509
cb654695 510 if (triggering == ACPI_LEVEL_SENSITIVE)
4be44fcd 511 eisa_set_level_irq(gsi);
1da177e4
LT
512 }
513#endif
514
515#ifdef CONFIG_X86_IO_APIC
516 if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) {
cb654695 517 plat_gsi = mp_register_gsi(gsi, triggering, polarity);
1da177e4
LT
518 }
519#endif
520 acpi_gsi_to_irq(plat_gsi, &irq);
521 return irq;
522}
4be44fcd 523
1da177e4
LT
524/*
525 * ACPI based hotplug support for CPU
526 */
527#ifdef CONFIG_ACPI_HOTPLUG_CPU
009cbadb
SR
528
529static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu)
1da177e4 530{
73fea175
AR
531 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
532 union acpi_object *obj;
5f3b1a8b 533 struct acpi_madt_local_apic *lapic;
73fea175
AR
534 cpumask_t tmp_map, new_map;
535 u8 physid;
536 int cpu;
537
538 if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer)))
539 return -EINVAL;
540
541 if (!buffer.length || !buffer.pointer)
542 return -EINVAL;
543
544 obj = buffer.pointer;
545 if (obj->type != ACPI_TYPE_BUFFER ||
546 obj->buffer.length < sizeof(*lapic)) {
547 kfree(buffer.pointer);
548 return -EINVAL;
549 }
550
5f3b1a8b 551 lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer;
73fea175 552
5f3b1a8b
AS
553 if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC ||
554 !(lapic->lapic_flags & ACPI_MADT_ENABLED)) {
73fea175
AR
555 kfree(buffer.pointer);
556 return -EINVAL;
557 }
558
559 physid = lapic->id;
560
561 kfree(buffer.pointer);
562 buffer.length = ACPI_ALLOCATE_BUFFER;
563 buffer.pointer = NULL;
564
565 tmp_map = cpu_present_map;
dfac2189 566 acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED);
73fea175
AR
567
568 /*
569 * If mp_register_lapic successfully generates a new logical cpu
570 * number, then the following will get us exactly what was mapped
571 */
572 cpus_andnot(new_map, cpu_present_map, tmp_map);
573 if (cpus_empty(new_map)) {
574 printk ("Unable to map lapic to logical cpu number\n");
575 return -EINVAL;
576 }
577
578 cpu = first_cpu(new_map);
579
580 *pcpu = cpu;
581 return 0;
1da177e4 582}
1da177e4 583
009cbadb
SR
584/* wrapper to silence section mismatch warning */
585int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu)
586{
587 return _acpi_map_lsapic(handle, pcpu);
588}
4be44fcd 589EXPORT_SYMBOL(acpi_map_lsapic);
1da177e4 590
4be44fcd 591int acpi_unmap_lsapic(int cpu)
1da177e4 592{
71fff5e6 593 per_cpu(x86_cpu_to_apicid, cpu) = -1;
73fea175
AR
594 cpu_clear(cpu, cpu_present_map);
595 num_processors--;
596
597 return (0);
1da177e4 598}
4be44fcd 599
1da177e4 600EXPORT_SYMBOL(acpi_unmap_lsapic);
4be44fcd 601#endif /* CONFIG_ACPI_HOTPLUG_CPU */
1da177e4 602
4be44fcd 603int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
b1bb248a
KK
604{
605 /* TBD */
606 return -EINVAL;
607}
4be44fcd 608
b1bb248a
KK
609EXPORT_SYMBOL(acpi_register_ioapic);
610
4be44fcd 611int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
b1bb248a
KK
612{
613 /* TBD */
614 return -EINVAL;
615}
4be44fcd 616
b1bb248a
KK
617EXPORT_SYMBOL(acpi_unregister_ioapic);
618
5f3b1a8b 619static int __init acpi_parse_sbf(struct acpi_table_header *table)
1da177e4 620{
5f3b1a8b 621 struct acpi_table_boot *sb;
1da177e4 622
5f3b1a8b 623 sb = (struct acpi_table_boot *)table;
1da177e4
LT
624 if (!sb) {
625 printk(KERN_WARNING PREFIX "Unable to map SBF\n");
626 return -ENODEV;
627 }
628
5f3b1a8b 629 sbf_port = sb->cmos_index; /* Save CMOS port */
1da177e4
LT
630
631 return 0;
632}
633
1da177e4 634#ifdef CONFIG_HPET_TIMER
2d0c87c3 635#include <asm/hpet.h>
1da177e4 636
a1dfd851
AD
637static struct __initdata resource *hpet_res;
638
5f3b1a8b 639static int __init acpi_parse_hpet(struct acpi_table_header *table)
1da177e4
LT
640{
641 struct acpi_table_hpet *hpet_tbl;
642
5f3b1a8b 643 hpet_tbl = (struct acpi_table_hpet *)table;
1da177e4
LT
644 if (!hpet_tbl) {
645 printk(KERN_WARNING PREFIX "Unable to map HPET\n");
646 return -ENODEV;
647 }
648
ad363f80 649 if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
1da177e4
LT
650 printk(KERN_WARNING PREFIX "HPET timers must be located in "
651 "memory.\n");
652 return -1;
653 }
f0f4c343 654
2d0c87c3 655 hpet_address = hpet_tbl->address.address;
f4df73c2
TG
656
657 /*
658 * Some broken BIOSes advertise HPET at 0x0. We really do not
659 * want to allocate a resource there.
660 */
661 if (!hpet_address) {
662 printk(KERN_WARNING PREFIX
663 "HPET id: %#x base: %#lx is invalid\n",
664 hpet_tbl->id, hpet_address);
665 return 0;
666 }
667#ifdef CONFIG_X86_64
668 /*
669 * Some even more broken BIOSes advertise HPET at
670 * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add
671 * some noise:
672 */
673 if (hpet_address == 0xfed0000000000000UL) {
674 if (!hpet_force_user) {
675 printk(KERN_WARNING PREFIX "HPET id: %#x "
676 "base: 0xfed0000000000000 is bogus\n "
677 "try hpet=force on the kernel command line to "
678 "fix it up to 0xfed00000.\n", hpet_tbl->id);
679 hpet_address = 0;
680 return 0;
681 }
682 printk(KERN_WARNING PREFIX
683 "HPET id: %#x base: 0xfed0000000000000 fixed up "
684 "to 0xfed00000.\n", hpet_tbl->id);
685 hpet_address >>= 32;
686 }
687#endif
4be44fcd 688 printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
2d0c87c3 689 hpet_tbl->id, hpet_address);
1da177e4 690
a1dfd851
AD
691 /*
692 * Allocate and initialize the HPET firmware resource for adding into
693 * the resource tree during the lateinit timeframe.
694 */
695#define HPET_RESOURCE_NAME_SIZE 9
696 hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
697
a1dfd851
AD
698 hpet_res->name = (void *)&hpet_res[1];
699 hpet_res->flags = IORESOURCE_MEM;
700 snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u",
701 hpet_tbl->sequence);
702
703 hpet_res->start = hpet_address;
704 hpet_res->end = hpet_address + (1 * 1024) - 1;
705
1da177e4
LT
706 return 0;
707}
a1dfd851
AD
708
709/*
710 * hpet_insert_resource inserts the HPET resources used into the resource
711 * tree.
712 */
713static __init int hpet_insert_resource(void)
714{
715 if (!hpet_res)
716 return 1;
717
718 return insert_resource(&iomem_resource, hpet_res);
719}
720
721late_initcall(hpet_insert_resource);
722
1da177e4
LT
723#else
724#define acpi_parse_hpet NULL
725#endif
726
5f3b1a8b 727static int __init acpi_parse_fadt(struct acpi_table_header *table)
1da177e4 728{
90660ec3 729
1da177e4
LT
730#ifdef CONFIG_X86_PM_TIMER
731 /* detect the location of the ACPI PM Timer */
5f3b1a8b 732 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) {
1da177e4 733 /* FADT rev. 2 */
5f3b1a8b 734 if (acpi_gbl_FADT.xpm_timer_block.space_id !=
4be44fcd 735 ACPI_ADR_SPACE_SYSTEM_IO)
1da177e4
LT
736 return 0;
737
5f3b1a8b 738 pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address;
e6e87b4b
DSL
739 /*
740 * "X" fields are optional extensions to the original V1.0
741 * fields, so we must selectively expand V1.0 fields if the
742 * corresponding X field is zero.
743 */
744 if (!pmtmr_ioport)
5f3b1a8b 745 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
1da177e4
LT
746 } else {
747 /* FADT rev. 1 */
5f3b1a8b 748 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
1da177e4
LT
749 }
750 if (pmtmr_ioport)
4be44fcd
LB
751 printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n",
752 pmtmr_ioport);
1da177e4
LT
753#endif
754 return 0;
755}
756
1da177e4
LT
757#ifdef CONFIG_X86_LOCAL_APIC
758/*
759 * Parse LAPIC entries in MADT
760 * returns 0 on success, < 0 on error
761 */
31d2092e
AS
762
763static void __init acpi_register_lapic_address(unsigned long address)
764{
765 mp_lapic_addr = address;
766
767 set_fixmap_nocache(FIX_APIC_BASE, address);
768 if (boot_cpu_physical_apicid == -1U)
769 boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());
770}
771
cbf9bd60
YL
772static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
773{
774 int count;
775
776 if (!cpu_has_apic)
777 return -ENODEV;
778
779 /*
780 * Note that the LAPIC address is obtained from the MADT (32-bit value)
781 * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value).
782 */
783
784 count =
785 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
786 acpi_parse_lapic_addr_ovr, 0);
787 if (count < 0) {
788 printk(KERN_ERR PREFIX
789 "Error parsing LAPIC address override entry\n");
790 return count;
791 }
792
793 acpi_register_lapic_address(acpi_lapic_addr);
794
795 return count;
796}
797
4be44fcd 798static int __init acpi_parse_madt_lapic_entries(void)
1da177e4
LT
799{
800 int count;
801
0fcd2709
AK
802 if (!cpu_has_apic)
803 return -ENODEV;
804
5f3b1a8b 805 /*
1da177e4
LT
806 * Note that the LAPIC address is obtained from the MADT (32-bit value)
807 * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value).
808 */
809
4be44fcd 810 count =
5f3b1a8b 811 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
4be44fcd 812 acpi_parse_lapic_addr_ovr, 0);
1da177e4 813 if (count < 0) {
4be44fcd
LB
814 printk(KERN_ERR PREFIX
815 "Error parsing LAPIC address override entry\n");
1da177e4
LT
816 return count;
817 }
818
31d2092e 819 acpi_register_lapic_address(acpi_lapic_addr);
1da177e4 820
ac049c1d
JS
821 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC,
822 acpi_parse_sapic, MAX_APICS);
823
824 if (!count)
825 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC,
826 acpi_parse_lapic, MAX_APICS);
4be44fcd 827 if (!count) {
1da177e4
LT
828 printk(KERN_ERR PREFIX "No LAPIC entries present\n");
829 /* TBD: Cleanup to allow fallback to MPS */
830 return -ENODEV;
4be44fcd 831 } else if (count < 0) {
1da177e4
LT
832 printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n");
833 /* TBD: Cleanup to allow fallback to MPS */
834 return count;
835 }
836
4be44fcd 837 count =
5f3b1a8b 838 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0);
1da177e4
LT
839 if (count < 0) {
840 printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n");
841 /* TBD: Cleanup to allow fallback to MPS */
842 return count;
843 }
844 return 0;
845}
4be44fcd 846#endif /* CONFIG_X86_LOCAL_APIC */
1da177e4 847
8466361a 848#ifdef CONFIG_X86_IO_APIC
11113f84
AS
849#define MP_ISA_BUS 0
850
d49c4288 851#ifdef CONFIG_X86_ES7000
11113f84
AS
852extern int es7000_plat;
853#endif
854
5f895148
AS
855static struct {
856 int apic_id;
857 int gsi_base;
858 int gsi_end;
859 DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
860} mp_ioapic_routing[MAX_IO_APICS];
11113f84
AS
861
862static int mp_find_ioapic(int gsi)
863{
864 int i = 0;
865
866 /* Find the IOAPIC that manages this GSI. */
867 for (i = 0; i < nr_ioapics; i++) {
868 if ((gsi >= mp_ioapic_routing[i].gsi_base)
869 && (gsi <= mp_ioapic_routing[i].gsi_end))
870 return i;
871 }
872
873 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
874 return -1;
875}
876
877static u8 __init uniq_ioapic_id(u8 id)
878{
879#ifdef CONFIG_X86_32
880 if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
881 !APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
882 return io_apic_get_unique_id(nr_ioapics, id);
883 else
884 return id;
885#else
886 int i;
887 DECLARE_BITMAP(used, 256);
888 bitmap_zero(used, 256);
889 for (i = 0; i < nr_ioapics; i++) {
ec2cd0a2
AS
890 struct mp_config_ioapic *ia = &mp_ioapics[i];
891 __set_bit(ia->mp_apicid, used);
11113f84
AS
892 }
893 if (!test_bit(id, used))
894 return id;
895 return find_first_zero_bit(used, 256);
896#endif
897}
898
899static int bad_ioapic(unsigned long address)
900{
901 if (nr_ioapics >= MAX_IO_APICS) {
902 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
903 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
904 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
905 }
906 if (!address) {
907 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
908 " found in table, skipping!\n");
909 return 1;
910 }
911 return 0;
912}
913
914void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
915{
916 int idx = 0;
917
918 if (bad_ioapic(address))
919 return;
920
921 idx = nr_ioapics;
922
ec2cd0a2
AS
923 mp_ioapics[idx].mp_type = MP_IOAPIC;
924 mp_ioapics[idx].mp_flags = MPC_APIC_USABLE;
925 mp_ioapics[idx].mp_apicaddr = address;
11113f84
AS
926
927 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
ec2cd0a2 928 mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id);
11113f84 929#ifdef CONFIG_X86_32
ec2cd0a2 930 mp_ioapics[idx].mp_apicver = io_apic_get_version(idx);
11113f84 931#else
ec2cd0a2 932 mp_ioapics[idx].mp_apicver = 0;
11113f84
AS
933#endif
934 /*
935 * Build basic GSI lookup table to facilitate gsi->io_apic lookups
936 * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
937 */
ec2cd0a2 938 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid;
11113f84
AS
939 mp_ioapic_routing[idx].gsi_base = gsi_base;
940 mp_ioapic_routing[idx].gsi_end = gsi_base +
941 io_apic_get_redir_entries(idx);
942
ec2cd0a2
AS
943 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, "
944 "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid,
945 mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr,
11113f84
AS
946 mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end);
947
948 nr_ioapics++;
949}
950
951void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
952{
953 int ioapic = -1;
954 int pin = -1;
955
956 /*
957 * Convert 'gsi' to 'ioapic.pin'.
958 */
959 ioapic = mp_find_ioapic(gsi);
960 if (ioapic < 0)
961 return;
962 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
963
964 /*
965 * TBD: This check is for faulty timer entries, where the override
966 * erroneously sets the trigger to level, resulting in a HUGE
967 * increase of timer interrupts!
968 */
969 if ((bus_irq == 0) && (trigger == 3))
970 trigger = 1;
971
2fddb6e2
AS
972 mp_irqs[mp_irq_entries].mp_type = MP_INTSRC;
973 mp_irqs[mp_irq_entries].mp_irqtype = mp_INT;
974 mp_irqs[mp_irq_entries].mp_irqflag = (trigger << 2) | polarity;
975 mp_irqs[mp_irq_entries].mp_srcbus = MP_ISA_BUS;
976 mp_irqs[mp_irq_entries].mp_srcbusirq = bus_irq; /* IRQ */
977 mp_irqs[mp_irq_entries].mp_dstapic =
ec2cd0a2 978 mp_ioapics[ioapic].mp_apicid; /* APIC ID */
2fddb6e2 979 mp_irqs[mp_irq_entries].mp_dstirq = pin; /* INTIN# */
11113f84
AS
980
981 if (++mp_irq_entries == MAX_IRQ_SOURCES)
982 panic("Max # of irq sources exceeded!!\n");
983
984}
985
986void __init mp_config_acpi_legacy_irqs(void)
987{
988 int i = 0;
989 int ioapic = -1;
990
991#if defined (CONFIG_MCA) || defined (CONFIG_EISA)
992 /*
993 * Fabricate the legacy ISA bus (bus #31).
994 */
995 mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA;
996#endif
997 set_bit(MP_ISA_BUS, mp_bus_not_pci);
998 Dprintk("Bus #%d is ISA\n", MP_ISA_BUS);
999
d49c4288 1000#ifdef CONFIG_X86_ES7000
11113f84
AS
1001 /*
1002 * Older generations of ES7000 have no legacy identity mappings
1003 */
1004 if (es7000_plat == 1)
1005 return;
1006#endif
1007
1008 /*
1009 * Locate the IOAPIC that manages the ISA IRQs (0-15).
1010 */
1011 ioapic = mp_find_ioapic(0);
1012 if (ioapic < 0)
1013 return;
1014
11113f84
AS
1015 /*
1016 * Use the default configuration for the IRQs 0-15. Unless
1017 * overridden by (MADT) interrupt source override entries.
1018 */
1019 for (i = 0; i < 16; i++) {
1020 int idx;
1021
aafbdf71
AS
1022 mp_irqs[mp_irq_entries].mp_type = MP_INTSRC;
1023 mp_irqs[mp_irq_entries].mp_irqflag = 0; /* Conforming */
1024 mp_irqs[mp_irq_entries].mp_srcbus = MP_ISA_BUS;
1025 mp_irqs[mp_irq_entries].mp_dstapic = mp_ioapics[ioapic].mp_apicid;
1026
11113f84 1027 for (idx = 0; idx < mp_irq_entries; idx++) {
2fddb6e2 1028 struct mp_config_intsrc *irq = mp_irqs + idx;
11113f84
AS
1029
1030 /* Do we already have a mapping for this ISA IRQ? */
2fddb6e2
AS
1031 if (irq->mp_srcbus == MP_ISA_BUS
1032 && irq->mp_srcbusirq == i)
11113f84
AS
1033 break;
1034
1035 /* Do we already have a mapping for this IOAPIC pin */
2fddb6e2
AS
1036 if ((irq->mp_dstapic ==
1037 mp_irqs[mp_irq_entries].mp_dstapic) &&
1038 (irq->mp_dstirq == i))
11113f84
AS
1039 break;
1040 }
1041
1042 if (idx != mp_irq_entries) {
1043 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
1044 continue; /* IRQ already used */
1045 }
1046
2fddb6e2
AS
1047 mp_irqs[mp_irq_entries].mp_irqtype = mp_INT;
1048 mp_irqs[mp_irq_entries].mp_srcbusirq = i; /* Identity mapped */
1049 mp_irqs[mp_irq_entries].mp_dstirq = i;
11113f84
AS
1050
1051 if (++mp_irq_entries == MAX_IRQ_SOURCES)
1052 panic("Max # of irq sources exceeded!!\n");
1053 }
1054}
1055
1056int mp_register_gsi(u32 gsi, int triggering, int polarity)
1057{
1058 int ioapic;
1059 int ioapic_pin;
1060#ifdef CONFIG_X86_32
1061#define MAX_GSI_NUM 4096
1062#define IRQ_COMPRESSION_START 64
1063
1064 static int pci_irq = IRQ_COMPRESSION_START;
1065 /*
1066 * Mapping between Global System Interrupts, which
1067 * represent all possible interrupts, and IRQs
1068 * assigned to actual devices.
1069 */
1070 static int gsi_to_irq[MAX_GSI_NUM];
1071#else
1072
1073 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
1074 return gsi;
1075#endif
1076
1077 /* Don't set up the ACPI SCI because it's already set up */
1078 if (acpi_gbl_FADT.sci_interrupt == gsi)
1079 return gsi;
1080
1081 ioapic = mp_find_ioapic(gsi);
1082 if (ioapic < 0) {
1083 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
1084 return gsi;
1085 }
1086
1087 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
1088
1089#ifdef CONFIG_X86_32
1090 if (ioapic_renumber_irq)
1091 gsi = ioapic_renumber_irq(ioapic, gsi);
1092#endif
1093
1094 /*
1095 * Avoid pin reprogramming. PRTs typically include entries
1096 * with redundant pin->gsi mappings (but unique PCI devices);
1097 * we only program the IOAPIC on the first.
1098 */
1099 if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
1100 printk(KERN_ERR "Invalid reference to IOAPIC pin "
1101 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
1102 ioapic_pin);
1103 return gsi;
1104 }
1105 if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) {
1106 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
1107 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
1108#ifdef CONFIG_X86_32
1109 return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]);
1110#else
1111 return gsi;
1112#endif
1113 }
1114
1115 set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed);
1116#ifdef CONFIG_X86_32
1117 /*
1118 * For GSI >= 64, use IRQ compression
1119 */
1120 if ((gsi >= IRQ_COMPRESSION_START)
1121 && (triggering == ACPI_LEVEL_SENSITIVE)) {
1122 /*
1123 * For PCI devices assign IRQs in order, avoiding gaps
1124 * due to unused I/O APIC pins.
1125 */
1126 int irq = gsi;
1127 if (gsi < MAX_GSI_NUM) {
1128 /*
1129 * Retain the VIA chipset work-around (gsi > 15), but
1130 * avoid a problem where the 8254 timer (IRQ0) is setup
1131 * via an override (so it's not on pin 0 of the ioapic),
1132 * and at the same time, the pin 0 interrupt is a PCI
1133 * type. The gsi > 15 test could cause these two pins
1134 * to be shared as IRQ0, and they are not shareable.
1135 * So test for this condition, and if necessary, avoid
1136 * the pin collision.
1137 */
1138 gsi = pci_irq++;
1139 /*
1140 * Don't assign IRQ used by ACPI SCI
1141 */
1142 if (gsi == acpi_gbl_FADT.sci_interrupt)
1143 gsi = pci_irq++;
1144 gsi_to_irq[irq] = gsi;
1145 } else {
1146 printk(KERN_ERR "GSI %u is too high\n", gsi);
1147 return gsi;
1148 }
1149 }
1150#endif
1151 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
1152 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
1153 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
1154 return gsi;
1155}
1156
2944e16b
YL
1157int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
1158 u32 gsi, int triggering, int polarity)
1159{
1160 struct mpc_config_intsrc intsrc;
1161 int ioapic;
1162
1163 /* print the entry should happen on mptable identically */
1164 intsrc.mpc_type = MP_INTSRC;
1165 intsrc.mpc_irqtype = mp_INT;
1166 intsrc.mpc_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
1167 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
1168 intsrc.mpc_srcbus = number;
1169 intsrc.mpc_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
1170 ioapic = mp_find_ioapic(gsi);
1171 intsrc.mpc_dstapic = mp_ioapic_routing[ioapic].apic_id;
1172 intsrc.mpc_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base;
1173
1174 MP_intsrc_info(&intsrc);
1175
1176 return 0;
1177}
1178
1da177e4
LT
1179/*
1180 * Parse IOAPIC related entries in MADT
1181 * returns 0 on success, < 0 on error
1182 */
4be44fcd 1183static int __init acpi_parse_madt_ioapic_entries(void)
1da177e4
LT
1184{
1185 int count;
1186
1187 /*
1188 * ACPI interpreter is required to complete interrupt setup,
1189 * so if it is off, don't enumerate the io-apics with ACPI.
1190 * If MPS is present, it will handle them,
1191 * otherwise the system will stay in PIC mode
1192 */
1193 if (acpi_disabled || acpi_noirq) {
1194 return -ENODEV;
4be44fcd 1195 }
1da177e4 1196
5f3b1a8b 1197 if (!cpu_has_apic)
d3b6a349
AK
1198 return -ENODEV;
1199
1da177e4 1200 /*
4be44fcd 1201 * if "noapic" boot option, don't look for IO-APICs
1da177e4
LT
1202 */
1203 if (skip_ioapic_setup) {
1204 printk(KERN_INFO PREFIX "Skipping IOAPIC probe "
4be44fcd 1205 "due to 'noapic' option.\n");
1da177e4
LT
1206 return -ENODEV;
1207 }
1208
4be44fcd 1209 count =
5f3b1a8b 1210 acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic,
4be44fcd 1211 MAX_IO_APICS);
1da177e4
LT
1212 if (!count) {
1213 printk(KERN_ERR PREFIX "No IOAPIC entries present\n");
1214 return -ENODEV;
4be44fcd 1215 } else if (count < 0) {
1da177e4
LT
1216 printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n");
1217 return count;
1218 }
1219
4be44fcd 1220 count =
5f3b1a8b 1221 acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr,
4be44fcd 1222 NR_IRQ_VECTORS);
1da177e4 1223 if (count < 0) {
4be44fcd
LB
1224 printk(KERN_ERR PREFIX
1225 "Error parsing interrupt source overrides entry\n");
1da177e4
LT
1226 /* TBD: Cleanup to allow fallback to MPS */
1227 return count;
1228 }
1229
1230 /*
1231 * If BIOS did not supply an INT_SRC_OVR for the SCI
1232 * pretend we got one so we can set the SCI flags.
1233 */
1234 if (!acpi_sci_override_gsi)
cee324b1 1235 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0);
1da177e4
LT
1236
1237 /* Fill in identity legacy mapings where no override */
1238 mp_config_acpi_legacy_irqs();
1239
4be44fcd 1240 count =
5f3b1a8b 1241 acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src,
4be44fcd 1242 NR_IRQ_VECTORS);
1da177e4
LT
1243 if (count < 0) {
1244 printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n");
1245 /* TBD: Cleanup to allow fallback to MPS */
1246 return count;
1247 }
1248
1249 return 0;
1250}
1251#else
1252static inline int acpi_parse_madt_ioapic_entries(void)
1253{
1254 return -1;
1255}
8466361a 1256#endif /* !CONFIG_X86_IO_APIC */
1da177e4 1257
cbf9bd60
YL
1258static void __init early_acpi_process_madt(void)
1259{
1260#ifdef CONFIG_X86_LOCAL_APIC
1261 int error;
1262
1263 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
1264
1265 /*
1266 * Parse MADT LAPIC entries
1267 */
1268 error = early_acpi_parse_madt_lapic_addr_ovr();
1269 if (!error) {
1270 acpi_lapic = 1;
1271 smp_found_config = 1;
1272 }
1273 if (error == -EINVAL) {
1274 /*
1275 * Dell Precision Workstation 410, 610 come here.
1276 */
1277 printk(KERN_ERR PREFIX
1278 "Invalid BIOS MADT, disabling ACPI\n");
1279 disable_acpi();
1280 }
1281 }
1282#endif
1283}
1284
4be44fcd 1285static void __init acpi_process_madt(void)
1da177e4
LT
1286{
1287#ifdef CONFIG_X86_LOCAL_APIC
7f8f97c3 1288 int error;
1da177e4 1289
7f8f97c3 1290 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
1da177e4
LT
1291
1292 /*
1293 * Parse MADT LAPIC entries
1294 */
1295 error = acpi_parse_madt_lapic_entries();
1296 if (!error) {
1297 acpi_lapic = 1;
1298
911a62d4
VP
1299#ifdef CONFIG_X86_GENERICARCH
1300 generic_bigsmp_probe();
1301#endif
1da177e4
LT
1302 /*
1303 * Parse MADT IO-APIC entries
1304 */
1305 error = acpi_parse_madt_ioapic_entries();
1306 if (!error) {
1307 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
1308 acpi_irq_balance_set(NULL);
1309 acpi_ioapic = 1;
1310
1311 smp_found_config = 1;
3c43f039 1312 setup_apic_routing();
1da177e4
LT
1313 }
1314 }
1315 if (error == -EINVAL) {
1316 /*
1317 * Dell Precision Workstation 410, 610 come here.
1318 */
4be44fcd
LB
1319 printk(KERN_ERR PREFIX
1320 "Invalid BIOS MADT, disabling ACPI\n");
1da177e4
LT
1321 disable_acpi();
1322 }
1323 }
1324#endif
1325 return;
1326}
1327
aea00143
AP
1328#ifdef __i386__
1329
1855256c 1330static int __init disable_acpi_irq(const struct dmi_system_id *d)
aea00143
AP
1331{
1332 if (!acpi_force) {
1333 printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n",
1334 d->ident);
1335 acpi_noirq_set();
1336 }
1337 return 0;
1338}
1339
1855256c 1340static int __init disable_acpi_pci(const struct dmi_system_id *d)
aea00143
AP
1341{
1342 if (!acpi_force) {
1343 printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n",
1344 d->ident);
1345 acpi_disable_pci();
1346 }
1347 return 0;
1348}
aea00143 1349
1855256c 1350static int __init dmi_disable_acpi(const struct dmi_system_id *d)
aea00143
AP
1351{
1352 if (!acpi_force) {
4be44fcd 1353 printk(KERN_NOTICE "%s detected: acpi off\n", d->ident);
aea00143
AP
1354 disable_acpi();
1355 } else {
1356 printk(KERN_NOTICE
1357 "Warning: DMI blacklist says broken, but acpi forced\n");
1358 }
1359 return 0;
1360}
1361
1362/*
1363 * Limit ACPI to CPU enumeration for HT
1364 */
1855256c 1365static int __init force_acpi_ht(const struct dmi_system_id *d)
aea00143
AP
1366{
1367 if (!acpi_force) {
4be44fcd
LB
1368 printk(KERN_NOTICE "%s detected: force use of acpi=ht\n",
1369 d->ident);
aea00143
AP
1370 disable_acpi();
1371 acpi_ht = 1;
1372 } else {
1373 printk(KERN_NOTICE
1374 "Warning: acpi=force overrules DMI blacklist: acpi=ht\n");
1375 }
1376 return 0;
1377}
1378
1379/*
1380 * If your system is blacklisted here, but you find that acpi=force
1381 * works for you, please contact acpi-devel@sourceforge.net
1382 */
1383static struct dmi_system_id __initdata acpi_dmi_table[] = {
1384 /*
1385 * Boxes that need ACPI disabled
1386 */
1387 {
4be44fcd
LB
1388 .callback = dmi_disable_acpi,
1389 .ident = "IBM Thinkpad",
1390 .matches = {
1391 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1392 DMI_MATCH(DMI_BOARD_NAME, "2629H1G"),
1393 },
1394 },
aea00143
AP
1395
1396 /*
1397 * Boxes that need acpi=ht
1398 */
1399 {
4be44fcd
LB
1400 .callback = force_acpi_ht,
1401 .ident = "FSC Primergy T850",
1402 .matches = {
1403 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
1404 DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"),
1405 },
1406 },
aea00143 1407 {
4be44fcd
LB
1408 .callback = force_acpi_ht,
1409 .ident = "HP VISUALIZE NT Workstation",
1410 .matches = {
1411 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
1412 DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"),
1413 },
1414 },
aea00143 1415 {
4be44fcd
LB
1416 .callback = force_acpi_ht,
1417 .ident = "Compaq Workstation W8000",
1418 .matches = {
1419 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
1420 DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"),
1421 },
1422 },
aea00143 1423 {
4be44fcd
LB
1424 .callback = force_acpi_ht,
1425 .ident = "ASUS P4B266",
1426 .matches = {
1427 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1428 DMI_MATCH(DMI_BOARD_NAME, "P4B266"),
1429 },
1430 },
aea00143 1431 {
4be44fcd
LB
1432 .callback = force_acpi_ht,
1433 .ident = "ASUS P2B-DS",
1434 .matches = {
1435 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1436 DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"),
1437 },
1438 },
aea00143 1439 {
4be44fcd
LB
1440 .callback = force_acpi_ht,
1441 .ident = "ASUS CUR-DLS",
1442 .matches = {
1443 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1444 DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"),
1445 },
1446 },
aea00143 1447 {
4be44fcd
LB
1448 .callback = force_acpi_ht,
1449 .ident = "ABIT i440BX-W83977",
1450 .matches = {
1451 DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"),
1452 DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"),
1453 },
1454 },
aea00143 1455 {
4be44fcd
LB
1456 .callback = force_acpi_ht,
1457 .ident = "IBM Bladecenter",
1458 .matches = {
1459 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1460 DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"),
1461 },
1462 },
aea00143 1463 {
4be44fcd
LB
1464 .callback = force_acpi_ht,
1465 .ident = "IBM eServer xSeries 360",
1466 .matches = {
1467 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1468 DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"),
1469 },
1470 },
aea00143 1471 {
4be44fcd
LB
1472 .callback = force_acpi_ht,
1473 .ident = "IBM eserver xSeries 330",
1474 .matches = {
1475 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1476 DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"),
1477 },
1478 },
aea00143 1479 {
4be44fcd
LB
1480 .callback = force_acpi_ht,
1481 .ident = "IBM eserver xSeries 440",
1482 .matches = {
1483 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1484 DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"),
1485 },
1486 },
aea00143 1487
aea00143
AP
1488 /*
1489 * Boxes that need ACPI PCI IRQ routing disabled
1490 */
1491 {
4be44fcd
LB
1492 .callback = disable_acpi_irq,
1493 .ident = "ASUS A7V",
1494 .matches = {
1495 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
1496 DMI_MATCH(DMI_BOARD_NAME, "<A7V>"),
1497 /* newer BIOS, Revision 1011, does work */
1498 DMI_MATCH(DMI_BIOS_VERSION,
1499 "ASUS A7V ACPI BIOS Revision 1007"),
1500 },
1501 },
74586fca
LB
1502 {
1503 /*
1504 * Latest BIOS for IBM 600E (1.16) has bad pcinum
1505 * for LPC bridge, which is needed for the PCI
1506 * interrupt links to work. DSDT fix is in bug 5966.
1507 * 2645, 2646 model numbers are shared with 600/600E/600X
1508 */
1509 .callback = disable_acpi_irq,
1510 .ident = "IBM Thinkpad 600 Series 2645",
1511 .matches = {
1512 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1513 DMI_MATCH(DMI_BOARD_NAME, "2645"),
1514 },
1515 },
1516 {
1517 .callback = disable_acpi_irq,
1518 .ident = "IBM Thinkpad 600 Series 2646",
1519 .matches = {
1520 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1521 DMI_MATCH(DMI_BOARD_NAME, "2646"),
1522 },
1523 },
aea00143
AP
1524 /*
1525 * Boxes that need ACPI PCI IRQ routing and PCI scan disabled
1526 */
4be44fcd
LB
1527 { /* _BBN 0 bug */
1528 .callback = disable_acpi_pci,
1529 .ident = "ASUS PR-DLS",
1530 .matches = {
1531 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1532 DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"),
1533 DMI_MATCH(DMI_BIOS_VERSION,
1534 "ASUS PR-DLS ACPI BIOS Revision 1010"),
1535 DMI_MATCH(DMI_BIOS_DATE, "03/21/2003")
1536 },
1537 },
aea00143 1538 {
4be44fcd
LB
1539 .callback = disable_acpi_pci,
1540 .ident = "Acer TravelMate 36x Laptop",
1541 .matches = {
1542 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1543 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1544 },
1545 },
4be44fcd 1546 {}
aea00143
AP
1547};
1548
4be44fcd 1549#endif /* __i386__ */
aea00143 1550
1da177e4
LT
1551/*
1552 * acpi_boot_table_init() and acpi_boot_init()
1553 * called from setup_arch(), always.
1554 * 1. checksums all tables
1555 * 2. enumerates lapics
1556 * 3. enumerates io-apics
1557 *
1558 * acpi_table_init() is separate to allow reading SRAT without
1559 * other side effects.
1560 *
1561 * side effects of acpi_boot_init:
1562 * acpi_lapic = 1 if LAPIC found
1563 * acpi_ioapic = 1 if IOAPIC found
1564 * if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
1565 * if acpi_blacklisted() acpi_disabled = 1;
1566 * acpi_irq_model=...
1567 * ...
1568 *
1569 * return value: (currently ignored)
1570 * 0: success
1571 * !0: failure
1572 */
1573
4be44fcd 1574int __init acpi_boot_table_init(void)
1da177e4
LT
1575{
1576 int error;
1577
aea00143
AP
1578#ifdef __i386__
1579 dmi_check_system(acpi_dmi_table);
1580#endif
1581
1da177e4
LT
1582 /*
1583 * If acpi_disabled, bail out
1584 * One exception: acpi=ht continues far enough to enumerate LAPICs
1585 */
1586 if (acpi_disabled && !acpi_ht)
4be44fcd 1587 return 1;
1da177e4 1588
5f3b1a8b 1589 /*
1da177e4
LT
1590 * Initialize the ACPI boot-time table parser.
1591 */
1592 error = acpi_table_init();
1593 if (error) {
1594 disable_acpi();
1595 return error;
1596 }
1da177e4 1597
5f3b1a8b 1598 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1da177e4
LT
1599
1600 /*
1601 * blacklist may disable ACPI entirely
1602 */
1603 error = acpi_blacklisted();
1604 if (error) {
1da177e4
LT
1605 if (acpi_force) {
1606 printk(KERN_WARNING PREFIX "acpi=force override\n");
1607 } else {
1608 printk(KERN_WARNING PREFIX "Disabling ACPI support\n");
1609 disable_acpi();
1610 return error;
1611 }
1612 }
cbf9bd60
YL
1613
1614 return 0;
1615}
1616
1617int __init early_acpi_boot_init(void)
1618{
1619 /*
1620 * If acpi_disabled, bail out
1621 * One exception: acpi=ht continues far enough to enumerate LAPICs
1622 */
1623 if (acpi_disabled && !acpi_ht)
1624 return 1;
1625
1626 /*
1627 * Process the Multiple APIC Description Table (MADT), if present
1628 */
1629 early_acpi_process_madt();
1da177e4
LT
1630
1631 return 0;
1632}
1633
1da177e4
LT
1634int __init acpi_boot_init(void)
1635{
1636 /*
1637 * If acpi_disabled, bail out
1638 * One exception: acpi=ht continues far enough to enumerate LAPICs
1639 */
1640 if (acpi_disabled && !acpi_ht)
4be44fcd 1641 return 1;
1da177e4 1642
5f3b1a8b 1643 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1da177e4
LT
1644
1645 /*
1646 * set sci_int and PM timer address
1647 */
ceb6c468 1648 acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
1da177e4
LT
1649
1650 /*
1651 * Process the Multiple APIC Description Table (MADT), if present
1652 */
1653 acpi_process_madt();
1654
5f3b1a8b 1655 acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
1da177e4
LT
1656
1657 return 0;
1658}
1a3f239d
RR
1659
1660static int __init parse_acpi(char *arg)
1661{
1662 if (!arg)
1663 return -EINVAL;
1664
1665 /* "acpi=off" disables both ACPI table parsing and interpreter */
1666 if (strcmp(arg, "off") == 0) {
1667 disable_acpi();
1668 }
1669 /* acpi=force to over-ride black-list */
1670 else if (strcmp(arg, "force") == 0) {
1671 acpi_force = 1;
1672 acpi_ht = 1;
1673 acpi_disabled = 0;
1674 }
1675 /* acpi=strict disables out-of-spec workarounds */
1676 else if (strcmp(arg, "strict") == 0) {
1677 acpi_strict = 1;
1678 }
1679 /* Limit ACPI just to boot-time to enable HT */
1680 else if (strcmp(arg, "ht") == 0) {
1681 if (!acpi_force)
1682 disable_acpi();
1683 acpi_ht = 1;
1684 }
1685 /* "acpi=noirq" disables ACPI interrupt routing */
1686 else if (strcmp(arg, "noirq") == 0) {
1687 acpi_noirq_set();
1688 } else {
1689 /* Core will printk when we return error. */
1690 return -EINVAL;
1691 }
1692 return 0;
1693}
1694early_param("acpi", parse_acpi);
1695
1696/* FIXME: Using pci= for an ACPI parameter is a travesty. */
1697static int __init parse_pci(char *arg)
1698{
1699 if (arg && strcmp(arg, "noacpi") == 0)
1700 acpi_disable_pci();
1701 return 0;
1702}
1703early_param("pci", parse_pci);
1704
1705#ifdef CONFIG_X86_IO_APIC
1706static int __init parse_acpi_skip_timer_override(char *arg)
1707{
1708 acpi_skip_timer_override = 1;
1709 return 0;
1710}
1711early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override);
fa18f477
AK
1712
1713static int __init parse_acpi_use_timer_override(char *arg)
1714{
1715 acpi_use_timer_override = 1;
1716 return 0;
1717}
1718early_param("acpi_use_timer_override", parse_acpi_use_timer_override);
1a3f239d
RR
1719#endif /* CONFIG_X86_IO_APIC */
1720
1721static int __init setup_acpi_sci(char *s)
1722{
1723 if (!s)
1724 return -EINVAL;
1725 if (!strcmp(s, "edge"))
5f3b1a8b
AS
1726 acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE |
1727 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1a3f239d 1728 else if (!strcmp(s, "level"))
5f3b1a8b
AS
1729 acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
1730 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1a3f239d 1731 else if (!strcmp(s, "high"))
5f3b1a8b
AS
1732 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
1733 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1a3f239d 1734 else if (!strcmp(s, "low"))
5f3b1a8b
AS
1735 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
1736 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1a3f239d
RR
1737 else
1738 return -EINVAL;
1739 return 0;
1740}
1741early_param("acpi_sci", setup_acpi_sci);
d0a9081b
AM
1742
1743int __acpi_acquire_global_lock(unsigned int *lock)
1744{
1745 unsigned int old, new, val;
1746 do {
1747 old = *lock;
1748 new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1));
1749 val = cmpxchg(lock, old, new);
1750 } while (unlikely (val != old));
1751 return (new < 3) ? -1 : 0;
1752}
1753
1754int __acpi_release_global_lock(unsigned int *lock)
1755{
1756 unsigned int old, new, val;
1757 do {
1758 old = *lock;
1759 new = old & ~0x3;
1760 val = cmpxchg(lock, old, new);
1761 } while (unlikely (val != old));
1762 return old & 0x1;
1763}
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