Commit | Line | Data |
---|---|---|
c767a54b JP |
1 | #define pr_fmt(fmt) "SMP alternatives: " fmt |
2 | ||
9a0b5817 | 3 | #include <linux/module.h> |
f6a57033 | 4 | #include <linux/sched.h> |
2f1dafe5 | 5 | #include <linux/mutex.h> |
9a0b5817 | 6 | #include <linux/list.h> |
8b5a10fc | 7 | #include <linux/stringify.h> |
19d36ccd AK |
8 | #include <linux/mm.h> |
9 | #include <linux/vmalloc.h> | |
3945dab4 | 10 | #include <linux/memory.h> |
3d55cc8a | 11 | #include <linux/stop_machine.h> |
5a0e3ad6 | 12 | #include <linux/slab.h> |
fd4363ff | 13 | #include <linux/kdebug.h> |
9a0b5817 GH |
14 | #include <asm/alternative.h> |
15 | #include <asm/sections.h> | |
19d36ccd | 16 | #include <asm/pgtable.h> |
8f4e956b AK |
17 | #include <asm/mce.h> |
18 | #include <asm/nmi.h> | |
e587cadd | 19 | #include <asm/cacheflush.h> |
78ff7fae | 20 | #include <asm/tlbflush.h> |
e587cadd | 21 | #include <asm/io.h> |
78ff7fae | 22 | #include <asm/fixmap.h> |
9a0b5817 | 23 | |
ab144f5e AK |
24 | #define MAX_PATCH_LEN (255-1) |
25 | ||
8b5a10fc | 26 | static int __initdata_or_module debug_alternative; |
b7fb4af0 | 27 | |
d167a518 GH |
28 | static int __init debug_alt(char *str) |
29 | { | |
30 | debug_alternative = 1; | |
31 | return 1; | |
32 | } | |
d167a518 GH |
33 | __setup("debug-alternative", debug_alt); |
34 | ||
09488165 JB |
35 | static int noreplace_smp; |
36 | ||
b7fb4af0 JF |
37 | static int __init setup_noreplace_smp(char *str) |
38 | { | |
39 | noreplace_smp = 1; | |
40 | return 1; | |
41 | } | |
42 | __setup("noreplace-smp", setup_noreplace_smp); | |
43 | ||
959b4fdf | 44 | #ifdef CONFIG_PARAVIRT |
8b5a10fc | 45 | static int __initdata_or_module noreplace_paravirt = 0; |
959b4fdf JF |
46 | |
47 | static int __init setup_noreplace_paravirt(char *str) | |
48 | { | |
49 | noreplace_paravirt = 1; | |
50 | return 1; | |
51 | } | |
52 | __setup("noreplace-paravirt", setup_noreplace_paravirt); | |
53 | #endif | |
b7fb4af0 | 54 | |
db477a33 BP |
55 | #define DPRINTK(fmt, args...) \ |
56 | do { \ | |
57 | if (debug_alternative) \ | |
58 | printk(KERN_DEBUG "%s: " fmt "\n", __func__, ##args); \ | |
c767a54b | 59 | } while (0) |
d167a518 | 60 | |
48c7a250 BP |
61 | #define DUMP_BYTES(buf, len, fmt, args...) \ |
62 | do { \ | |
63 | if (unlikely(debug_alternative)) { \ | |
64 | int j; \ | |
65 | \ | |
66 | if (!(len)) \ | |
67 | break; \ | |
68 | \ | |
69 | printk(KERN_DEBUG fmt, ##args); \ | |
70 | for (j = 0; j < (len) - 1; j++) \ | |
71 | printk(KERN_CONT "%02hhx ", buf[j]); \ | |
72 | printk(KERN_CONT "%02hhx\n", buf[j]); \ | |
73 | } \ | |
74 | } while (0) | |
75 | ||
dc326fca PA |
76 | /* |
77 | * Each GENERIC_NOPX is of X bytes, and defined as an array of bytes | |
78 | * that correspond to that nop. Getting from one nop to the next, we | |
79 | * add to the array the offset that is equal to the sum of all sizes of | |
80 | * nops preceding the one we are after. | |
81 | * | |
82 | * Note: The GENERIC_NOP5_ATOMIC is at the end, as it breaks the | |
83 | * nice symmetry of sizes of the previous nops. | |
84 | */ | |
8b5a10fc | 85 | #if defined(GENERIC_NOP1) && !defined(CONFIG_X86_64) |
dc326fca PA |
86 | static const unsigned char intelnops[] = |
87 | { | |
88 | GENERIC_NOP1, | |
89 | GENERIC_NOP2, | |
90 | GENERIC_NOP3, | |
91 | GENERIC_NOP4, | |
92 | GENERIC_NOP5, | |
93 | GENERIC_NOP6, | |
94 | GENERIC_NOP7, | |
95 | GENERIC_NOP8, | |
96 | GENERIC_NOP5_ATOMIC | |
97 | }; | |
98 | static const unsigned char * const intel_nops[ASM_NOP_MAX+2] = | |
99 | { | |
9a0b5817 GH |
100 | NULL, |
101 | intelnops, | |
102 | intelnops + 1, | |
103 | intelnops + 1 + 2, | |
104 | intelnops + 1 + 2 + 3, | |
105 | intelnops + 1 + 2 + 3 + 4, | |
106 | intelnops + 1 + 2 + 3 + 4 + 5, | |
107 | intelnops + 1 + 2 + 3 + 4 + 5 + 6, | |
108 | intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 109 | intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
9a0b5817 | 110 | }; |
d167a518 GH |
111 | #endif |
112 | ||
113 | #ifdef K8_NOP1 | |
dc326fca PA |
114 | static const unsigned char k8nops[] = |
115 | { | |
116 | K8_NOP1, | |
117 | K8_NOP2, | |
118 | K8_NOP3, | |
119 | K8_NOP4, | |
120 | K8_NOP5, | |
121 | K8_NOP6, | |
122 | K8_NOP7, | |
123 | K8_NOP8, | |
124 | K8_NOP5_ATOMIC | |
125 | }; | |
126 | static const unsigned char * const k8_nops[ASM_NOP_MAX+2] = | |
127 | { | |
9a0b5817 GH |
128 | NULL, |
129 | k8nops, | |
130 | k8nops + 1, | |
131 | k8nops + 1 + 2, | |
132 | k8nops + 1 + 2 + 3, | |
133 | k8nops + 1 + 2 + 3 + 4, | |
134 | k8nops + 1 + 2 + 3 + 4 + 5, | |
135 | k8nops + 1 + 2 + 3 + 4 + 5 + 6, | |
136 | k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 137 | k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
9a0b5817 | 138 | }; |
d167a518 GH |
139 | #endif |
140 | ||
8b5a10fc | 141 | #if defined(K7_NOP1) && !defined(CONFIG_X86_64) |
dc326fca PA |
142 | static const unsigned char k7nops[] = |
143 | { | |
144 | K7_NOP1, | |
145 | K7_NOP2, | |
146 | K7_NOP3, | |
147 | K7_NOP4, | |
148 | K7_NOP5, | |
149 | K7_NOP6, | |
150 | K7_NOP7, | |
151 | K7_NOP8, | |
152 | K7_NOP5_ATOMIC | |
153 | }; | |
154 | static const unsigned char * const k7_nops[ASM_NOP_MAX+2] = | |
155 | { | |
9a0b5817 GH |
156 | NULL, |
157 | k7nops, | |
158 | k7nops + 1, | |
159 | k7nops + 1 + 2, | |
160 | k7nops + 1 + 2 + 3, | |
161 | k7nops + 1 + 2 + 3 + 4, | |
162 | k7nops + 1 + 2 + 3 + 4 + 5, | |
163 | k7nops + 1 + 2 + 3 + 4 + 5 + 6, | |
164 | k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 165 | k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
9a0b5817 | 166 | }; |
d167a518 GH |
167 | #endif |
168 | ||
32c464f5 | 169 | #ifdef P6_NOP1 |
cb09cad4 | 170 | static const unsigned char p6nops[] = |
dc326fca PA |
171 | { |
172 | P6_NOP1, | |
173 | P6_NOP2, | |
174 | P6_NOP3, | |
175 | P6_NOP4, | |
176 | P6_NOP5, | |
177 | P6_NOP6, | |
178 | P6_NOP7, | |
179 | P6_NOP8, | |
180 | P6_NOP5_ATOMIC | |
181 | }; | |
182 | static const unsigned char * const p6_nops[ASM_NOP_MAX+2] = | |
183 | { | |
32c464f5 JB |
184 | NULL, |
185 | p6nops, | |
186 | p6nops + 1, | |
187 | p6nops + 1 + 2, | |
188 | p6nops + 1 + 2 + 3, | |
189 | p6nops + 1 + 2 + 3 + 4, | |
190 | p6nops + 1 + 2 + 3 + 4 + 5, | |
191 | p6nops + 1 + 2 + 3 + 4 + 5 + 6, | |
192 | p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 193 | p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
32c464f5 JB |
194 | }; |
195 | #endif | |
196 | ||
dc326fca | 197 | /* Initialize these to a safe default */ |
d167a518 | 198 | #ifdef CONFIG_X86_64 |
dc326fca PA |
199 | const unsigned char * const *ideal_nops = p6_nops; |
200 | #else | |
201 | const unsigned char * const *ideal_nops = intel_nops; | |
202 | #endif | |
d167a518 | 203 | |
dc326fca | 204 | void __init arch_init_ideal_nops(void) |
d167a518 | 205 | { |
dc326fca PA |
206 | switch (boot_cpu_data.x86_vendor) { |
207 | case X86_VENDOR_INTEL: | |
d8d9766c PA |
208 | /* |
209 | * Due to a decoder implementation quirk, some | |
210 | * specific Intel CPUs actually perform better with | |
211 | * the "k8_nops" than with the SDM-recommended NOPs. | |
212 | */ | |
213 | if (boot_cpu_data.x86 == 6 && | |
214 | boot_cpu_data.x86_model >= 0x0f && | |
215 | boot_cpu_data.x86_model != 0x1c && | |
216 | boot_cpu_data.x86_model != 0x26 && | |
217 | boot_cpu_data.x86_model != 0x27 && | |
218 | boot_cpu_data.x86_model < 0x30) { | |
219 | ideal_nops = k8_nops; | |
220 | } else if (boot_cpu_has(X86_FEATURE_NOPL)) { | |
dc326fca PA |
221 | ideal_nops = p6_nops; |
222 | } else { | |
223 | #ifdef CONFIG_X86_64 | |
224 | ideal_nops = k8_nops; | |
225 | #else | |
226 | ideal_nops = intel_nops; | |
227 | #endif | |
228 | } | |
d6250a3f | 229 | break; |
f21262b8 BP |
230 | |
231 | case X86_VENDOR_AMD: | |
232 | if (boot_cpu_data.x86 > 0xf) { | |
233 | ideal_nops = p6_nops; | |
234 | return; | |
235 | } | |
236 | ||
237 | /* fall through */ | |
238 | ||
dc326fca PA |
239 | default: |
240 | #ifdef CONFIG_X86_64 | |
241 | ideal_nops = k8_nops; | |
242 | #else | |
243 | if (boot_cpu_has(X86_FEATURE_K8)) | |
244 | ideal_nops = k8_nops; | |
245 | else if (boot_cpu_has(X86_FEATURE_K7)) | |
246 | ideal_nops = k7_nops; | |
247 | else | |
248 | ideal_nops = intel_nops; | |
249 | #endif | |
250 | } | |
9a0b5817 GH |
251 | } |
252 | ||
ab144f5e | 253 | /* Use this to add nops to a buffer, then text_poke the whole buffer. */ |
8b5a10fc | 254 | static void __init_or_module add_nops(void *insns, unsigned int len) |
139ec7c4 | 255 | { |
139ec7c4 RR |
256 | while (len > 0) { |
257 | unsigned int noplen = len; | |
258 | if (noplen > ASM_NOP_MAX) | |
259 | noplen = ASM_NOP_MAX; | |
dc326fca | 260 | memcpy(insns, ideal_nops[noplen], noplen); |
139ec7c4 RR |
261 | insns += noplen; |
262 | len -= noplen; | |
263 | } | |
264 | } | |
265 | ||
d167a518 | 266 | extern struct alt_instr __alt_instructions[], __alt_instructions_end[]; |
5967ed87 | 267 | extern s32 __smp_locks[], __smp_locks_end[]; |
fa6f2cc7 | 268 | void *text_poke_early(void *addr, const void *opcode, size_t len); |
d167a518 | 269 | |
48c7a250 BP |
270 | /* |
271 | * Are we looking at a near JMP with a 1 or 4-byte displacement. | |
272 | */ | |
273 | static inline bool is_jmp(const u8 opcode) | |
274 | { | |
275 | return opcode == 0xeb || opcode == 0xe9; | |
276 | } | |
277 | ||
278 | static void __init_or_module | |
279 | recompute_jump(struct alt_instr *a, u8 *orig_insn, u8 *repl_insn, u8 *insnbuf) | |
280 | { | |
281 | u8 *next_rip, *tgt_rip; | |
282 | s32 n_dspl, o_dspl; | |
283 | int repl_len; | |
284 | ||
285 | if (a->replacementlen != 5) | |
286 | return; | |
287 | ||
288 | o_dspl = *(s32 *)(insnbuf + 1); | |
289 | ||
290 | /* next_rip of the replacement JMP */ | |
291 | next_rip = repl_insn + a->replacementlen; | |
292 | /* target rip of the replacement JMP */ | |
293 | tgt_rip = next_rip + o_dspl; | |
294 | n_dspl = tgt_rip - orig_insn; | |
295 | ||
296 | DPRINTK("target RIP: %p, new_displ: 0x%x", tgt_rip, n_dspl); | |
297 | ||
298 | if (tgt_rip - orig_insn >= 0) { | |
299 | if (n_dspl - 2 <= 127) | |
300 | goto two_byte_jmp; | |
301 | else | |
302 | goto five_byte_jmp; | |
303 | /* negative offset */ | |
304 | } else { | |
305 | if (((n_dspl - 2) & 0xff) == (n_dspl - 2)) | |
306 | goto two_byte_jmp; | |
307 | else | |
308 | goto five_byte_jmp; | |
309 | } | |
310 | ||
311 | two_byte_jmp: | |
312 | n_dspl -= 2; | |
313 | ||
314 | insnbuf[0] = 0xeb; | |
315 | insnbuf[1] = (s8)n_dspl; | |
316 | add_nops(insnbuf + 2, 3); | |
317 | ||
318 | repl_len = 2; | |
319 | goto done; | |
320 | ||
321 | five_byte_jmp: | |
322 | n_dspl -= 5; | |
323 | ||
324 | insnbuf[0] = 0xe9; | |
325 | *(s32 *)&insnbuf[1] = n_dspl; | |
326 | ||
327 | repl_len = 5; | |
328 | ||
329 | done: | |
330 | ||
331 | DPRINTK("final displ: 0x%08x, JMP 0x%lx", | |
332 | n_dspl, (unsigned long)orig_insn + n_dspl + repl_len); | |
333 | } | |
334 | ||
4fd4b6e5 BP |
335 | static void __init_or_module optimize_nops(struct alt_instr *a, u8 *instr) |
336 | { | |
69df353f BP |
337 | if (instr[0] != 0x90) |
338 | return; | |
339 | ||
4fd4b6e5 BP |
340 | add_nops(instr + (a->instrlen - a->padlen), a->padlen); |
341 | ||
342 | DUMP_BYTES(instr, a->instrlen, "%p: [%d:%d) optimized NOPs: ", | |
343 | instr, a->instrlen - a->padlen, a->padlen); | |
344 | } | |
345 | ||
db477a33 BP |
346 | /* |
347 | * Replace instructions with better alternatives for this CPU type. This runs | |
348 | * before SMP is initialized to avoid SMP problems with self modifying code. | |
349 | * This implies that asymmetric systems where APs have less capabilities than | |
350 | * the boot processor are not handled. Tough. Make sure you disable such | |
351 | * features by hand. | |
352 | */ | |
8b5a10fc JB |
353 | void __init_or_module apply_alternatives(struct alt_instr *start, |
354 | struct alt_instr *end) | |
9a0b5817 | 355 | { |
9a0b5817 | 356 | struct alt_instr *a; |
59e97e4d | 357 | u8 *instr, *replacement; |
1b1d9258 | 358 | u8 insnbuf[MAX_PATCH_LEN]; |
9a0b5817 | 359 | |
db477a33 | 360 | DPRINTK("alt table %p -> %p", start, end); |
50973133 FY |
361 | /* |
362 | * The scan order should be from start to end. A later scanned | |
db477a33 | 363 | * alternative code can overwrite previously scanned alternative code. |
50973133 FY |
364 | * Some kernel functions (e.g. memcpy, memset, etc) use this order to |
365 | * patch code. | |
366 | * | |
367 | * So be careful if you want to change the scan order to any other | |
368 | * order. | |
369 | */ | |
9a0b5817 | 370 | for (a = start; a < end; a++) { |
48c7a250 BP |
371 | int insnbuf_sz = 0; |
372 | ||
59e97e4d AL |
373 | instr = (u8 *)&a->instr_offset + a->instr_offset; |
374 | replacement = (u8 *)&a->repl_offset + a->repl_offset; | |
ab144f5e | 375 | BUG_ON(a->instrlen > sizeof(insnbuf)); |
65fc985b | 376 | BUG_ON(a->cpuid >= (NCAPINTS + NBUGINTS) * 32); |
4fd4b6e5 BP |
377 | if (!boot_cpu_has(a->cpuid)) { |
378 | if (a->padlen > 1) | |
379 | optimize_nops(a, instr); | |
380 | ||
9a0b5817 | 381 | continue; |
4fd4b6e5 | 382 | } |
59e97e4d | 383 | |
dbe4058a | 384 | DPRINTK("feat: %d*32+%d, old: (%p, len: %d), repl: (%p, len: %d), pad: %d", |
db477a33 BP |
385 | a->cpuid >> 5, |
386 | a->cpuid & 0x1f, | |
387 | instr, a->instrlen, | |
dbe4058a | 388 | replacement, a->replacementlen, a->padlen); |
db477a33 | 389 | |
48c7a250 BP |
390 | DUMP_BYTES(instr, a->instrlen, "%p: old_insn: ", instr); |
391 | DUMP_BYTES(replacement, a->replacementlen, "%p: rpl_insn: ", replacement); | |
392 | ||
59e97e4d | 393 | memcpy(insnbuf, replacement, a->replacementlen); |
48c7a250 | 394 | insnbuf_sz = a->replacementlen; |
59e97e4d AL |
395 | |
396 | /* 0xe8 is a relative jump; fix the offset. */ | |
db477a33 BP |
397 | if (*insnbuf == 0xe8 && a->replacementlen == 5) { |
398 | *(s32 *)(insnbuf + 1) += replacement - instr; | |
48c7a250 BP |
399 | DPRINTK("Fix CALL offset: 0x%x, CALL 0x%lx", |
400 | *(s32 *)(insnbuf + 1), | |
401 | (unsigned long)instr + *(s32 *)(insnbuf + 1) + 5); | |
db477a33 | 402 | } |
59e97e4d | 403 | |
48c7a250 BP |
404 | if (a->replacementlen && is_jmp(replacement[0])) |
405 | recompute_jump(a, instr, replacement, insnbuf); | |
406 | ||
407 | if (a->instrlen > a->replacementlen) { | |
4332195c BP |
408 | add_nops(insnbuf + a->replacementlen, |
409 | a->instrlen - a->replacementlen); | |
48c7a250 BP |
410 | insnbuf_sz += a->instrlen - a->replacementlen; |
411 | } | |
412 | DUMP_BYTES(insnbuf, insnbuf_sz, "%p: final_insn: ", instr); | |
59e97e4d | 413 | |
48c7a250 | 414 | text_poke_early(instr, insnbuf, insnbuf_sz); |
9a0b5817 GH |
415 | } |
416 | } | |
417 | ||
8ec4d41f | 418 | #ifdef CONFIG_SMP |
5967ed87 JB |
419 | static void alternatives_smp_lock(const s32 *start, const s32 *end, |
420 | u8 *text, u8 *text_end) | |
9a0b5817 | 421 | { |
5967ed87 | 422 | const s32 *poff; |
9a0b5817 | 423 | |
3945dab4 | 424 | mutex_lock(&text_mutex); |
5967ed87 JB |
425 | for (poff = start; poff < end; poff++) { |
426 | u8 *ptr = (u8 *)poff + *poff; | |
427 | ||
428 | if (!*poff || ptr < text || ptr >= text_end) | |
9a0b5817 | 429 | continue; |
f88f07e0 | 430 | /* turn DS segment override prefix into lock prefix */ |
d9c5841e PA |
431 | if (*ptr == 0x3e) |
432 | text_poke(ptr, ((unsigned char []){0xf0}), 1); | |
4b8073e4 | 433 | } |
3945dab4 | 434 | mutex_unlock(&text_mutex); |
9a0b5817 GH |
435 | } |
436 | ||
5967ed87 JB |
437 | static void alternatives_smp_unlock(const s32 *start, const s32 *end, |
438 | u8 *text, u8 *text_end) | |
9a0b5817 | 439 | { |
5967ed87 | 440 | const s32 *poff; |
9a0b5817 | 441 | |
3945dab4 | 442 | mutex_lock(&text_mutex); |
5967ed87 JB |
443 | for (poff = start; poff < end; poff++) { |
444 | u8 *ptr = (u8 *)poff + *poff; | |
445 | ||
446 | if (!*poff || ptr < text || ptr >= text_end) | |
9a0b5817 | 447 | continue; |
f88f07e0 | 448 | /* turn lock prefix into DS segment override prefix */ |
d9c5841e PA |
449 | if (*ptr == 0xf0) |
450 | text_poke(ptr, ((unsigned char []){0x3E}), 1); | |
4b8073e4 | 451 | } |
3945dab4 | 452 | mutex_unlock(&text_mutex); |
9a0b5817 GH |
453 | } |
454 | ||
455 | struct smp_alt_module { | |
456 | /* what is this ??? */ | |
457 | struct module *mod; | |
458 | char *name; | |
459 | ||
460 | /* ptrs to lock prefixes */ | |
5967ed87 JB |
461 | const s32 *locks; |
462 | const s32 *locks_end; | |
9a0b5817 GH |
463 | |
464 | /* .text segment, needed to avoid patching init code ;) */ | |
465 | u8 *text; | |
466 | u8 *text_end; | |
467 | ||
468 | struct list_head next; | |
469 | }; | |
470 | static LIST_HEAD(smp_alt_modules); | |
2f1dafe5 | 471 | static DEFINE_MUTEX(smp_alt); |
816afe4f | 472 | static bool uniproc_patched = false; /* protected by smp_alt */ |
9a0b5817 | 473 | |
8b5a10fc JB |
474 | void __init_or_module alternatives_smp_module_add(struct module *mod, |
475 | char *name, | |
476 | void *locks, void *locks_end, | |
477 | void *text, void *text_end) | |
9a0b5817 GH |
478 | { |
479 | struct smp_alt_module *smp; | |
9a0b5817 | 480 | |
816afe4f RR |
481 | mutex_lock(&smp_alt); |
482 | if (!uniproc_patched) | |
483 | goto unlock; | |
b7fb4af0 | 484 | |
816afe4f RR |
485 | if (num_possible_cpus() == 1) |
486 | /* Don't bother remembering, we'll never have to undo it. */ | |
487 | goto smp_unlock; | |
9a0b5817 GH |
488 | |
489 | smp = kzalloc(sizeof(*smp), GFP_KERNEL); | |
490 | if (NULL == smp) | |
816afe4f RR |
491 | /* we'll run the (safe but slow) SMP code then ... */ |
492 | goto unlock; | |
9a0b5817 GH |
493 | |
494 | smp->mod = mod; | |
495 | smp->name = name; | |
496 | smp->locks = locks; | |
497 | smp->locks_end = locks_end; | |
498 | smp->text = text; | |
499 | smp->text_end = text_end; | |
db477a33 BP |
500 | DPRINTK("locks %p -> %p, text %p -> %p, name %s\n", |
501 | smp->locks, smp->locks_end, | |
9a0b5817 GH |
502 | smp->text, smp->text_end, smp->name); |
503 | ||
9a0b5817 | 504 | list_add_tail(&smp->next, &smp_alt_modules); |
816afe4f RR |
505 | smp_unlock: |
506 | alternatives_smp_unlock(locks, locks_end, text, text_end); | |
507 | unlock: | |
2f1dafe5 | 508 | mutex_unlock(&smp_alt); |
9a0b5817 GH |
509 | } |
510 | ||
8b5a10fc | 511 | void __init_or_module alternatives_smp_module_del(struct module *mod) |
9a0b5817 GH |
512 | { |
513 | struct smp_alt_module *item; | |
9a0b5817 | 514 | |
2f1dafe5 | 515 | mutex_lock(&smp_alt); |
9a0b5817 GH |
516 | list_for_each_entry(item, &smp_alt_modules, next) { |
517 | if (mod != item->mod) | |
518 | continue; | |
519 | list_del(&item->next); | |
9a0b5817 | 520 | kfree(item); |
816afe4f | 521 | break; |
9a0b5817 | 522 | } |
2f1dafe5 | 523 | mutex_unlock(&smp_alt); |
9a0b5817 GH |
524 | } |
525 | ||
816afe4f | 526 | void alternatives_enable_smp(void) |
9a0b5817 GH |
527 | { |
528 | struct smp_alt_module *mod; | |
9a0b5817 | 529 | |
816afe4f RR |
530 | /* Why bother if there are no other CPUs? */ |
531 | BUG_ON(num_possible_cpus() == 1); | |
9a0b5817 | 532 | |
2f1dafe5 | 533 | mutex_lock(&smp_alt); |
ca74a6f8 | 534 | |
816afe4f | 535 | if (uniproc_patched) { |
c767a54b | 536 | pr_info("switching to SMP code\n"); |
816afe4f | 537 | BUG_ON(num_online_cpus() != 1); |
53756d37 JF |
538 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_UP); |
539 | clear_cpu_cap(&cpu_data(0), X86_FEATURE_UP); | |
9a0b5817 GH |
540 | list_for_each_entry(mod, &smp_alt_modules, next) |
541 | alternatives_smp_lock(mod->locks, mod->locks_end, | |
542 | mod->text, mod->text_end); | |
816afe4f | 543 | uniproc_patched = false; |
9a0b5817 | 544 | } |
2f1dafe5 | 545 | mutex_unlock(&smp_alt); |
9a0b5817 GH |
546 | } |
547 | ||
2cfa1978 MH |
548 | /* Return 1 if the address range is reserved for smp-alternatives */ |
549 | int alternatives_text_reserved(void *start, void *end) | |
550 | { | |
551 | struct smp_alt_module *mod; | |
5967ed87 | 552 | const s32 *poff; |
076dc4a6 MH |
553 | u8 *text_start = start; |
554 | u8 *text_end = end; | |
2cfa1978 MH |
555 | |
556 | list_for_each_entry(mod, &smp_alt_modules, next) { | |
076dc4a6 | 557 | if (mod->text > text_end || mod->text_end < text_start) |
2cfa1978 | 558 | continue; |
5967ed87 JB |
559 | for (poff = mod->locks; poff < mod->locks_end; poff++) { |
560 | const u8 *ptr = (const u8 *)poff + *poff; | |
561 | ||
562 | if (text_start <= ptr && text_end > ptr) | |
2cfa1978 | 563 | return 1; |
5967ed87 | 564 | } |
2cfa1978 MH |
565 | } |
566 | ||
567 | return 0; | |
568 | } | |
48c7a250 | 569 | #endif /* CONFIG_SMP */ |
8ec4d41f | 570 | |
139ec7c4 | 571 | #ifdef CONFIG_PARAVIRT |
8b5a10fc JB |
572 | void __init_or_module apply_paravirt(struct paravirt_patch_site *start, |
573 | struct paravirt_patch_site *end) | |
139ec7c4 | 574 | { |
98de032b | 575 | struct paravirt_patch_site *p; |
ab144f5e | 576 | char insnbuf[MAX_PATCH_LEN]; |
139ec7c4 | 577 | |
959b4fdf JF |
578 | if (noreplace_paravirt) |
579 | return; | |
580 | ||
139ec7c4 RR |
581 | for (p = start; p < end; p++) { |
582 | unsigned int used; | |
583 | ||
ab144f5e | 584 | BUG_ON(p->len > MAX_PATCH_LEN); |
d34fda4a CW |
585 | /* prep the buffer with the original instructions */ |
586 | memcpy(insnbuf, p->instr, p->len); | |
93b1eab3 JF |
587 | used = pv_init_ops.patch(p->instrtype, p->clobbers, insnbuf, |
588 | (unsigned long)p->instr, p->len); | |
7f63c41c | 589 | |
63f70270 JF |
590 | BUG_ON(used > p->len); |
591 | ||
139ec7c4 | 592 | /* Pad the rest with nops */ |
ab144f5e | 593 | add_nops(insnbuf + used, p->len - used); |
e587cadd | 594 | text_poke_early(p->instr, insnbuf, p->len); |
139ec7c4 | 595 | } |
139ec7c4 | 596 | } |
98de032b | 597 | extern struct paravirt_patch_site __start_parainstructions[], |
139ec7c4 RR |
598 | __stop_parainstructions[]; |
599 | #endif /* CONFIG_PARAVIRT */ | |
600 | ||
9a0b5817 GH |
601 | void __init alternative_instructions(void) |
602 | { | |
8f4e956b AK |
603 | /* The patching is not fully atomic, so try to avoid local interruptions |
604 | that might execute the to be patched code. | |
605 | Other CPUs are not running. */ | |
606 | stop_nmi(); | |
123aa76e AK |
607 | |
608 | /* | |
609 | * Don't stop machine check exceptions while patching. | |
610 | * MCEs only happen when something got corrupted and in this | |
611 | * case we must do something about the corruption. | |
612 | * Ignoring it is worse than a unlikely patching race. | |
613 | * Also machine checks tend to be broadcast and if one CPU | |
614 | * goes into machine check the others follow quickly, so we don't | |
615 | * expect a machine check to cause undue problems during to code | |
616 | * patching. | |
617 | */ | |
8f4e956b | 618 | |
9a0b5817 GH |
619 | apply_alternatives(__alt_instructions, __alt_instructions_end); |
620 | ||
8ec4d41f | 621 | #ifdef CONFIG_SMP |
816afe4f RR |
622 | /* Patch to UP if other cpus not imminent. */ |
623 | if (!noreplace_smp && (num_present_cpus() == 1 || setup_max_cpus <= 1)) { | |
624 | uniproc_patched = true; | |
9a0b5817 GH |
625 | alternatives_smp_module_add(NULL, "core kernel", |
626 | __smp_locks, __smp_locks_end, | |
627 | _text, _etext); | |
9a0b5817 | 628 | } |
8f4e956b | 629 | |
816afe4f | 630 | if (!uniproc_patched || num_possible_cpus() == 1) |
f68fd5f4 FW |
631 | free_init_pages("SMP alternatives", |
632 | (unsigned long)__smp_locks, | |
633 | (unsigned long)__smp_locks_end); | |
816afe4f RR |
634 | #endif |
635 | ||
636 | apply_paravirt(__parainstructions, __parainstructions_end); | |
f68fd5f4 | 637 | |
8f4e956b | 638 | restart_nmi(); |
9a0b5817 | 639 | } |
19d36ccd | 640 | |
e587cadd MD |
641 | /** |
642 | * text_poke_early - Update instructions on a live kernel at boot time | |
643 | * @addr: address to modify | |
644 | * @opcode: source of the copy | |
645 | * @len: length to copy | |
646 | * | |
19d36ccd AK |
647 | * When you use this code to patch more than one byte of an instruction |
648 | * you need to make sure that other CPUs cannot execute this code in parallel. | |
e587cadd MD |
649 | * Also no thread must be currently preempted in the middle of these |
650 | * instructions. And on the local CPU you need to be protected again NMI or MCE | |
651 | * handlers seeing an inconsistent instruction while you patch. | |
19d36ccd | 652 | */ |
fa6f2cc7 | 653 | void *__init_or_module text_poke_early(void *addr, const void *opcode, |
8b5a10fc | 654 | size_t len) |
19d36ccd | 655 | { |
e587cadd MD |
656 | unsigned long flags; |
657 | local_irq_save(flags); | |
19d36ccd | 658 | memcpy(addr, opcode, len); |
e587cadd | 659 | sync_core(); |
5367b688 | 660 | local_irq_restore(flags); |
e587cadd MD |
661 | /* Could also do a CLFLUSH here to speed up CPU recovery; but |
662 | that causes hangs on some VIA CPUs. */ | |
663 | return addr; | |
664 | } | |
665 | ||
666 | /** | |
667 | * text_poke - Update instructions on a live kernel | |
668 | * @addr: address to modify | |
669 | * @opcode: source of the copy | |
670 | * @len: length to copy | |
671 | * | |
672 | * Only atomic text poke/set should be allowed when not doing early patching. | |
673 | * It means the size must be writable atomically and the address must be aligned | |
674 | * in a way that permits an atomic write. It also makes sure we fit on a single | |
675 | * page. | |
78ff7fae MH |
676 | * |
677 | * Note: Must be called under text_mutex. | |
e587cadd | 678 | */ |
9c54b616 | 679 | void *text_poke(void *addr, const void *opcode, size_t len) |
e587cadd | 680 | { |
78ff7fae | 681 | unsigned long flags; |
e587cadd | 682 | char *vaddr; |
b7b66baa MD |
683 | struct page *pages[2]; |
684 | int i; | |
e587cadd | 685 | |
b7b66baa MD |
686 | if (!core_kernel_text((unsigned long)addr)) { |
687 | pages[0] = vmalloc_to_page(addr); | |
688 | pages[1] = vmalloc_to_page(addr + PAGE_SIZE); | |
15a601eb | 689 | } else { |
b7b66baa | 690 | pages[0] = virt_to_page(addr); |
00c6b2d5 | 691 | WARN_ON(!PageReserved(pages[0])); |
b7b66baa | 692 | pages[1] = virt_to_page(addr + PAGE_SIZE); |
e587cadd | 693 | } |
b7b66baa | 694 | BUG_ON(!pages[0]); |
7cf49427 | 695 | local_irq_save(flags); |
78ff7fae MH |
696 | set_fixmap(FIX_TEXT_POKE0, page_to_phys(pages[0])); |
697 | if (pages[1]) | |
698 | set_fixmap(FIX_TEXT_POKE1, page_to_phys(pages[1])); | |
699 | vaddr = (char *)fix_to_virt(FIX_TEXT_POKE0); | |
b7b66baa | 700 | memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len); |
78ff7fae MH |
701 | clear_fixmap(FIX_TEXT_POKE0); |
702 | if (pages[1]) | |
703 | clear_fixmap(FIX_TEXT_POKE1); | |
704 | local_flush_tlb(); | |
19d36ccd | 705 | sync_core(); |
a534b679 AK |
706 | /* Could also do a CLFLUSH here to speed up CPU recovery; but |
707 | that causes hangs on some VIA CPUs. */ | |
b7b66baa MD |
708 | for (i = 0; i < len; i++) |
709 | BUG_ON(((char *)addr)[i] != ((char *)opcode)[i]); | |
7cf49427 | 710 | local_irq_restore(flags); |
e587cadd | 711 | return addr; |
19d36ccd | 712 | } |
3d55cc8a | 713 | |
fd4363ff JK |
714 | static void do_sync_core(void *info) |
715 | { | |
716 | sync_core(); | |
717 | } | |
718 | ||
719 | static bool bp_patching_in_progress; | |
720 | static void *bp_int3_handler, *bp_int3_addr; | |
721 | ||
17f41571 | 722 | int poke_int3_handler(struct pt_regs *regs) |
fd4363ff | 723 | { |
fd4363ff JK |
724 | /* bp_patching_in_progress */ |
725 | smp_rmb(); | |
726 | ||
727 | if (likely(!bp_patching_in_progress)) | |
17f41571 | 728 | return 0; |
fd4363ff | 729 | |
f39b6f0e | 730 | if (user_mode(regs) || regs->ip != (unsigned long)bp_int3_addr) |
17f41571 | 731 | return 0; |
fd4363ff JK |
732 | |
733 | /* set up the specified breakpoint handler */ | |
17f41571 JK |
734 | regs->ip = (unsigned long) bp_int3_handler; |
735 | ||
736 | return 1; | |
fd4363ff | 737 | |
fd4363ff | 738 | } |
17f41571 | 739 | |
fd4363ff JK |
740 | /** |
741 | * text_poke_bp() -- update instructions on live kernel on SMP | |
742 | * @addr: address to patch | |
743 | * @opcode: opcode of new instruction | |
744 | * @len: length to copy | |
745 | * @handler: address to jump to when the temporary breakpoint is hit | |
746 | * | |
747 | * Modify multi-byte instruction by using int3 breakpoint on SMP. | |
ea8596bb MH |
748 | * We completely avoid stop_machine() here, and achieve the |
749 | * synchronization using int3 breakpoint. | |
fd4363ff JK |
750 | * |
751 | * The way it is done: | |
752 | * - add a int3 trap to the address that will be patched | |
753 | * - sync cores | |
754 | * - update all but the first byte of the patched range | |
755 | * - sync cores | |
756 | * - replace the first byte (int3) by the first byte of | |
757 | * replacing opcode | |
758 | * - sync cores | |
759 | * | |
760 | * Note: must be called under text_mutex. | |
761 | */ | |
762 | void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler) | |
763 | { | |
764 | unsigned char int3 = 0xcc; | |
765 | ||
766 | bp_int3_handler = handler; | |
767 | bp_int3_addr = (u8 *)addr + sizeof(int3); | |
768 | bp_patching_in_progress = true; | |
769 | /* | |
770 | * Corresponding read barrier in int3 notifier for | |
771 | * making sure the in_progress flags is correctly ordered wrt. | |
772 | * patching | |
773 | */ | |
774 | smp_wmb(); | |
775 | ||
776 | text_poke(addr, &int3, sizeof(int3)); | |
777 | ||
778 | on_each_cpu(do_sync_core, NULL, 1); | |
779 | ||
780 | if (len - sizeof(int3) > 0) { | |
781 | /* patch all but the first byte */ | |
782 | text_poke((char *)addr + sizeof(int3), | |
783 | (const char *) opcode + sizeof(int3), | |
784 | len - sizeof(int3)); | |
785 | /* | |
786 | * According to Intel, this core syncing is very likely | |
787 | * not necessary and we'd be safe even without it. But | |
788 | * better safe than sorry (plus there's not only Intel). | |
789 | */ | |
790 | on_each_cpu(do_sync_core, NULL, 1); | |
791 | } | |
792 | ||
793 | /* patch the first byte */ | |
794 | text_poke(addr, opcode, sizeof(int3)); | |
795 | ||
796 | on_each_cpu(do_sync_core, NULL, 1); | |
797 | ||
798 | bp_patching_in_progress = false; | |
799 | smp_wmb(); | |
800 | ||
801 | return addr; | |
802 | } | |
803 |