projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| b82fef82 JB |
1 | /* |
| 2 | * Generate definitions needed by assembly language modules. | |
| 3 | * This code generates raw asm output which is post-processed to extract | |
| 4 | * and format the required data. | |
| 5 | */ | |
| 6 | #define COMPILE_OFFSETS | |
| 7 | ||
| 8 | #include <linux/crypto.h> | |
| 9 | #include <linux/sched.h> | |
| 10 | #include <linux/stddef.h> | |
| 11 | #include <linux/hardirq.h> | |
| 12 | #include <linux/suspend.h> | |
| 13 | #include <linux/kbuild.h> | |
| 14 | #include <asm/processor.h> | |
| 15 | #include <asm/thread_info.h> | |
| 16 | #include <asm/sigframe.h> | |
| 17 | #include <asm/bootparam.h> | |
| 18 | #include <asm/suspend.h> | |
| 19 | ||
| 20 | #ifdef CONFIG_XEN | |
| 21 | #include <xen/interface/xen.h> | |
| 22 | #endif | |
| 23 | ||
| 8d0d37cf TG |
24 | #ifdef CONFIG_X86_32 |
| 25 | # include "asm-offsets_32.c" | |
| 26 | #else | |
| 27 | # include "asm-offsets_64.c" | |
| 6db7016d | 28 | #endif |
| b82fef82 JB |
29 | |
| 30 | void common(void) { | |
| b82fef82 JB |
31 | BLANK(); |
| 32 | OFFSET(TI_flags, thread_info, flags); | |
| 33 | OFFSET(TI_status, thread_info, status); | |
| 34 | OFFSET(TI_addr_limit, thread_info, addr_limit); | |
| b82fef82 JB |
35 | |
| 36 | BLANK(); | |
| 37 | OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); | |
| 38 | ||
| 39 | BLANK(); | |
| 40 | OFFSET(pbe_address, pbe, address); | |
| 41 | OFFSET(pbe_orig_address, pbe, orig_address); | |
| 42 | OFFSET(pbe_next, pbe, next); | |
| 43 | ||
| 44 | #ifdef CONFIG_PARAVIRT | |
| 45 | BLANK(); | |
| 46 | OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled); | |
| 47 | OFFSET(PARAVIRT_PATCH_pv_cpu_ops, paravirt_patch_template, pv_cpu_ops); | |
| 48 | OFFSET(PARAVIRT_PATCH_pv_irq_ops, paravirt_patch_template, pv_irq_ops); | |
| 49 | OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable); | |
| 50 | OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable); | |
| 51 | OFFSET(PV_CPU_iret, pv_cpu_ops, iret); | |
| 52 | OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit); | |
| 53 | OFFSET(PV_CPU_read_cr0, pv_cpu_ops, read_cr0); | |
| 54 | OFFSET(PV_MMU_read_cr2, pv_mmu_ops, read_cr2); | |
| 55 | #endif | |
| 56 | ||
| 57 | #ifdef CONFIG_XEN | |
| 58 | BLANK(); | |
| 59 | OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask); | |
| 60 | OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending); | |
| 61 | #endif | |
| 62 | ||
| 63 | BLANK(); | |
| 64 | OFFSET(BP_scratch, boot_params, scratch); | |
| 65 | OFFSET(BP_loadflags, boot_params, hdr.loadflags); | |
| 66 | OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); | |
| 67 | OFFSET(BP_version, boot_params, hdr.version); | |
| 68 | OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment); | |
| 291f3632 MF |
69 | OFFSET(BP_pref_address, boot_params, hdr.pref_address); |
| 70 | OFFSET(BP_code32_start, boot_params, hdr.code32_start); | |
| 6783eaa2 AV |
71 | |
| 72 | BLANK(); | |
| 73 | DEFINE(PTREGS_SIZE, sizeof(struct pt_regs)); | |
| b82fef82 | 74 | } |