[deliverable/linux.git] / arch / x86 / kernel / cpu / mcheck / mce-inject.c

/*
 * Machine check injection support.
 * Copyright 2008 Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; version 2
 * of the License.
 *
 * Authors:
 * Andi Kleen
 * Ying Huang
 */
#include <linux/uaccess.h>
#include <linux/module.h>
#include <linux/timer.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/fs.h>
#include <linux/smp.h>
#include <linux/notifier.h>
#include <linux/kdebug.h>
#include <linux/cpu.h>
#include <linux/sched.h>
#include <asm/mce.h>
#include <asm/apic.h>

/* Update fake mce registers on current CPU. */
static void inject_mce(struct mce *m)
{
	struct mce *i = &per_cpu(injectm, m->extcpu);

	/* Make sure noone reads partially written injectm */
	i->finished = 0;
	mb();
	m->finished = 0;
	/* First set the fields after finished */
	i->extcpu = m->extcpu;
	mb();
	/* Now write record in order, finished last (except above) */
	memcpy(i, m, sizeof(struct mce));
	/* Finally activate it */
	mb();
	i->finished = 1;
}

static void raise_poll(struct mce *m)
{
	unsigned long flags;
	mce_banks_t b;

	memset(&b, 0xff, sizeof(mce_banks_t));
	local_irq_save(flags);
	machine_check_poll(0, &b);
	local_irq_restore(flags);
	m->finished = 0;
}

static void raise_exception(struct mce *m, struct pt_regs *pregs)
{
	struct pt_regs regs;
	unsigned long flags;

	if (!pregs) {
		memset(&regs, 0, sizeof(struct pt_regs));
		regs.ip = m->ip;
		regs.cs = m->cs;
		pregs = &regs;
	}
	/* in mcheck exeception handler, irq will be disabled */
	local_irq_save(flags);
	do_machine_check(pregs, 0);
	local_irq_restore(flags);
	m->finished = 0;
}

static cpumask_t mce_inject_cpumask;

static int mce_raise_notify(struct notifier_block *self,
			    unsigned long val, void *data)
{
	struct die_args *args = (struct die_args *)data;
	int cpu = smp_processor_id();
	struct mce *m = &__get_cpu_var(injectm);
	if (val != DIE_NMI_IPI || !cpu_isset(cpu, mce_inject_cpumask))
		return NOTIFY_DONE;
	cpu_clear(cpu, mce_inject_cpumask);
	if (m->inject_flags & MCJ_EXCEPTION)
		raise_exception(m, args->regs);
	else if (m->status)
		raise_poll(m);
	return NOTIFY_STOP;
}

static struct notifier_block mce_raise_nb = {
	.notifier_call = mce_raise_notify,
	.priority = 1000,
};

/* Inject mce on current CPU */
static int raise_local(struct mce *m)
{
	int context = MCJ_CTX(m->inject_flags);
	int ret = 0;
	int cpu = m->extcpu;

	if (m->inject_flags & MCJ_EXCEPTION) {
		printk(KERN_INFO "Triggering MCE exception on CPU %d\n", cpu);
		switch (context) {
		case MCJ_CTX_IRQ:
			/*
			 * Could do more to fake interrupts like
			 * calling irq_enter, but the necessary
			 * machinery isn't exported currently.
			 */
			/*FALL THROUGH*/
		case MCJ_CTX_PROCESS:
			raise_exception(m, NULL);
			break;
		default:
			printk(KERN_INFO "Invalid MCE context\n");
			ret = -EINVAL;
		}
		printk(KERN_INFO "MCE exception done on CPU %d\n", cpu);
	} else if (m->status) {
		printk(KERN_INFO "Starting machine check poll CPU %d\n", cpu);
		raise_poll(m);
		mce_notify_irq();
		printk(KERN_INFO "Machine check poll done on CPU %d\n", cpu);
	} else
		m->finished = 0;

	return ret;
}

static void raise_mce(struct mce *m)
{
	int context = MCJ_CTX(m->inject_flags);

	inject_mce(m);

	if (context == MCJ_CTX_RANDOM)
		return;

#ifdef CONFIG_X86_LOCAL_APIC
	if (m->inject_flags & MCJ_NMI_BROADCAST) {
		unsigned long start;
		int cpu;
		get_online_cpus();
		mce_inject_cpumask = cpu_online_map;
		cpu_clear(get_cpu(), mce_inject_cpumask);
		for_each_online_cpu(cpu) {
			struct mce *mcpu = &per_cpu(injectm, cpu);
			if (!mcpu->finished ||
			    MCJ_CTX(mcpu->inject_flags) != MCJ_CTX_RANDOM)
				cpu_clear(cpu, mce_inject_cpumask);
		}
		if (!cpus_empty(mce_inject_cpumask))
			apic->send_IPI_mask(&mce_inject_cpumask, NMI_VECTOR);
		start = jiffies;
		while (!cpus_empty(mce_inject_cpumask)) {
			if (!time_before(jiffies, start + 2*HZ)) {
				printk(KERN_ERR
				"Timeout waiting for mce inject NMI %lx\n",
					*cpus_addr(mce_inject_cpumask));
				break;
			}
			cpu_relax();
		}
		raise_local(m);
		put_cpu();
		put_online_cpus();
	} else
#endif
		raise_local(m);
}

/* Error injection interface */
static ssize_t mce_write(struct file *filp, const char __user *ubuf,
			 size_t usize, loff_t *off)
{
	struct mce m;

	if (!capable(CAP_SYS_ADMIN))
		return -EPERM;
	/*
	 * There are some cases where real MSR reads could slip
	 * through.
	 */
	if (!boot_cpu_has(X86_FEATURE_MCE) || !boot_cpu_has(X86_FEATURE_MCA))
		return -EIO;

	if ((unsigned long)usize > sizeof(struct mce))
		usize = sizeof(struct mce);
	if (copy_from_user(&m, ubuf, usize))
		return -EFAULT;

	if (m.extcpu >= num_possible_cpus() || !cpu_online(m.extcpu))
		return -EINVAL;

	/*
	 * Need to give user space some time to set everything up,
	 * so do it a jiffie or two later everywhere.
	 */
	schedule_timeout(2);
	raise_mce(&m);
	return usize;
}

static int inject_init(void)
{
	printk(KERN_INFO "Machine check injector initialized\n");
	mce_chrdev_ops.write = mce_write;
	register_die_notifier(&mce_raise_nb);
	return 0;
}

module_init(inject_init);
/*
 * Cannot tolerate unloading currently because we cannot
 * guarantee all openers of mce_chrdev will get a reference to us.
 */
MODULE_LICENSE("GPL");
Commit	Line	Data
ea149b36 AK	1	/*
	2	* Machine check injection support.
	3	* Copyright 2008 Intel Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; version 2
	8	* of the License.
	9	*
	10	* Authors:
	11	* Andi Kleen
	12	* Ying Huang
	13	*/
98a9c8c3	14	#include <linux/uaccess.h>
ea149b36 AK	15	#include <linux/module.h>
	16	#include <linux/timer.h>
	17	#include <linux/kernel.h>
	18	#include <linux/string.h>
	19	#include <linux/fs.h>
	20	#include <linux/smp.h>
5b7e88ed HY	21	#include <linux/notifier.h>
	22	#include <linux/kdebug.h>
	23	#include <linux/cpu.h>
	24	#include <linux/sched.h>
ea149b36	25	#include <asm/mce.h>
5b7e88ed	26	#include <asm/apic.h>
ea149b36 AK	27
	28	/* Update fake mce registers on current CPU. */
	29	static void inject_mce(struct mce *m)
	30	{
d620c67f	31	struct mce *i = &per_cpu(injectm, m->extcpu);
ea149b36 AK	32
	33	/* Make sure noone reads partially written injectm */
	34	i->finished = 0;
	35	mb();
	36	m->finished = 0;
	37	/* First set the fields after finished */
d620c67f	38	i->extcpu = m->extcpu;
ea149b36 AK	39	mb();
	40	/* Now write record in order, finished last (except above) */
	41	memcpy(i, m, sizeof(struct mce));
	42	/* Finally activate it */
	43	mb();
	44	i->finished = 1;
	45	}
	46
0dcc6685	47	static void raise_poll(struct mce *m)
5b7e88ed HY	48	{
	49	unsigned long flags;
	50	mce_banks_t b;
	51
	52	memset(&b, 0xff, sizeof(mce_banks_t));
	53	local_irq_save(flags);
	54	machine_check_poll(0, &b);
	55	local_irq_restore(flags);
	56	m->finished = 0;
	57	}
	58
0dcc6685	59	static void raise_exception(struct mce m, struct pt_regs pregs)
5b7e88ed HY	60	{
	61	struct pt_regs regs;
	62	unsigned long flags;
	63
	64	if (!pregs) {
	65	memset(&regs, 0, sizeof(struct pt_regs));
	66	regs.ip = m->ip;
	67	regs.cs = m->cs;
	68	pregs = &regs;
	69	}
	70	/* in mcheck exeception handler, irq will be disabled */
	71	local_irq_save(flags);
	72	do_machine_check(pregs, 0);
	73	local_irq_restore(flags);
	74	m->finished = 0;
	75	}
	76
	77	static cpumask_t mce_inject_cpumask;
	78
	79	static int mce_raise_notify(struct notifier_block *self,
	80	unsigned long val, void *data)
	81	{
	82	struct die_args args = (struct die_args )data;
	83	int cpu = smp_processor_id();
	84	struct mce *m = &__get_cpu_var(injectm);
	85	if (val != DIE_NMI_IPI \|\| !cpu_isset(cpu, mce_inject_cpumask))
	86	return NOTIFY_DONE;
	87	cpu_clear(cpu, mce_inject_cpumask);
0dcc6685 HY	88	if (m->inject_flags & MCJ_EXCEPTION)
0dcc6685 HY	89	raise_exception(m, args->regs);
5b7e88ed	90	else if (m->status)
0dcc6685	91	raise_poll(m);
5b7e88ed HY	92	return NOTIFY_STOP;
	93	}
	94
	95	static struct notifier_block mce_raise_nb = {
	96	.notifier_call = mce_raise_notify,
	97	.priority = 1000,
ea149b36 AK	98	};
	99
	100	/* Inject mce on current CPU */
5b7e88ed	101	static int raise_local(struct mce *m)
ea149b36	102	{
5b7e88ed HY	103	int context = MCJ_CTX(m->inject_flags);
5b7e88ed HY	104	int ret = 0;
d620c67f	105	int cpu = m->extcpu;
ea149b36	106
0dcc6685	107	if (m->inject_flags & MCJ_EXCEPTION) {
ea149b36	108	printk(KERN_INFO "Triggering MCE exception on CPU %d\n", cpu);
5b7e88ed HY	109	switch (context) {
	110	case MCJ_CTX_IRQ:
	111	/*
	112	* Could do more to fake interrupts like
	113	* calling irq_enter, but the necessary
	114	* machinery isn't exported currently.
	115	*/
	116	/FALL THROUGH/
	117	case MCJ_CTX_PROCESS:
0dcc6685	118	raise_exception(m, NULL);
5b7e88ed HY	119	break;
	120	default:
	121	printk(KERN_INFO "Invalid MCE context\n");
	122	ret = -EINVAL;
	123	}
ea149b36	124	printk(KERN_INFO "MCE exception done on CPU %d\n", cpu);
5b7e88ed	125	} else if (m->status) {
ea149b36	126	printk(KERN_INFO "Starting machine check poll CPU %d\n", cpu);
0dcc6685	127	raise_poll(m);
9ff36ee9	128	mce_notify_irq();
5b7e88ed HY	129	printk(KERN_INFO "Machine check poll done on CPU %d\n", cpu);
	130	} else
	131	m->finished = 0;
	132
	133	return ret;
	134	}
	135
	136	static void raise_mce(struct mce *m)
	137	{
	138	int context = MCJ_CTX(m->inject_flags);
	139
	140	inject_mce(m);
	141
	142	if (context == MCJ_CTX_RANDOM)
	143	return;
	144
	145	#ifdef CONFIG_X86_LOCAL_APIC
	146	if (m->inject_flags & MCJ_NMI_BROADCAST) {
	147	unsigned long start;
	148	int cpu;
	149	get_online_cpus();
	150	mce_inject_cpumask = cpu_online_map;
	151	cpu_clear(get_cpu(), mce_inject_cpumask);
	152	for_each_online_cpu(cpu) {
	153	struct mce *mcpu = &per_cpu(injectm, cpu);
	154	if (!mcpu->finished \|\|
	155	MCJ_CTX(mcpu->inject_flags) != MCJ_CTX_RANDOM)
	156	cpu_clear(cpu, mce_inject_cpumask);
	157	}
	158	if (!cpus_empty(mce_inject_cpumask))
	159	apic->send_IPI_mask(&mce_inject_cpumask, NMI_VECTOR);
	160	start = jiffies;
	161	while (!cpus_empty(mce_inject_cpumask)) {
	162	if (!time_before(jiffies, start + 2*HZ)) {
	163	printk(KERN_ERR
	164	"Timeout waiting for mce inject NMI %lx\n",
	165	*cpus_addr(mce_inject_cpumask));
	166	break;
	167	}
	168	cpu_relax();
	169	}
	170	raise_local(m);
	171	put_cpu();
	172	put_online_cpus();
	173	} else
	174	#endif
	175	raise_local(m);
ea149b36 AK	176	}
	177
	178	/* Error injection interface */
	179	static ssize_t mce_write(struct file filp, const char __user ubuf,
	180	size_t usize, loff_t *off)
	181	{
ea149b36 AK	182	struct mce m;
	183
	184	if (!capable(CAP_SYS_ADMIN))
	185	return -EPERM;
	186	/*
	187	* There are some cases where real MSR reads could slip
	188	* through.
	189	*/
	190	if (!boot_cpu_has(X86_FEATURE_MCE) \|\| !boot_cpu_has(X86_FEATURE_MCA))
	191	return -EIO;
	192
	193	if ((unsigned long)usize > sizeof(struct mce))
	194	usize = sizeof(struct mce);
	195	if (copy_from_user(&m, ubuf, usize))
	196	return -EFAULT;
	197
d620c67f	198	if (m.extcpu >= num_possible_cpus() \|\| !cpu_online(m.extcpu))
ea149b36 AK	199	return -EINVAL;
ea149b36 AK	200
ea149b36 AK	201	/*
	202	* Need to give user space some time to set everything up,
	203	* so do it a jiffie or two later everywhere.
ea149b36	204	*/
5b7e88ed HY	205	schedule_timeout(2);
5b7e88ed HY	206	raise_mce(&m);
ea149b36 AK	207	return usize;
	208	}
	209
	210	static int inject_init(void)
	211	{
	212	printk(KERN_INFO "Machine check injector initialized\n");
	213	mce_chrdev_ops.write = mce_write;
5b7e88ed	214	register_die_notifier(&mce_raise_nb);
ea149b36 AK	215	return 0;
	216	}
	217
	218	module_init(inject_init);
5706001a PA	219	/*
5706001a PA	220	* Cannot tolerate unloading currently because we cannot
ea149b36 AK	221	* guarantee all openers of mce_chrdev will get a reference to us.
	222	*/
	223	MODULE_LICENSE("GPL");