[deliverable/linux.git] / arch / x86 / kernel / cpu / mcheck / mce_amd_64.c

/*
 *  (c) 2005, 2006 Advanced Micro Devices, Inc.
 *  Your use of this code is subject to the terms and conditions of the
 *  GNU general public license version 2. See "COPYING" or
 *  http://www.gnu.org/licenses/gpl.html
 *
 *  Written by Jacob Shin - AMD, Inc.
 *
 *  Support : jacob.shin@amd.com
 *
 *  April 2006
 *     - added support for AMD Family 0x10 processors
 *
 *  All MC4_MISCi registers are shared between multi-cores
 */

#include <linux/cpu.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kobject.h>
#include <linux/notifier.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/sysdev.h>
#include <linux/sysfs.h>
#include <asm/apic.h>
#include <asm/mce.h>
#include <asm/msr.h>
#include <asm/percpu.h>
#include <asm/idle.h>

#define PFX               "mce_threshold: "
#define VERSION           "version 1.1.1"
#define NR_BANKS          6
#define NR_BLOCKS         9
#define THRESHOLD_MAX     0xFFF
#define INT_TYPE_APIC     0x00020000
#define MASK_VALID_HI     0x80000000
#define MASK_CNTP_HI      0x40000000
#define MASK_LOCKED_HI    0x20000000
#define MASK_LVTOFF_HI    0x00F00000
#define MASK_COUNT_EN_HI  0x00080000
#define MASK_INT_TYPE_HI  0x00060000
#define MASK_OVERFLOW_HI  0x00010000
#define MASK_ERR_COUNT_HI 0x00000FFF
#define MASK_BLKPTR_LO    0xFF000000
#define MCG_XBLK_ADDR     0xC0000400

struct threshold_block {
	unsigned int block;
	unsigned int bank;
	unsigned int cpu;
	u32 address;
	u16 interrupt_enable;
	u16 threshold_limit;
	struct kobject kobj;
	struct list_head miscj;
};

/* defaults used early on boot */
static struct threshold_block threshold_defaults = {
	.interrupt_enable = 0,
	.threshold_limit = THRESHOLD_MAX,
};

struct threshold_bank {
	struct kobject *kobj;
	struct threshold_block *blocks;
	cpumask_t cpus;
};
static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);

#ifdef CONFIG_SMP
static unsigned char shared_bank[NR_BANKS] = {
	0, 0, 0, 0, 1
};
#endif

static DEFINE_PER_CPU(unsigned char, bank_map);	/* see which banks are on */

/*
 * CPU Initialization
 */

struct thresh_restart {
	struct threshold_block *b;
	int reset;
	u16 old_limit;
};

/* must be called with correct cpu affinity */
static long threshold_restart_bank(void *_tr)
{
	struct thresh_restart *tr = _tr;
	u32 mci_misc_hi, mci_misc_lo;

	rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi);

	if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
		tr->reset = 1;	/* limit cannot be lower than err count */

	if (tr->reset) {		/* reset err count and overflow bit */
		mci_misc_hi =
		    (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
		    (THRESHOLD_MAX - tr->b->threshold_limit);
	} else if (tr->old_limit) {	/* change limit w/o reset */
		int new_count = (mci_misc_hi & THRESHOLD_MAX) +
		    (tr->old_limit - tr->b->threshold_limit);
		mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
		    (new_count & THRESHOLD_MAX);
	}

	tr->b->interrupt_enable ?
	    (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
	    (mci_misc_hi &= ~MASK_INT_TYPE_HI);

	mci_misc_hi |= MASK_COUNT_EN_HI;
	wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
	return 0;
}

/* cpu init entry point, called from mce.c with preempt off */
void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
{
	unsigned int bank, block;
	unsigned int cpu = smp_processor_id();
	u8 lvt_off;
	u32 low = 0, high = 0, address = 0;
	struct thresh_restart tr;

	for (bank = 0; bank < NR_BANKS; ++bank) {
		for (block = 0; block < NR_BLOCKS; ++block) {
			if (block == 0)
				address = MSR_IA32_MC0_MISC + bank * 4;
			else if (block == 1) {
				address = (low & MASK_BLKPTR_LO) >> 21;
				if (!address)
					break;
				address += MCG_XBLK_ADDR;
			}
			else
				++address;

			if (rdmsr_safe(address, &low, &high))
				break;

			if (!(high & MASK_VALID_HI)) {
				if (block)
					continue;
				else
					break;
			}

			if (!(high & MASK_CNTP_HI)  ||
			     (high & MASK_LOCKED_HI))
				continue;

			if (!block)
				per_cpu(bank_map, cpu) |= (1 << bank);
#ifdef CONFIG_SMP
			if (shared_bank[bank] && c->cpu_core_id)
				break;
#endif
			lvt_off = setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR,
						       APIC_EILVT_MSG_FIX, 0);

			high &= ~MASK_LVTOFF_HI;
			high |= lvt_off << 20;
			wrmsr(address, low, high);

			threshold_defaults.address = address;
			tr.b = &threshold_defaults;
			tr.reset = 0;
			tr.old_limit = 0;
			threshold_restart_bank(&tr);
		}
	}
}

/*
 * APIC Interrupt Handler
 */

/*
 * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
 * the interrupt goes off when error_count reaches threshold_limit.
 * the handler will simply log mcelog w/ software defined bank number.
 */
asmlinkage void mce_threshold_interrupt(void)
{
	unsigned int bank, block;
	struct mce m;
	u32 low = 0, high = 0, address = 0;

	ack_APIC_irq();
	exit_idle();
	irq_enter();

	mce_setup(&m);

	/* assume first bank caused it */
	for (bank = 0; bank < NR_BANKS; ++bank) {
		if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
			continue;
		for (block = 0; block < NR_BLOCKS; ++block) {
			if (block == 0)
				address = MSR_IA32_MC0_MISC + bank * 4;
			else if (block == 1) {
				address = (low & MASK_BLKPTR_LO) >> 21;
				if (!address)
					break;
				address += MCG_XBLK_ADDR;
			}
			else
				++address;

			if (rdmsr_safe(address, &low, &high))
				break;

			if (!(high & MASK_VALID_HI)) {
				if (block)
					continue;
				else
					break;
			}

			if (!(high & MASK_CNTP_HI)  ||
			     (high & MASK_LOCKED_HI))
				continue;

			/* Log the machine check that caused the threshold
			   event. */
			do_machine_check(NULL, 0);

			if (high & MASK_OVERFLOW_HI) {
				rdmsrl(address, m.misc);
				rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
				       m.status);
				m.bank = K8_MCE_THRESHOLD_BASE
				       + bank * NR_BLOCKS
				       + block;
				mce_log(&m);
				goto out;
			}
		}
	}
out:
	inc_irq_stat(irq_threshold_count);
	irq_exit();
}

/*
 * Sysfs Interface
 */

struct threshold_attr {
	struct attribute attr;
	ssize_t(*show) (struct threshold_block *, char *);
	ssize_t(*store) (struct threshold_block *, const char *, size_t count);
};

#define SHOW_FIELDS(name)                                           \
static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
{                                                                   \
        return sprintf(buf, "%lx\n", (unsigned long) b->name);      \
}
SHOW_FIELDS(interrupt_enable)
SHOW_FIELDS(threshold_limit)

static ssize_t store_interrupt_enable(struct threshold_block *b,
				      const char *buf, size_t count)
{
	char *end;
	struct thresh_restart tr;
	unsigned long new = simple_strtoul(buf, &end, 0);
	if (end == buf)
		return -EINVAL;
	b->interrupt_enable = !!new;

	tr.b = b;
	tr.reset = 0;
	tr.old_limit = 0;
	work_on_cpu(b->cpu, threshold_restart_bank, &tr);

	return end - buf;
}

static ssize_t store_threshold_limit(struct threshold_block *b,
				     const char *buf, size_t count)
{
	char *end;
	struct thresh_restart tr;
	unsigned long new = simple_strtoul(buf, &end, 0);
	if (end == buf)
		return -EINVAL;
	if (new > THRESHOLD_MAX)
		new = THRESHOLD_MAX;
	if (new < 1)
		new = 1;
	tr.old_limit = b->threshold_limit;
	b->threshold_limit = new;
	tr.b = b;
	tr.reset = 0;

	work_on_cpu(b->cpu, threshold_restart_bank, &tr);

	return end - buf;
}

static long local_error_count(void *_b)
{
	struct threshold_block *b = _b;
	u32 low, high;

	rdmsr(b->address, low, high);
	return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
}

static ssize_t show_error_count(struct threshold_block *b, char *buf)
{
	return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
}

static ssize_t store_error_count(struct threshold_block *b,
				 const char *buf, size_t count)
{
	struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };

	work_on_cpu(b->cpu, threshold_restart_bank, &tr);
	return 1;
}

#define THRESHOLD_ATTR(_name,_mode,_show,_store) {            \
        .attr = {.name = __stringify(_name), .mode = _mode }, \
        .show = _show,                                        \
        .store = _store,                                      \
};

#define RW_ATTR(name)                                           \
static struct threshold_attr name =                             \
        THRESHOLD_ATTR(name, 0644, show_## name, store_## name)

RW_ATTR(interrupt_enable);
RW_ATTR(threshold_limit);
RW_ATTR(error_count);

static struct attribute *default_attrs[] = {
	&interrupt_enable.attr,
	&threshold_limit.attr,
	&error_count.attr,
	NULL
};

#define to_block(k) container_of(k, struct threshold_block, kobj)
#define to_attr(a) container_of(a, struct threshold_attr, attr)

static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
{
	struct threshold_block *b = to_block(kobj);
	struct threshold_attr *a = to_attr(attr);
	ssize_t ret;
	ret = a->show ? a->show(b, buf) : -EIO;
	return ret;
}

static ssize_t store(struct kobject *kobj, struct attribute *attr,
		     const char *buf, size_t count)
{
	struct threshold_block *b = to_block(kobj);
	struct threshold_attr *a = to_attr(attr);
	ssize_t ret;
	ret = a->store ? a->store(b, buf, count) : -EIO;
	return ret;
}

static struct sysfs_ops threshold_ops = {
	.show = show,
	.store = store,
};

static struct kobj_type threshold_ktype = {
	.sysfs_ops = &threshold_ops,
	.default_attrs = default_attrs,
};

static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
					       unsigned int bank,
					       unsigned int block,
					       u32 address)
{
	int err;
	u32 low, high;
	struct threshold_block *b = NULL;

	if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
		return 0;

	if (rdmsr_safe(address, &low, &high))
		return 0;

	if (!(high & MASK_VALID_HI)) {
		if (block)
			goto recurse;
		else
			return 0;
	}

	if (!(high & MASK_CNTP_HI)  ||
	     (high & MASK_LOCKED_HI))
		goto recurse;

	b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
	if (!b)
		return -ENOMEM;

	b->block = block;
	b->bank = bank;
	b->cpu = cpu;
	b->address = address;
	b->interrupt_enable = 0;
	b->threshold_limit = THRESHOLD_MAX;

	INIT_LIST_HEAD(&b->miscj);

	if (per_cpu(threshold_banks, cpu)[bank]->blocks)
		list_add(&b->miscj,
			 &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
	else
		per_cpu(threshold_banks, cpu)[bank]->blocks = b;

	err = kobject_init_and_add(&b->kobj, &threshold_ktype,
				   per_cpu(threshold_banks, cpu)[bank]->kobj,
				   "misc%i", block);
	if (err)
		goto out_free;
recurse:
	if (!block) {
		address = (low & MASK_BLKPTR_LO) >> 21;
		if (!address)
			return 0;
		address += MCG_XBLK_ADDR;
	} else
		++address;

	err = allocate_threshold_blocks(cpu, bank, ++block, address);
	if (err)
		goto out_free;

	if (b)
		kobject_uevent(&b->kobj, KOBJ_ADD);

	return err;

out_free:
	if (b) {
		kobject_put(&b->kobj);
		kfree(b);
	}
	return err;
}

static __cpuinit long local_allocate_threshold_blocks(void *_bank)
{
	unsigned int *bank = _bank;

	return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
					 MSR_IA32_MC0_MISC + *bank * 4);
}

/* symlinks sibling shared banks to first core.  first core owns dir/files. */
static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
{
	int i, err = 0;
	struct threshold_bank *b = NULL;
	char name[32];

	sprintf(name, "threshold_bank%i", bank);

#ifdef CONFIG_SMP
	if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) {	/* symlink */
		i = first_cpu(per_cpu(cpu_core_map, cpu));

		/* first core not up yet */
		if (cpu_data(i).cpu_core_id)
			goto out;

		/* already linked */
		if (per_cpu(threshold_banks, cpu)[bank])
			goto out;

		b = per_cpu(threshold_banks, i)[bank];

		if (!b)
			goto out;

		err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
					b->kobj, name);
		if (err)
			goto out;

		b->cpus = per_cpu(cpu_core_map, cpu);
		per_cpu(threshold_banks, cpu)[bank] = b;
		goto out;
	}
#endif

	b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
	if (!b) {
		err = -ENOMEM;
		goto out;
	}

	b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
	if (!b->kobj)
		goto out_free;

#ifndef CONFIG_SMP
	b->cpus = CPU_MASK_ALL;
#else
	b->cpus = per_cpu(cpu_core_map, cpu);
#endif

	per_cpu(threshold_banks, cpu)[bank] = b;

	err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
	if (err)
		goto out_free;

	for_each_cpu_mask_nr(i, b->cpus) {
		if (i == cpu)
			continue;

		err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
					b->kobj, name);
		if (err)
			goto out;

		per_cpu(threshold_banks, i)[bank] = b;
	}

	goto out;

out_free:
	per_cpu(threshold_banks, cpu)[bank] = NULL;
	kfree(b);
out:
	return err;
}

/* create dir/files for all valid threshold banks */
static __cpuinit int threshold_create_device(unsigned int cpu)
{
	unsigned int bank;
	int err = 0;

	for (bank = 0; bank < NR_BANKS; ++bank) {
		if (!(per_cpu(bank_map, cpu) & (1 << bank)))
			continue;
		err = threshold_create_bank(cpu, bank);
		if (err)
			goto out;
	}
out:
	return err;
}

/*
 * let's be hotplug friendly.
 * in case of multiple core processors, the first core always takes ownership
 *   of shared sysfs dir/files, and rest of the cores will be symlinked to it.
 */

static void deallocate_threshold_block(unsigned int cpu,
						 unsigned int bank)
{
	struct threshold_block *pos = NULL;
	struct threshold_block *tmp = NULL;
	struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];

	if (!head)
		return;

	list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
		kobject_put(&pos->kobj);
		list_del(&pos->miscj);
		kfree(pos);
	}

	kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
	per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
}

static void threshold_remove_bank(unsigned int cpu, int bank)
{
	int i = 0;
	struct threshold_bank *b;
	char name[32];

	b = per_cpu(threshold_banks, cpu)[bank];

	if (!b)
		return;

	if (!b->blocks)
		goto free_out;

	sprintf(name, "threshold_bank%i", bank);

#ifdef CONFIG_SMP
	/* sibling symlink */
	if (shared_bank[bank] && b->blocks->cpu != cpu) {
		sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
		per_cpu(threshold_banks, cpu)[bank] = NULL;
		return;
	}
#endif

	/* remove all sibling symlinks before unregistering */
	for_each_cpu_mask_nr(i, b->cpus) {
		if (i == cpu)
			continue;

		sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
		per_cpu(threshold_banks, i)[bank] = NULL;
	}

	deallocate_threshold_block(cpu, bank);

free_out:
	kobject_del(b->kobj);
	kobject_put(b->kobj);
	kfree(b);
	per_cpu(threshold_banks, cpu)[bank] = NULL;
}

static void threshold_remove_device(unsigned int cpu)
{
	unsigned int bank;

	for (bank = 0; bank < NR_BANKS; ++bank) {
		if (!(per_cpu(bank_map, cpu) & (1 << bank)))
			continue;
		threshold_remove_bank(cpu, bank);
	}
}

/* get notified when a cpu comes on/off */
static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
						     unsigned int cpu)
{
	if (cpu >= NR_CPUS)
		return;

	switch (action) {
	case CPU_ONLINE:
	case CPU_ONLINE_FROZEN:
		threshold_create_device(cpu);
		break;
	case CPU_DEAD:
	case CPU_DEAD_FROZEN:
		threshold_remove_device(cpu);
		break;
	default:
		break;
	}
}

static __init int threshold_init_device(void)
{
	unsigned lcpu = 0;

	/* to hit CPUs online before the notifier is up */
	for_each_online_cpu(lcpu) {
		int err = threshold_create_device(lcpu);
		if (err)
			return err;
	}
	threshold_cpu_callback = amd_64_threshold_cpu_callback;
	return 0;
}

device_initcall(threshold_init_device);
Commit	Line	Data
89b831ef	1	/*
95268664	2	* (c) 2005, 2006 Advanced Micro Devices, Inc.
89b831ef JS	3	* Your use of this code is subject to the terms and conditions of the
	4	* GNU general public license version 2. See "COPYING" or
	5	* http://www.gnu.org/licenses/gpl.html
	6	*
	7	* Written by Jacob Shin - AMD, Inc.
	8	*
	9	* Support : jacob.shin@amd.com
	10	*
95268664 JS	11	* April 2006
95268664 JS	12	* - added support for AMD Family 0x10 processors
89b831ef	13	*
95268664	14	* All MC4_MISCi registers are shared between multi-cores
89b831ef JS	15	*/
	16
	17	#include <linux/cpu.h>
	18	#include <linux/errno.h>
	19	#include <linux/init.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/kobject.h>
	22	#include <linux/notifier.h>
	23	#include <linux/sched.h>
	24	#include <linux/smp.h>
	25	#include <linux/sysdev.h>
	26	#include <linux/sysfs.h>
	27	#include <asm/apic.h>
	28	#include <asm/mce.h>
	29	#include <asm/msr.h>
	30	#include <asm/percpu.h>
95833c83	31	#include <asm/idle.h>
89b831ef	32
2903ee85 JS	33	#define PFX "mce_threshold: "
	34	#define VERSION "version 1.1.1"
	35	#define NR_BANKS 6
	36	#define NR_BLOCKS 9
	37	#define THRESHOLD_MAX 0xFFF
	38	#define INT_TYPE_APIC 0x00020000
	39	#define MASK_VALID_HI 0x80000000
24ce0e96 JB	40	#define MASK_CNTP_HI 0x40000000
24ce0e96 JB	41	#define MASK_LOCKED_HI 0x20000000
2903ee85 JS	42	#define MASK_LVTOFF_HI 0x00F00000
	43	#define MASK_COUNT_EN_HI 0x00080000
	44	#define MASK_INT_TYPE_HI 0x00060000
	45	#define MASK_OVERFLOW_HI 0x00010000
89b831ef	46	#define MASK_ERR_COUNT_HI 0x00000FFF
95268664 JS	47	#define MASK_BLKPTR_LO 0xFF000000
95268664 JS	48	#define MCG_XBLK_ADDR 0xC0000400
89b831ef	49
95268664 JS	50	struct threshold_block {
	51	unsigned int block;
	52	unsigned int bank;
89b831ef	53	unsigned int cpu;
95268664 JS	54	u32 address;
95268664 JS	55	u16 interrupt_enable;
89b831ef JS	56	u16 threshold_limit;
89b831ef JS	57	struct kobject kobj;
95268664	58	struct list_head miscj;
89b831ef JS	59	};
89b831ef JS	60
95268664 JS	61	/* defaults used early on boot */
95268664 JS	62	static struct threshold_block threshold_defaults = {
89b831ef JS	63	.interrupt_enable = 0,
	64	.threshold_limit = THRESHOLD_MAX,
	65	};
	66
95268664	67	struct threshold_bank {
a521cf20	68	struct kobject *kobj;
95268664 JS	69	struct threshold_block *blocks;
	70	cpumask_t cpus;
	71	};
	72	static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
	73
89b831ef JS	74	#ifdef CONFIG_SMP
	75	static unsigned char shared_bank[NR_BANKS] = {
	76	0, 0, 0, 0, 1
	77	};
	78	#endif
	79
	80	static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
	81
	82	/*
	83	* CPU Initialization
	84	*/
	85
4cd4601d MT	86	struct thresh_restart {
	87	struct threshold_block *b;
	88	int reset;
	89	u16 old_limit;
	90	};
	91
89b831ef	92	/* must be called with correct cpu affinity */
4cd4601d	93	static long threshold_restart_bank(void *_tr)
89b831ef	94	{
4cd4601d	95	struct thresh_restart *tr = _tr;
89b831ef JS	96	u32 mci_misc_hi, mci_misc_lo;
89b831ef JS	97
4cd4601d	98	rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
89b831ef	99
4cd4601d MT	100	if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
4cd4601d MT	101	tr->reset = 1; /* limit cannot be lower than err count */
89b831ef	102
4cd4601d	103	if (tr->reset) { /* reset err count and overflow bit */
89b831ef JS	104	mci_misc_hi =
89b831ef JS	105	(mci_misc_hi & ~(MASK_ERR_COUNT_HI \| MASK_OVERFLOW_HI)) \|
4cd4601d MT	106	(THRESHOLD_MAX - tr->b->threshold_limit);
4cd4601d MT	107	} else if (tr->old_limit) { /* change limit w/o reset */
89b831ef	108	int new_count = (mci_misc_hi & THRESHOLD_MAX) +
4cd4601d	109	(tr->old_limit - tr->b->threshold_limit);
89b831ef JS	110	mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) \|
	111	(new_count & THRESHOLD_MAX);
	112	}
	113
4cd4601d	114	tr->b->interrupt_enable ?
89b831ef JS	115	(mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) \| INT_TYPE_APIC) :
	116	(mci_misc_hi &= ~MASK_INT_TYPE_HI);
	117
	118	mci_misc_hi \|= MASK_COUNT_EN_HI;
4cd4601d MT	119	wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
4cd4601d MT	120	return 0;
89b831ef JS	121	}
89b831ef JS	122
95268664	123	/* cpu init entry point, called from mce.c with preempt off */
89b831ef JS	124	void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
89b831ef JS	125	{
95268664	126	unsigned int bank, block;
89b831ef	127	unsigned int cpu = smp_processor_id();
7b83dae7	128	u8 lvt_off;
95268664	129	u32 low = 0, high = 0, address = 0;
4cd4601d	130	struct thresh_restart tr;
89b831ef JS	131
89b831ef JS	132	for (bank = 0; bank < NR_BANKS; ++bank) {
95268664 JS	133	for (block = 0; block < NR_BLOCKS; ++block) {
	134	if (block == 0)
	135	address = MSR_IA32_MC0_MISC + bank * 4;
24ce0e96 JB	136	else if (block == 1) {
	137	address = (low & MASK_BLKPTR_LO) >> 21;
	138	if (!address)
	139	break;
	140	address += MCG_XBLK_ADDR;
	141	}
95268664 JS	142	else
	143	++address;
	144
	145	if (rdmsr_safe(address, &low, &high))
24ce0e96	146	break;
95268664 JS	147
	148	if (!(high & MASK_VALID_HI)) {
	149	if (block)
	150	continue;
	151	else
	152	break;
	153	}
	154
24ce0e96 JB	155	if (!(high & MASK_CNTP_HI) \|\|
24ce0e96 JB	156	(high & MASK_LOCKED_HI))
95268664 JS	157	continue;
	158
	159	if (!block)
	160	per_cpu(bank_map, cpu) \|= (1 << bank);
89b831ef	161	#ifdef CONFIG_SMP
95268664 JS	162	if (shared_bank[bank] && c->cpu_core_id)
95268664 JS	163	break;
89b831ef	164	#endif
7b83dae7 RR	165	lvt_off = setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR,
	166	APIC_EILVT_MSG_FIX, 0);
	167
95268664	168	high &= ~MASK_LVTOFF_HI;
7b83dae7	169	high \|= lvt_off << 20;
95268664 JS	170	wrmsr(address, low, high);
95268664 JS	171
95268664	172	threshold_defaults.address = address;
4cd4601d MT	173	tr.b = &threshold_defaults;
	174	tr.reset = 0;
	175	tr.old_limit = 0;
	176	threshold_restart_bank(&tr);
95268664	177	}
89b831ef JS	178	}
	179	}
	180
	181	/*
	182	* APIC Interrupt Handler
	183	*/
	184
	185	/*
	186	* threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
	187	* the interrupt goes off when error_count reaches threshold_limit.
	188	* the handler will simply log mcelog w/ software defined bank number.
	189	*/
	190	asmlinkage void mce_threshold_interrupt(void)
	191	{
95268664	192	unsigned int bank, block;
89b831ef	193	struct mce m;
95268664	194	u32 low = 0, high = 0, address = 0;
89b831ef JS	195
89b831ef JS	196	ack_APIC_irq();
95833c83	197	exit_idle();
89b831ef JS	198	irq_enter();
89b831ef JS	199
b5f2fa4e	200	mce_setup(&m);
89b831ef JS	201
	202	/* assume first bank caused it */
	203	for (bank = 0; bank < NR_BANKS; ++bank) {
24ce0e96 JB	204	if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
24ce0e96 JB	205	continue;
95268664 JS	206	for (block = 0; block < NR_BLOCKS; ++block) {
	207	if (block == 0)
	208	address = MSR_IA32_MC0_MISC + bank * 4;
24ce0e96 JB	209	else if (block == 1) {
	210	address = (low & MASK_BLKPTR_LO) >> 21;
	211	if (!address)
	212	break;
	213	address += MCG_XBLK_ADDR;
	214	}
95268664 JS	215	else
	216	++address;
	217
	218	if (rdmsr_safe(address, &low, &high))
24ce0e96	219	break;
95268664 JS	220
	221	if (!(high & MASK_VALID_HI)) {
	222	if (block)
	223	continue;
	224	else
	225	break;
	226	}
	227
24ce0e96 JB	228	if (!(high & MASK_CNTP_HI) \|\|
24ce0e96 JB	229	(high & MASK_LOCKED_HI))
95268664 JS	230	continue;
95268664 JS	231
a98f0dd3 AK	232	/* Log the machine check that caused the threshold
	233	event. */
	234	do_machine_check(NULL, 0);
	235
95268664 JS	236	if (high & MASK_OVERFLOW_HI) {
	237	rdmsrl(address, m.misc);
	238	rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
	239	m.status);
	240	m.bank = K8_MCE_THRESHOLD_BASE
	241	+ bank * NR_BLOCKS
	242	+ block;
	243	mce_log(&m);
	244	goto out;
	245	}
89b831ef JS	246	}
89b831ef JS	247	}
2903ee85	248	out:
8ae93669	249	inc_irq_stat(irq_threshold_count);
89b831ef JS	250	irq_exit();
	251	}
	252
	253	/*
	254	* Sysfs Interface
	255	*/
	256
89b831ef	257	struct threshold_attr {
2903ee85	258	struct attribute attr;
95268664 JS	259	ssize_t(show) (struct threshold_block , char *);
95268664 JS	260	ssize_t(store) (struct threshold_block , const char *, size_t count);
89b831ef JS	261	};
89b831ef JS	262
2903ee85 JS	263	#define SHOW_FIELDS(name) \
	264	static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
	265	{ \
	266	return sprintf(buf, "%lx\n", (unsigned long) b->name); \
	267	}
89b831ef JS	268	SHOW_FIELDS(interrupt_enable)
	269	SHOW_FIELDS(threshold_limit)
	270
95268664	271	static ssize_t store_interrupt_enable(struct threshold_block *b,
89b831ef JS	272	const char *buf, size_t count)
	273	{
	274	char *end;
4cd4601d	275	struct thresh_restart tr;
89b831ef JS	276	unsigned long new = simple_strtoul(buf, &end, 0);
	277	if (end == buf)
	278	return -EINVAL;
	279	b->interrupt_enable = !!new;
	280
4cd4601d MT	281	tr.b = b;
	282	tr.reset = 0;
	283	tr.old_limit = 0;
	284	work_on_cpu(b->cpu, threshold_restart_bank, &tr);
89b831ef JS	285
	286	return end - buf;
	287	}
	288
95268664	289	static ssize_t store_threshold_limit(struct threshold_block *b,
89b831ef JS	290	const char *buf, size_t count)
	291	{
	292	char *end;
4cd4601d	293	struct thresh_restart tr;
89b831ef JS	294	unsigned long new = simple_strtoul(buf, &end, 0);
	295	if (end == buf)
	296	return -EINVAL;
	297	if (new > THRESHOLD_MAX)
	298	new = THRESHOLD_MAX;
	299	if (new < 1)
	300	new = 1;
4cd4601d	301	tr.old_limit = b->threshold_limit;
89b831ef	302	b->threshold_limit = new;
4cd4601d MT	303	tr.b = b;
4cd4601d MT	304	tr.reset = 0;
89b831ef	305
4cd4601d	306	work_on_cpu(b->cpu, threshold_restart_bank, &tr);
89b831ef JS	307
	308	return end - buf;
	309	}
	310
4cd4601d	311	static long local_error_count(void *_b)
89b831ef	312	{
4cd4601d MT	313	struct threshold_block *b = _b;
	314	u32 low, high;
	315
95268664	316	rdmsr(b->address, low, high);
4cd4601d MT	317	return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
	318	}
	319
	320	static ssize_t show_error_count(struct threshold_block b, char buf)
	321	{
	322	return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
89b831ef JS	323	}
89b831ef JS	324
95268664	325	static ssize_t store_error_count(struct threshold_block *b,
89b831ef JS	326	const char *buf, size_t count)
89b831ef JS	327	{
4cd4601d MT	328	struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
	329
	330	work_on_cpu(b->cpu, threshold_restart_bank, &tr);
89b831ef JS	331	return 1;
	332	}
	333
	334	#define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
	335	.attr = {.name = __stringify(_name), .mode = _mode }, \
	336	.show = _show, \
	337	.store = _store, \
	338	};
	339
2903ee85 JS	340	#define RW_ATTR(name) \
2903ee85 JS	341	static struct threshold_attr name = \
89b831ef JS	342	THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
89b831ef JS	343
2903ee85 JS	344	RW_ATTR(interrupt_enable);
	345	RW_ATTR(threshold_limit);
	346	RW_ATTR(error_count);
89b831ef JS	347
	348	static struct attribute *default_attrs[] = {
	349	&interrupt_enable.attr,
	350	&threshold_limit.attr,
	351	&error_count.attr,
	352	NULL
	353	};
	354
95268664	355	#define to_block(k) container_of(k, struct threshold_block, kobj)
2903ee85	356	#define to_attr(a) container_of(a, struct threshold_attr, attr)
89b831ef JS	357
	358	static ssize_t show(struct kobject kobj, struct attribute attr, char *buf)
	359	{
95268664	360	struct threshold_block *b = to_block(kobj);
89b831ef JS	361	struct threshold_attr *a = to_attr(attr);
	362	ssize_t ret;
	363	ret = a->show ? a->show(b, buf) : -EIO;
	364	return ret;
	365	}
	366
	367	static ssize_t store(struct kobject kobj, struct attribute attr,
	368	const char *buf, size_t count)
	369	{
95268664	370	struct threshold_block *b = to_block(kobj);
89b831ef JS	371	struct threshold_attr *a = to_attr(attr);
	372	ssize_t ret;
	373	ret = a->store ? a->store(b, buf, count) : -EIO;
	374	return ret;
	375	}
	376
	377	static struct sysfs_ops threshold_ops = {
	378	.show = show,
	379	.store = store,
	380	};
	381
	382	static struct kobj_type threshold_ktype = {
	383	.sysfs_ops = &threshold_ops,
	384	.default_attrs = default_attrs,
	385	};
	386
95268664 JS	387	static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
	388	unsigned int bank,
	389	unsigned int block,
	390	u32 address)
	391	{
	392	int err;
	393	u32 low, high;
	394	struct threshold_block *b = NULL;
	395
	396	if ((bank >= NR_BANKS) \|\| (block >= NR_BLOCKS))
	397	return 0;
	398
	399	if (rdmsr_safe(address, &low, &high))
24ce0e96	400	return 0;
95268664 JS	401
	402	if (!(high & MASK_VALID_HI)) {
	403	if (block)
	404	goto recurse;
	405	else
	406	return 0;
	407	}
	408
24ce0e96 JB	409	if (!(high & MASK_CNTP_HI) \|\|
24ce0e96 JB	410	(high & MASK_LOCKED_HI))
95268664 JS	411	goto recurse;
	412
	413	b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
	414	if (!b)
	415	return -ENOMEM;
95268664 JS	416
	417	b->block = block;
	418	b->bank = bank;
	419	b->cpu = cpu;
	420	b->address = address;
	421	b->interrupt_enable = 0;
	422	b->threshold_limit = THRESHOLD_MAX;
	423
	424	INIT_LIST_HEAD(&b->miscj);
	425
	426	if (per_cpu(threshold_banks, cpu)[bank]->blocks)
	427	list_add(&b->miscj,
	428	&per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
	429	else
	430	per_cpu(threshold_banks, cpu)[bank]->blocks = b;
	431
542eb75a GKH	432	err = kobject_init_and_add(&b->kobj, &threshold_ktype,
	433	per_cpu(threshold_banks, cpu)[bank]->kobj,
	434	"misc%i", block);
95268664 JS	435	if (err)
	436	goto out_free;
	437	recurse:
	438	if (!block) {
	439	address = (low & MASK_BLKPTR_LO) >> 21;
	440	if (!address)
	441	return 0;
	442	address += MCG_XBLK_ADDR;
	443	} else
	444	++address;
	445
	446	err = allocate_threshold_blocks(cpu, bank, ++block, address);
	447	if (err)
	448	goto out_free;
	449
213eca7f GK	450	if (b)
213eca7f GK	451	kobject_uevent(&b->kobj, KOBJ_ADD);
542eb75a	452
95268664 JS	453	return err;
	454
	455	out_free:
	456	if (b) {
38a382ae	457	kobject_put(&b->kobj);
95268664 JS	458	kfree(b);
	459	}
	460	return err;
	461	}
	462
51d7a139	463	static __cpuinit long local_allocate_threshold_blocks(void *_bank)
4cd4601d MT	464	{
	465	unsigned int *bank = _bank;
	466
	467	return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
	468	MSR_IA32_MC0_MISC + bank 4);
	469	}
	470
89b831ef	471	/* symlinks sibling shared banks to first core. first core owns dir/files. */
95268664	472	static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
89b831ef	473	{
95268664	474	int i, err = 0;
68209407	475	struct threshold_bank *b = NULL;
95268664 JS	476	char name[32];
	477
	478	sprintf(name, "threshold_bank%i", bank);
89b831ef JS	479
89b831ef JS	480	#ifdef CONFIG_SMP
92cb7612	481	if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
08357611	482	i = first_cpu(per_cpu(cpu_core_map, cpu));
95268664 JS	483
95268664 JS	484	/* first core not up yet */
92cb7612	485	if (cpu_data(i).cpu_core_id)
95268664 JS	486	goto out;
	487
	488	/* already linked */
	489	if (per_cpu(threshold_banks, cpu)[bank])
	490	goto out;
	491
	492	b = per_cpu(threshold_banks, i)[bank];
89b831ef	493
89b831ef JS	494	if (!b)
89b831ef JS	495	goto out;
95268664	496
fff2e89f	497	err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
a521cf20	498	b->kobj, name);
89b831ef JS	499	if (err)
89b831ef JS	500	goto out;
95268664	501
08357611	502	b->cpus = per_cpu(cpu_core_map, cpu);
89b831ef JS	503	per_cpu(threshold_banks, cpu)[bank] = b;
	504	goto out;
	505	}
	506	#endif
	507
95268664	508	b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
89b831ef JS	509	if (!b) {
	510	err = -ENOMEM;
	511	goto out;
	512	}
89b831ef	513
a521cf20 GKH	514	b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
	515	if (!b->kobj)
	516	goto out_free;
	517
95268664 JS	518	#ifndef CONFIG_SMP
	519	b->cpus = CPU_MASK_ALL;
	520	#else
08357611	521	b->cpus = per_cpu(cpu_core_map, cpu);
95268664	522	#endif
95268664	523
89b831ef	524	per_cpu(threshold_banks, cpu)[bank] = b;
95268664	525
4cd4601d	526	err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
95268664 JS	527	if (err)
	528	goto out_free;
	529
334ef7a7	530	for_each_cpu_mask_nr(i, b->cpus) {
95268664 JS	531	if (i == cpu)
	532	continue;
	533
	534	err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
a521cf20	535	b->kobj, name);
95268664 JS	536	if (err)
	537	goto out;
	538
	539	per_cpu(threshold_banks, i)[bank] = b;
	540	}
	541
	542	goto out;
	543
	544	out_free:
	545	per_cpu(threshold_banks, cpu)[bank] = NULL;
	546	kfree(b);
2903ee85	547	out:
89b831ef JS	548	return err;
	549	}
	550
	551	/* create dir/files for all valid threshold banks */
	552	static __cpuinit int threshold_create_device(unsigned int cpu)
	553	{
2903ee85	554	unsigned int bank;
89b831ef JS	555	int err = 0;
89b831ef JS	556
89b831ef	557	for (bank = 0; bank < NR_BANKS; ++bank) {
5a96f4a5	558	if (!(per_cpu(bank_map, cpu) & (1 << bank)))
89b831ef JS	559	continue;
	560	err = threshold_create_bank(cpu, bank);
	561	if (err)
	562	goto out;
	563	}
2903ee85	564	out:
89b831ef JS	565	return err;
	566	}
	567
89b831ef JS	568	/*
	569	* let's be hotplug friendly.
	570	* in case of multiple core processors, the first core always takes ownership
	571	* of shared sysfs dir/files, and rest of the cores will be symlinked to it.
	572	*/
	573
be6b5a35	574	static void deallocate_threshold_block(unsigned int cpu,
95268664 JS	575	unsigned int bank)
	576	{
	577	struct threshold_block *pos = NULL;
	578	struct threshold_block *tmp = NULL;
	579	struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
	580
	581	if (!head)
	582	return;
	583
	584	list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
38a382ae	585	kobject_put(&pos->kobj);
95268664 JS	586	list_del(&pos->miscj);
	587	kfree(pos);
	588	}
	589
	590	kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
	591	per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
	592	}
	593
be6b5a35	594	static void threshold_remove_bank(unsigned int cpu, int bank)
89b831ef	595	{
95268664	596	int i = 0;
89b831ef	597	struct threshold_bank *b;
95268664	598	char name[32];
89b831ef JS	599
89b831ef JS	600	b = per_cpu(threshold_banks, cpu)[bank];
95268664	601
89b831ef JS	602	if (!b)
89b831ef JS	603	return;
95268664 JS	604
	605	if (!b->blocks)
	606	goto free_out;
	607
	608	sprintf(name, "threshold_bank%i", bank);
	609
02316067	610	#ifdef CONFIG_SMP
95268664 JS	611	/* sibling symlink */
95268664 JS	612	if (shared_bank[bank] && b->blocks->cpu != cpu) {
fff2e89f	613	sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
0d2caebd	614	per_cpu(threshold_banks, cpu)[bank] = NULL;
95268664	615	return;
89b831ef	616	}
02316067	617	#endif
95268664 JS	618
95268664 JS	619	/* remove all sibling symlinks before unregistering */
334ef7a7	620	for_each_cpu_mask_nr(i, b->cpus) {
95268664 JS	621	if (i == cpu)
	622	continue;
	623
	624	sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
	625	per_cpu(threshold_banks, i)[bank] = NULL;
	626	}
	627
	628	deallocate_threshold_block(cpu, bank);
	629
	630	free_out:
8735728e	631	kobject_del(b->kobj);
38a382ae	632	kobject_put(b->kobj);
95268664 JS	633	kfree(b);
95268664 JS	634	per_cpu(threshold_banks, cpu)[bank] = NULL;
89b831ef JS	635	}
89b831ef JS	636
be6b5a35	637	static void threshold_remove_device(unsigned int cpu)
89b831ef	638	{
2903ee85	639	unsigned int bank;
89b831ef JS	640
89b831ef JS	641	for (bank = 0; bank < NR_BANKS; ++bank) {
5a96f4a5	642	if (!(per_cpu(bank_map, cpu) & (1 << bank)))
89b831ef JS	643	continue;
	644	threshold_remove_bank(cpu, bank);
	645	}
89b831ef JS	646	}
89b831ef JS	647
89b831ef	648	/* get notified when a cpu comes on/off */
8735728e RW	649	static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
8735728e RW	650	unsigned int cpu)
89b831ef	651	{
89b831ef	652	if (cpu >= NR_CPUS)
8735728e	653	return;
89b831ef JS	654
	655	switch (action) {
	656	case CPU_ONLINE:
8bb78442	657	case CPU_ONLINE_FROZEN:
89b831ef	658	threshold_create_device(cpu);
89b831ef JS	659	break;
89b831ef JS	660	case CPU_DEAD:
8bb78442	661	case CPU_DEAD_FROZEN:
89b831ef JS	662	threshold_remove_device(cpu);
	663	break;
	664	default:
	665	break;
	666	}
89b831ef JS	667	}
89b831ef JS	668
89b831ef JS	669	static __init int threshold_init_device(void)
89b831ef JS	670	{
2903ee85	671	unsigned lcpu = 0;
89b831ef	672
89b831ef JS	673	/* to hit CPUs online before the notifier is up */
89b831ef JS	674	for_each_online_cpu(lcpu) {
fff2e89f	675	int err = threshold_create_device(lcpu);
89b831ef	676	if (err)
fff2e89f	677	return err;
89b831ef	678	}
8735728e	679	threshold_cpu_callback = amd_64_threshold_cpu_callback;
fff2e89f	680	return 0;
89b831ef JS	681	}
	682
	683	device_initcall(threshold_init_device);