[deliverable/linux.git] / arch / x86 / kernel / cpu / mcheck / therm_throt.c

/*
 * Thermal throttle event support code (such as syslog messaging and rate
 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
 *
 * This allows consistent reporting of CPU thermal throttle events.
 *
 * Maintains a counter in /sys that keeps track of the number of thermal
 * events, such that the user knows how bad the thermal problem might be
 * (since the logging to syslog and mcelog is rate limited).
 *
 * Author: Dmitriy Zavin (dmitriyz@google.com)
 *
 * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
 *          Inspired by Ross Biro's and Al Borchers' counter code.
 */
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/percpu.h>
#include <linux/sysdev.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/cpu.h>

#include <asm/processor.h>
#include <asm/system.h>
#include <asm/apic.h>
#include <asm/idle.h>
#include <asm/mce.h>
#include <asm/msr.h>

/* How long to wait between reporting thermal events */
#define CHECK_INTERVAL		(300 * HZ)

static DEFINE_PER_CPU(__u64, next_check) = INITIAL_JIFFIES;
static DEFINE_PER_CPU(unsigned long, thermal_throttle_count);
static DEFINE_PER_CPU(bool, thermal_throttle_active);

static atomic_t therm_throt_en		= ATOMIC_INIT(0);

#ifdef CONFIG_SYSFS
#define define_therm_throt_sysdev_one_ro(_name)				\
	static SYSDEV_ATTR(_name, 0444, therm_throt_sysdev_show_##_name, NULL)

#define define_therm_throt_sysdev_show_func(name)			\
static ssize_t therm_throt_sysdev_show_##name(struct sys_device *dev,	\
					struct sysdev_attribute *attr,	\
					      char *buf)		\
{									\
	unsigned int cpu = dev->id;					\
	ssize_t ret;							\
									\
	preempt_disable();	/* CPU hotplug */			\
	if (cpu_online(cpu))						\
		ret = sprintf(buf, "%lu\n",				\
			      per_cpu(thermal_throttle_##name, cpu));	\
	else								\
		ret = 0;						\
	preempt_enable();						\
									\
	return ret;							\
}

define_therm_throt_sysdev_show_func(count);
define_therm_throt_sysdev_one_ro(count);

static struct attribute *thermal_throttle_attrs[] = {
	&attr_count.attr,
	NULL
};

static struct attribute_group thermal_throttle_attr_group = {
	.attrs	= thermal_throttle_attrs,
	.name	= "thermal_throttle"
};
#endif /* CONFIG_SYSFS */

/***
 * therm_throt_process - Process thermal throttling event from interrupt
 * @curr: Whether the condition is current or not (boolean), since the
 *        thermal interrupt normally gets called both when the thermal
 *        event begins and once the event has ended.
 *
 * This function is called by the thermal interrupt after the
 * IRQ has been acknowledged.
 *
 * It will take care of rate limiting and printing messages to the syslog.
 *
 * Returns: 0 : Event should NOT be further logged, i.e. still in
 *              "timeout" from previous log message.
 *          1 : Event should be logged further, and a message has been
 *              printed to the syslog.
 */
static int therm_throt_process(int curr)
{
	unsigned int cpu = smp_processor_id();
	__u64 tmp_jiffs = get_jiffies_64();
	bool was_throttled = __get_cpu_var(thermal_throttle_active);
	bool is_throttled = __get_cpu_var(thermal_throttle_active) = curr;

	if (is_throttled)
		__get_cpu_var(thermal_throttle_count)++;

	if (!(was_throttled ^ is_throttled) &&
	    time_before64(tmp_jiffs, __get_cpu_var(next_check)))
		return 0;

	__get_cpu_var(next_check) = tmp_jiffs + CHECK_INTERVAL;

	/* if we just entered the thermal event */
	if (is_throttled) {
		printk(KERN_CRIT "CPU%d: Temperature above threshold, "
		       "cpu clock throttled (total events = %lu)\n",
		       cpu, __get_cpu_var(thermal_throttle_count));

		add_taint(TAINT_MACHINE_CHECK);
		return 1;
	}
	if (was_throttled) {
		printk(KERN_INFO "CPU%d: Temperature/speed normal\n", cpu);
		return 1;
	}

	return 0;
}

#ifdef CONFIG_SYSFS
/* Add/Remove thermal_throttle interface for CPU device: */
static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev)
{
	return sysfs_create_group(&sys_dev->kobj,
				  &thermal_throttle_attr_group);
}

static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
{
	sysfs_remove_group(&sys_dev->kobj, &thermal_throttle_attr_group);
}

/* Mutex protecting device creation against CPU hotplug: */
static DEFINE_MUTEX(therm_cpu_lock);

/* Get notified when a cpu comes on/off. Be hotplug friendly. */
static __cpuinit int
thermal_throttle_cpu_callback(struct notifier_block *nfb,
			      unsigned long action,
			      void *hcpu)
{
	unsigned int cpu = (unsigned long)hcpu;
	struct sys_device *sys_dev;
	int err = 0;

	sys_dev = get_cpu_sysdev(cpu);

	switch (action) {
	case CPU_UP_PREPARE:
	case CPU_UP_PREPARE_FROZEN:
		mutex_lock(&therm_cpu_lock);
		err = thermal_throttle_add_dev(sys_dev);
		mutex_unlock(&therm_cpu_lock);
		WARN_ON(err);
		break;
	case CPU_UP_CANCELED:
	case CPU_UP_CANCELED_FROZEN:
	case CPU_DEAD:
	case CPU_DEAD_FROZEN:
		mutex_lock(&therm_cpu_lock);
		thermal_throttle_remove_dev(sys_dev);
		mutex_unlock(&therm_cpu_lock);
		break;
	}
	return err ? NOTIFY_BAD : NOTIFY_OK;
}

static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
{
	.notifier_call = thermal_throttle_cpu_callback,
};

static __init int thermal_throttle_init_device(void)
{
	unsigned int cpu = 0;
	int err;

	if (!atomic_read(&therm_throt_en))
		return 0;

	register_hotcpu_notifier(&thermal_throttle_cpu_notifier);

#ifdef CONFIG_HOTPLUG_CPU
	mutex_lock(&therm_cpu_lock);
#endif
	/* connect live CPUs to sysfs */
	for_each_online_cpu(cpu) {
		err = thermal_throttle_add_dev(get_cpu_sysdev(cpu));
		WARN_ON(err);
	}
#ifdef CONFIG_HOTPLUG_CPU
	mutex_unlock(&therm_cpu_lock);
#endif

	return 0;
}
device_initcall(thermal_throttle_init_device);

#endif /* CONFIG_SYSFS */

/* Thermal transition interrupt handler */
static void intel_thermal_interrupt(void)
{
	__u64 msr_val;

	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT))
		mce_log_therm_throt_event(msr_val);
}

static void unexpected_thermal_interrupt(void)
{
	printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",
			smp_processor_id());
	add_taint(TAINT_MACHINE_CHECK);
}

static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;

asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
{
	exit_idle();
	irq_enter();
	inc_irq_stat(irq_thermal_count);
	smp_thermal_vector();
	irq_exit();
	/* Ack only at the end to avoid potential reentry */
	ack_APIC_irq();
}

void intel_init_thermal(struct cpuinfo_x86 *c)
{
	unsigned int cpu = smp_processor_id();
	int tm2 = 0;
	u32 l, h;

	/* Thermal monitoring depends on ACPI and clock modulation*/
	if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
		return;

	/*
	 * First check if its enabled already, in which case there might
	 * be some SMM goo which handles it, so we can't even put a handler
	 * since it might be delivered via SMI already:
	 */
	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	h = apic_read(APIC_LVTTHMR);
	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
		printk(KERN_DEBUG
		       "CPU%d: Thermal monitoring handled by SMI\n", cpu);
		return;
	}

	/* Check whether a vector already exists */
	if (h & APIC_VECTOR_MASK) {
		printk(KERN_DEBUG
		       "CPU%d: Thermal LVT vector (%#x) already installed\n",
		       cpu, (h & APIC_VECTOR_MASK));
		return;
	}

	/* early Pentium M models use different method for enabling TM2 */
	if (cpu_has(c, X86_FEATURE_TM2)) {
		if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
			rdmsr(MSR_THERM2_CTL, l, h);
			if (l & MSR_THERM2_CTL_TM_SELECT)
				tm2 = 1;
		} else if (l & MSR_IA32_MISC_ENABLE_TM2)
			tm2 = 1;
	}

	/* We'll mask the thermal vector in the lapic till we're ready: */
	h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
	apic_write(APIC_LVTTHMR, h);

	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
	wrmsr(MSR_IA32_THERM_INTERRUPT,
		l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);

	smp_thermal_vector = intel_thermal_interrupt;

	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);

	/* Unmask the thermal vector: */
	l = apic_read(APIC_LVTTHMR);
	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);

	printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",
	       cpu, tm2 ? "TM2" : "TM1");

	/* enable thermal throttle processing */
	atomic_set(&therm_throt_en, 1);
}
Commit	Line	Data
15d5f839	1	/*
3222b36f DZ	2	* Thermal throttle event support code (such as syslog messaging and rate
3222b36f DZ	3	* limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
cb6f3c15	4	*
3222b36f DZ	5	* This allows consistent reporting of CPU thermal throttle events.
	6	*
	7	* Maintains a counter in /sys that keeps track of the number of thermal
	8	* events, such that the user knows how bad the thermal problem might be
	9	* (since the logging to syslog and mcelog is rate limited).
15d5f839 DZ	10	*
	11	* Author: Dmitriy Zavin (dmitriyz@google.com)
	12	*
	13	* Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
3222b36f	14	* Inspired by Ross Biro's and Al Borchers' counter code.
15d5f839	15	*/
a65c88dd	16	#include <linux/interrupt.h>
cb6f3c15 IM	17	#include <linux/notifier.h>
cb6f3c15 IM	18	#include <linux/jiffies.h>
895287c0	19	#include <linux/kernel.h>
15d5f839	20	#include <linux/percpu.h>
3222b36f	21	#include <linux/sysdev.h>
895287c0 HS	22	#include <linux/types.h>
	23	#include <linux/init.h>
	24	#include <linux/smp.h>
15d5f839	25	#include <linux/cpu.h>
cb6f3c15	26
895287c0 HS	27	#include <asm/processor.h>
	28	#include <asm/system.h>
	29	#include <asm/apic.h>
a65c88dd HS	30	#include <asm/idle.h>
a65c88dd HS	31	#include <asm/mce.h>
895287c0	32	#include <asm/msr.h>
15d5f839 DZ	33
15d5f839 DZ	34	/* How long to wait between reporting thermal events */
cb6f3c15	35	#define CHECK_INTERVAL (300 * HZ)
15d5f839	36
3222b36f DZ	37	static DEFINE_PER_CPU(__u64, next_check) = INITIAL_JIFFIES;
3222b36f DZ	38	static DEFINE_PER_CPU(unsigned long, thermal_throttle_count);
0d01f314	39	static DEFINE_PER_CPU(bool, thermal_throttle_active);
cb6f3c15	40
1149e726	41	static atomic_t therm_throt_en = ATOMIC_INIT(0);
3222b36f DZ	42
3222b36f DZ	43	#ifdef CONFIG_SYSFS
cb6f3c15 IM	44	#define define_therm_throt_sysdev_one_ro(_name) \
	45	static SYSDEV_ATTR(_name, 0444, therm_throt_sysdev_show_##_name, NULL)
	46
	47	#define define_therm_throt_sysdev_show_func(name) \
	48	static ssize_t therm_throt_sysdev_show_##name(struct sys_device *dev, \
	49	struct sysdev_attribute *attr, \
	50	char *buf) \
	51	{ \
	52	unsigned int cpu = dev->id; \
	53	ssize_t ret; \
	54	\
	55	preempt_disable(); /* CPU hotplug */ \
	56	if (cpu_online(cpu)) \
	57	ret = sprintf(buf, "%lu\n", \
	58	per_cpu(thermal_throttle_##name, cpu)); \
	59	else \
	60	ret = 0; \
	61	preempt_enable(); \
	62	\
	63	return ret; \
3222b36f DZ	64	}
	65
	66	define_therm_throt_sysdev_show_func(count);
	67	define_therm_throt_sysdev_one_ro(count);
	68
	69	static struct attribute *thermal_throttle_attrs[] = {
	70	&attr_count.attr,
	71	NULL
	72	};
	73
	74	static struct attribute_group thermal_throttle_attr_group = {
cb6f3c15 IM	75	.attrs = thermal_throttle_attrs,
cb6f3c15 IM	76	.name = "thermal_throttle"
3222b36f DZ	77	};
3222b36f DZ	78	#endif /* CONFIG_SYSFS */
15d5f839 DZ	79
15d5f839 DZ	80	/***
3222b36f	81	* therm_throt_process - Process thermal throttling event from interrupt
15d5f839 DZ	82	* @curr: Whether the condition is current or not (boolean), since the
	83	* thermal interrupt normally gets called both when the thermal
	84	* event begins and once the event has ended.
	85	*
3222b36f	86	* This function is called by the thermal interrupt after the
15d5f839 DZ	87	* IRQ has been acknowledged.
	88	*
	89	* It will take care of rate limiting and printing messages to the syslog.
	90	*
	91	* Returns: 0 : Event should NOT be further logged, i.e. still in
	92	* "timeout" from previous log message.
	93	* 1 : Event should be logged further, and a message has been
	94	* printed to the syslog.
	95	*/
1149e726	96	static int therm_throt_process(int curr)
15d5f839 DZ	97	{
15d5f839 DZ	98	unsigned int cpu = smp_processor_id();
66aea991	99	__u64 tmp_jiffs = get_jiffies_64();
0d01f314 DT	100	bool was_throttled = __get_cpu_var(thermal_throttle_active);
0d01f314 DT	101	bool is_throttled = __get_cpu_var(thermal_throttle_active) = curr;
15d5f839	102
0d01f314	103	if (is_throttled)
3222b36f DZ	104	__get_cpu_var(thermal_throttle_count)++;
3222b36f DZ	105
0d01f314 DT	106	if (!(was_throttled ^ is_throttled) &&
0d01f314 DT	107	time_before64(tmp_jiffs, __get_cpu_var(next_check)))
15d5f839 DZ	108	return 0;
15d5f839 DZ	109
66aea991	110	__get_cpu_var(next_check) = tmp_jiffs + CHECK_INTERVAL;
15d5f839 DZ	111
15d5f839 DZ	112	/* if we just entered the thermal event */
0d01f314	113	if (is_throttled) {
15d5f839	114	printk(KERN_CRIT "CPU%d: Temperature above threshold, "
0d01f314 DT	115	"cpu clock throttled (total events = %lu)\n",
0d01f314 DT	116	cpu, __get_cpu_var(thermal_throttle_count));
3222b36f	117
15d5f839	118	add_taint(TAINT_MACHINE_CHECK);
4e5c25d4 HD	119	return 1;
	120	}
	121	if (was_throttled) {
0d01f314	122	printk(KERN_INFO "CPU%d: Temperature/speed normal\n", cpu);
4e5c25d4	123	return 1;
15d5f839 DZ	124	}
15d5f839 DZ	125
4e5c25d4	126	return 0;
15d5f839	127	}
3222b36f DZ	128
3222b36f DZ	129	#ifdef CONFIG_SYSFS
cb6f3c15	130	/* Add/Remove thermal_throttle interface for CPU device: */
6569345a	131	static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev)
3222b36f	132	{
cb6f3c15 IM	133	return sysfs_create_group(&sys_dev->kobj,
cb6f3c15 IM	134	&thermal_throttle_attr_group);
3222b36f DZ	135	}
3222b36f DZ	136
6569345a	137	static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
3222b36f	138	{
7c36752a	139	sysfs_remove_group(&sys_dev->kobj, &thermal_throttle_attr_group);
3222b36f DZ	140	}
3222b36f DZ	141
cb6f3c15	142	/* Mutex protecting device creation against CPU hotplug: */
3222b36f DZ	143	static DEFINE_MUTEX(therm_cpu_lock);
	144
	145	/* Get notified when a cpu comes on/off. Be hotplug friendly. */
cb6f3c15 IM	146	static __cpuinit int
	147	thermal_throttle_cpu_callback(struct notifier_block *nfb,
	148	unsigned long action,
	149	void *hcpu)
3222b36f DZ	150	{
	151	unsigned int cpu = (unsigned long)hcpu;
	152	struct sys_device *sys_dev;
c7e38a9c	153	int err = 0;
3222b36f DZ	154
3222b36f DZ	155	sys_dev = get_cpu_sysdev(cpu);
cb6f3c15	156
3222b36f	157	switch (action) {
c7e38a9c AM	158	case CPU_UP_PREPARE:
c7e38a9c AM	159	case CPU_UP_PREPARE_FROZEN:
38ef6d19	160	mutex_lock(&therm_cpu_lock);
6569345a	161	err = thermal_throttle_add_dev(sys_dev);
38ef6d19	162	mutex_unlock(&therm_cpu_lock);
6569345a	163	WARN_ON(err);
3222b36f	164	break;
c7e38a9c AM	165	case CPU_UP_CANCELED:
c7e38a9c AM	166	case CPU_UP_CANCELED_FROZEN:
3222b36f	167	case CPU_DEAD:
8bb78442	168	case CPU_DEAD_FROZEN:
38ef6d19	169	mutex_lock(&therm_cpu_lock);
3222b36f	170	thermal_throttle_remove_dev(sys_dev);
38ef6d19	171	mutex_unlock(&therm_cpu_lock);
3222b36f DZ	172	break;
3222b36f DZ	173	}
c7e38a9c	174	return err ? NOTIFY_BAD : NOTIFY_OK;
3222b36f DZ	175	}
3222b36f DZ	176
25d1b516	177	static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
3222b36f DZ	178	{
	179	.notifier_call = thermal_throttle_cpu_callback,
	180	};
3222b36f DZ	181
	182	static __init int thermal_throttle_init_device(void)
	183	{
	184	unsigned int cpu = 0;
6569345a	185	int err;
3222b36f DZ	186
	187	if (!atomic_read(&therm_throt_en))
	188	return 0;
	189
	190	register_hotcpu_notifier(&thermal_throttle_cpu_notifier);
	191
	192	#ifdef CONFIG_HOTPLUG_CPU
	193	mutex_lock(&therm_cpu_lock);
	194	#endif
	195	/* connect live CPUs to sysfs */
6569345a SH	196	for_each_online_cpu(cpu) {
	197	err = thermal_throttle_add_dev(get_cpu_sysdev(cpu));
	198	WARN_ON(err);
	199	}
3222b36f DZ	200	#ifdef CONFIG_HOTPLUG_CPU
	201	mutex_unlock(&therm_cpu_lock);
	202	#endif
	203
	204	return 0;
	205	}
3222b36f	206	device_initcall(thermal_throttle_init_device);
a65c88dd	207
3222b36f	208	#endif /* CONFIG_SYSFS */
a65c88dd HS	209
a65c88dd HS	210	/* Thermal transition interrupt handler */
8363fc82	211	static void intel_thermal_interrupt(void)
a65c88dd HS	212	{
	213	__u64 msr_val;
	214
	215	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
	216	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT))
	217	mce_log_therm_throt_event(msr_val);
	218	}
	219
	220	static void unexpected_thermal_interrupt(void)
	221	{
	222	printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",
	223	smp_processor_id());
	224	add_taint(TAINT_MACHINE_CHECK);
	225	}
	226
	227	static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
	228
	229	asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
	230	{
	231	exit_idle();
	232	irq_enter();
	233	inc_irq_stat(irq_thermal_count);
	234	smp_thermal_vector();
	235	irq_exit();
	236	/* Ack only at the end to avoid potential reentry */
	237	ack_APIC_irq();
	238	}
	239
895287c0 HS	240	void intel_init_thermal(struct cpuinfo_x86 *c)
	241	{
	242	unsigned int cpu = smp_processor_id();
	243	int tm2 = 0;
	244	u32 l, h;
	245
	246	/* Thermal monitoring depends on ACPI and clock modulation*/
	247	if (!cpu_has(c, X86_FEATURE_ACPI) \|\| !cpu_has(c, X86_FEATURE_ACC))
	248	return;
	249
	250	/*
	251	* First check if its enabled already, in which case there might
	252	* be some SMM goo which handles it, so we can't even put a handler
	253	* since it might be delivered via SMI already:
	254	*/
	255	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	256	h = apic_read(APIC_LVTTHMR);
	257	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
	258	printk(KERN_DEBUG
	259	"CPU%d: Thermal monitoring handled by SMI\n", cpu);
	260	return;
	261	}
	262
895287c0 HS	263	/* Check whether a vector already exists */
	264	if (h & APIC_VECTOR_MASK) {
	265	printk(KERN_DEBUG
	266	"CPU%d: Thermal LVT vector (%#x) already installed\n",
	267	cpu, (h & APIC_VECTOR_MASK));
	268	return;
	269	}
	270
f3a0867b BZ	271	/* early Pentium M models use different method for enabling TM2 */
	272	if (cpu_has(c, X86_FEATURE_TM2)) {
	273	if (c->x86 == 6 && (c->x86_model == 9 \|\| c->x86_model == 13)) {
	274	rdmsr(MSR_THERM2_CTL, l, h);
	275	if (l & MSR_THERM2_CTL_TM_SELECT)
	276	tm2 = 1;
	277	} else if (l & MSR_IA32_MISC_ENABLE_TM2)
	278	tm2 = 1;
	279	}
	280
895287c0 HS	281	/* We'll mask the thermal vector in the lapic till we're ready: */
	282	h = THERMAL_APIC_VECTOR \| APIC_DM_FIXED \| APIC_LVT_MASKED;
	283	apic_write(APIC_LVTTHMR, h);
	284
	285	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
	286	wrmsr(MSR_IA32_THERM_INTERRUPT,
	287	l \| (THERM_INT_LOW_ENABLE \| THERM_INT_HIGH_ENABLE), h);
	288
8363fc82	289	smp_thermal_vector = intel_thermal_interrupt;
895287c0 HS	290
	291	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	292	wrmsr(MSR_IA32_MISC_ENABLE, l \| MSR_IA32_MISC_ENABLE_TM1, h);
	293
	294	/* Unmask the thermal vector: */
	295	l = apic_read(APIC_LVTTHMR);
	296	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
	297
	298	printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",
	299	cpu, tm2 ? "TM2" : "TM1");
	300
	301	/* enable thermal throttle processing */
	302	atomic_set(&therm_throt_en, 1);
	303	}