[deliverable/linux.git] / arch / x86 / kernel / cpu / mcheck / therm_throt.c

/*
 * Thermal throttle event support code (such as syslog messaging and rate
 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
 *
 * This allows consistent reporting of CPU thermal throttle events.
 *
 * Maintains a counter in /sys that keeps track of the number of thermal
 * events, such that the user knows how bad the thermal problem might be
 * (since the logging to syslog and mcelog is rate limited).
 *
 * Author: Dmitriy Zavin (dmitriyz@google.com)
 *
 * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
 *          Inspired by Ross Biro's and Al Borchers' counter code.
 */
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/percpu.h>
#include <linux/sysdev.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/cpu.h>

#include <asm/processor.h>
#include <asm/system.h>
#include <asm/apic.h>
#include <asm/idle.h>
#include <asm/mce.h>
#include <asm/msr.h>

/* How long to wait between reporting thermal events */
#define CHECK_INTERVAL		(300 * HZ)

#define THERMAL_THROTTLING_EVENT	0
#define POWER_LIMIT_EVENT		1

/*
 * Current thermal event state:
 */
struct _thermal_state {
	bool			new_event;
	int			event;
	u64			next_check;
	unsigned long		count;
	unsigned long		last_count;
};

struct thermal_state {
	struct _thermal_state core_throttle;
	struct _thermal_state core_power_limit;
	struct _thermal_state package_throttle;
	struct _thermal_state package_power_limit;
	struct _thermal_state core_thresh0;
	struct _thermal_state core_thresh1;
};

/* Callback to handle core threshold interrupts */
int (*platform_thermal_notify)(__u64 msr_val);
EXPORT_SYMBOL(platform_thermal_notify);

static DEFINE_PER_CPU(struct thermal_state, thermal_state);

static atomic_t therm_throt_en	= ATOMIC_INIT(0);

static u32 lvtthmr_init __read_mostly;

#ifdef CONFIG_SYSFS
#define define_therm_throt_sysdev_one_ro(_name)				\
	static SYSDEV_ATTR(_name, 0444,					\
			   therm_throt_sysdev_show_##_name,		\
				   NULL)				\

#define define_therm_throt_sysdev_show_func(event, name)		\
									\
static ssize_t therm_throt_sysdev_show_##event##_##name(		\
			struct sys_device *dev,				\
			struct sysdev_attribute *attr,			\
			char *buf)					\
{									\
	unsigned int cpu = dev->id;					\
	ssize_t ret;							\
									\
	preempt_disable();	/* CPU hotplug */			\
	if (cpu_online(cpu)) {						\
		ret = sprintf(buf, "%lu\n",				\
			      per_cpu(thermal_state, cpu).event.name);	\
	} else								\
		ret = 0;						\
	preempt_enable();						\
									\
	return ret;							\
}

define_therm_throt_sysdev_show_func(core_throttle, count);
define_therm_throt_sysdev_one_ro(core_throttle_count);

define_therm_throt_sysdev_show_func(core_power_limit, count);
define_therm_throt_sysdev_one_ro(core_power_limit_count);

define_therm_throt_sysdev_show_func(package_throttle, count);
define_therm_throt_sysdev_one_ro(package_throttle_count);

define_therm_throt_sysdev_show_func(package_power_limit, count);
define_therm_throt_sysdev_one_ro(package_power_limit_count);

static struct attribute *thermal_throttle_attrs[] = {
	&attr_core_throttle_count.attr,
	NULL
};

static struct attribute_group thermal_attr_group = {
	.attrs	= thermal_throttle_attrs,
	.name	= "thermal_throttle"
};
#endif /* CONFIG_SYSFS */

#define CORE_LEVEL	0
#define PACKAGE_LEVEL	1

/***
 * therm_throt_process - Process thermal throttling event from interrupt
 * @curr: Whether the condition is current or not (boolean), since the
 *        thermal interrupt normally gets called both when the thermal
 *        event begins and once the event has ended.
 *
 * This function is called by the thermal interrupt after the
 * IRQ has been acknowledged.
 *
 * It will take care of rate limiting and printing messages to the syslog.
 *
 * Returns: 0 : Event should NOT be further logged, i.e. still in
 *              "timeout" from previous log message.
 *          1 : Event should be logged further, and a message has been
 *              printed to the syslog.
 */
static int therm_throt_process(bool new_event, int event, int level)
{
	struct _thermal_state *state;
	unsigned int this_cpu = smp_processor_id();
	bool old_event;
	u64 now;
	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);

	now = get_jiffies_64();
	if (level == CORE_LEVEL) {
		if (event == THERMAL_THROTTLING_EVENT)
			state = &pstate->core_throttle;
		else if (event == POWER_LIMIT_EVENT)
			state = &pstate->core_power_limit;
		else
			 return 0;
	} else if (level == PACKAGE_LEVEL) {
		if (event == THERMAL_THROTTLING_EVENT)
			state = &pstate->package_throttle;
		else if (event == POWER_LIMIT_EVENT)
			state = &pstate->package_power_limit;
		else
			return 0;
	} else
		return 0;

	old_event = state->new_event;
	state->new_event = new_event;

	if (new_event)
		state->count++;

	if (time_before64(now, state->next_check) &&
			state->count != state->last_count)
		return 0;

	state->next_check = now + CHECK_INTERVAL;
	state->last_count = state->count;

	/* if we just entered the thermal event */
	if (new_event) {
		if (event == THERMAL_THROTTLING_EVENT)
			printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package",
				state->count);
		else
			printk(KERN_CRIT "CPU%d: %s power limit notification (total events = %lu)\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package",
				state->count);
		return 1;
	}
	if (old_event) {
		if (event == THERMAL_THROTTLING_EVENT)
			printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package");
		else
			printk(KERN_INFO "CPU%d: %s power limit normal\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package");
		return 1;
	}

	return 0;
}

static int thresh_event_valid(int event)
{
	struct _thermal_state *state;
	unsigned int this_cpu = smp_processor_id();
	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
	u64 now = get_jiffies_64();

	state = (event == 0) ? &pstate->core_thresh0 : &pstate->core_thresh1;

	if (time_before64(now, state->next_check))
		return 0;

	state->next_check = now + CHECK_INTERVAL;
	return 1;
}

#ifdef CONFIG_SYSFS
/* Add/Remove thermal_throttle interface for CPU device: */
static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev,
				unsigned int cpu)
{
	int err;
	struct cpuinfo_x86 *c = &cpu_data(cpu);

	err = sysfs_create_group(&sys_dev->kobj, &thermal_attr_group);
	if (err)
		return err;

	if (cpu_has(c, X86_FEATURE_PLN))
		err = sysfs_add_file_to_group(&sys_dev->kobj,
					      &attr_core_power_limit_count.attr,
					      thermal_attr_group.name);
	if (cpu_has(c, X86_FEATURE_PTS)) {
		err = sysfs_add_file_to_group(&sys_dev->kobj,
					      &attr_package_throttle_count.attr,
					      thermal_attr_group.name);
		if (cpu_has(c, X86_FEATURE_PLN))
			err = sysfs_add_file_to_group(&sys_dev->kobj,
					&attr_package_power_limit_count.attr,
					thermal_attr_group.name);
	}

	return err;
}

static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
{
	sysfs_remove_group(&sys_dev->kobj, &thermal_attr_group);
}

/* Mutex protecting device creation against CPU hotplug: */
static DEFINE_MUTEX(therm_cpu_lock);

/* Get notified when a cpu comes on/off. Be hotplug friendly. */
static __cpuinit int
thermal_throttle_cpu_callback(struct notifier_block *nfb,
			      unsigned long action,
			      void *hcpu)
{
	unsigned int cpu = (unsigned long)hcpu;
	struct sys_device *sys_dev;
	int err = 0;

	sys_dev = get_cpu_sysdev(cpu);

	switch (action) {
	case CPU_UP_PREPARE:
	case CPU_UP_PREPARE_FROZEN:
		mutex_lock(&therm_cpu_lock);
		err = thermal_throttle_add_dev(sys_dev, cpu);
		mutex_unlock(&therm_cpu_lock);
		WARN_ON(err);
		break;
	case CPU_UP_CANCELED:
	case CPU_UP_CANCELED_FROZEN:
	case CPU_DEAD:
	case CPU_DEAD_FROZEN:
		mutex_lock(&therm_cpu_lock);
		thermal_throttle_remove_dev(sys_dev);
		mutex_unlock(&therm_cpu_lock);
		break;
	}
	return notifier_from_errno(err);
}

static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
{
	.notifier_call = thermal_throttle_cpu_callback,
};

static __init int thermal_throttle_init_device(void)
{
	unsigned int cpu = 0;
	int err;

	if (!atomic_read(&therm_throt_en))
		return 0;

	register_hotcpu_notifier(&thermal_throttle_cpu_notifier);

#ifdef CONFIG_HOTPLUG_CPU
	mutex_lock(&therm_cpu_lock);
#endif
	/* connect live CPUs to sysfs */
	for_each_online_cpu(cpu) {
		err = thermal_throttle_add_dev(get_cpu_sysdev(cpu), cpu);
		WARN_ON(err);
	}
#ifdef CONFIG_HOTPLUG_CPU
	mutex_unlock(&therm_cpu_lock);
#endif

	return 0;
}
device_initcall(thermal_throttle_init_device);

#endif /* CONFIG_SYSFS */

/*
 * Set up the most two significant bit to notify mce log that this thermal
 * event type.
 * This is a temp solution. May be changed in the future with mce log
 * infrasture.
 */
#define CORE_THROTTLED		(0)
#define CORE_POWER_LIMIT	((__u64)1 << 62)
#define PACKAGE_THROTTLED	((__u64)2 << 62)
#define PACKAGE_POWER_LIMIT	((__u64)3 << 62)

static void notify_thresholds(__u64 msr_val)
{
	/* check whether the interrupt handler is defined;
	 * otherwise simply return
	 */
	if (!platform_thermal_notify)
		return;

	/* lower threshold reached */
	if ((msr_val & THERM_LOG_THRESHOLD0) &&	thresh_event_valid(0))
		platform_thermal_notify(msr_val);
	/* higher threshold reached */
	if ((msr_val & THERM_LOG_THRESHOLD1) && thresh_event_valid(1))
		platform_thermal_notify(msr_val);
}

/* Thermal transition interrupt handler */
static void intel_thermal_interrupt(void)
{
	__u64 msr_val;

	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);

	/* Check for violation of core thermal thresholds*/
	notify_thresholds(msr_val);

	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
				THERMAL_THROTTLING_EVENT,
				CORE_LEVEL) != 0)
		mce_log_therm_throt_event(CORE_THROTTLED | msr_val);

	if (this_cpu_has(X86_FEATURE_PLN))
		if (therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
					POWER_LIMIT_EVENT,
					CORE_LEVEL) != 0)
			mce_log_therm_throt_event(CORE_POWER_LIMIT | msr_val);

	if (this_cpu_has(X86_FEATURE_PTS)) {
		rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
		if (therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
					THERMAL_THROTTLING_EVENT,
					PACKAGE_LEVEL) != 0)
			mce_log_therm_throt_event(PACKAGE_THROTTLED | msr_val);
		if (this_cpu_has(X86_FEATURE_PLN))
			if (therm_throt_process(msr_val &
					PACKAGE_THERM_STATUS_POWER_LIMIT,
					POWER_LIMIT_EVENT,
					PACKAGE_LEVEL) != 0)
				mce_log_therm_throt_event(PACKAGE_POWER_LIMIT
							  | msr_val);
	}
}

static void unexpected_thermal_interrupt(void)
{
	printk(KERN_ERR "CPU%d: Unexpected LVT thermal interrupt!\n",
			smp_processor_id());
}

static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;

asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
{
	exit_idle();
	irq_enter();
	inc_irq_stat(irq_thermal_count);
	smp_thermal_vector();
	irq_exit();
	/* Ack only at the end to avoid potential reentry */
	ack_APIC_irq();
}

/* Thermal monitoring depends on APIC, ACPI and clock modulation */
static int intel_thermal_supported(struct cpuinfo_x86 *c)
{
	if (!cpu_has_apic)
		return 0;
	if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
		return 0;
	return 1;
}

void __init mcheck_intel_therm_init(void)
{
	/*
	 * This function is only called on boot CPU. Save the init thermal
	 * LVT value on BSP and use that value to restore APs' thermal LVT
	 * entry BIOS programmed later
	 */
	if (intel_thermal_supported(&boot_cpu_data))
		lvtthmr_init = apic_read(APIC_LVTTHMR);
}

void intel_init_thermal(struct cpuinfo_x86 *c)
{
	unsigned int cpu = smp_processor_id();
	int tm2 = 0;
	u32 l, h;

	if (!intel_thermal_supported(c))
		return;

	/*
	 * First check if its enabled already, in which case there might
	 * be some SMM goo which handles it, so we can't even put a handler
	 * since it might be delivered via SMI already:
	 */
	rdmsr(MSR_IA32_MISC_ENABLE, l, h);

	h = lvtthmr_init;
	/*
	 * The initial value of thermal LVT entries on all APs always reads
	 * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
	 * sequence to them and LVT registers are reset to 0s except for
	 * the mask bits which are set to 1s when APs receive INIT IPI.
	 * If BIOS takes over the thermal interrupt and sets its interrupt
	 * delivery mode to SMI (not fixed), it restores the value that the
	 * BIOS has programmed on AP based on BSP's info we saved since BIOS
	 * is always setting the same value for all threads/cores.
	 */
	if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
		apic_write(APIC_LVTTHMR, lvtthmr_init);


	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
		printk(KERN_DEBUG
		       "CPU%d: Thermal monitoring handled by SMI\n", cpu);
		return;
	}

	/* Check whether a vector already exists */
	if (h & APIC_VECTOR_MASK) {
		printk(KERN_DEBUG
		       "CPU%d: Thermal LVT vector (%#x) already installed\n",
		       cpu, (h & APIC_VECTOR_MASK));
		return;
	}

	/* early Pentium M models use different method for enabling TM2 */
	if (cpu_has(c, X86_FEATURE_TM2)) {
		if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
			rdmsr(MSR_THERM2_CTL, l, h);
			if (l & MSR_THERM2_CTL_TM_SELECT)
				tm2 = 1;
		} else if (l & MSR_IA32_MISC_ENABLE_TM2)
			tm2 = 1;
	}

	/* We'll mask the thermal vector in the lapic till we're ready: */
	h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
	apic_write(APIC_LVTTHMR, h);

	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
	if (cpu_has(c, X86_FEATURE_PLN))
		wrmsr(MSR_IA32_THERM_INTERRUPT,
		      l | (THERM_INT_LOW_ENABLE
			| THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
	else
		wrmsr(MSR_IA32_THERM_INTERRUPT,
		      l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);

	if (cpu_has(c, X86_FEATURE_PTS)) {
		rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
		if (cpu_has(c, X86_FEATURE_PLN))
			wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
			      l | (PACKAGE_THERM_INT_LOW_ENABLE
				| PACKAGE_THERM_INT_HIGH_ENABLE
				| PACKAGE_THERM_INT_PLN_ENABLE), h);
		else
			wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
			      l | (PACKAGE_THERM_INT_LOW_ENABLE
				| PACKAGE_THERM_INT_HIGH_ENABLE), h);
	}

	smp_thermal_vector = intel_thermal_interrupt;

	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);

	/* Unmask the thermal vector: */
	l = apic_read(APIC_LVTTHMR);
	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);

	printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
		       tm2 ? "TM2" : "TM1");

	/* enable thermal throttle processing */
	atomic_set(&therm_throt_en, 1);
}
Commit	Line	Data
15d5f839	1	/*
3222b36f DZ	2	* Thermal throttle event support code (such as syslog messaging and rate
3222b36f DZ	3	* limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
cb6f3c15	4	*
3222b36f DZ	5	* This allows consistent reporting of CPU thermal throttle events.
	6	*
	7	* Maintains a counter in /sys that keeps track of the number of thermal
	8	* events, such that the user knows how bad the thermal problem might be
	9	* (since the logging to syslog and mcelog is rate limited).
15d5f839 DZ	10	*
	11	* Author: Dmitriy Zavin (dmitriyz@google.com)
	12	*
	13	* Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
3222b36f	14	* Inspired by Ross Biro's and Al Borchers' counter code.
15d5f839	15	*/
a65c88dd	16	#include <linux/interrupt.h>
cb6f3c15 IM	17	#include <linux/notifier.h>
cb6f3c15 IM	18	#include <linux/jiffies.h>
895287c0	19	#include <linux/kernel.h>
15d5f839	20	#include <linux/percpu.h>
3222b36f	21	#include <linux/sysdev.h>
895287c0 HS	22	#include <linux/types.h>
	23	#include <linux/init.h>
	24	#include <linux/smp.h>
15d5f839	25	#include <linux/cpu.h>
cb6f3c15	26
895287c0 HS	27	#include <asm/processor.h>
	28	#include <asm/system.h>
	29	#include <asm/apic.h>
a65c88dd HS	30	#include <asm/idle.h>
a65c88dd HS	31	#include <asm/mce.h>
895287c0	32	#include <asm/msr.h>
15d5f839 DZ	33
15d5f839 DZ	34	/* How long to wait between reporting thermal events */
cb6f3c15	35	#define CHECK_INTERVAL (300 * HZ)
15d5f839	36
0199114c FY	37	#define THERMAL_THROTTLING_EVENT 0
	38	#define POWER_LIMIT_EVENT 1
	39
39676840	40	/*
0199114c	41	* Current thermal event state:
39676840	42	*/
55d435a2	43	struct _thermal_state {
0199114c FY	44	bool new_event;
0199114c FY	45	int event;
39676840	46	u64 next_check;
0199114c FY	47	unsigned long count;
0199114c FY	48	unsigned long last_count;
39676840	49	};
cb6f3c15	50
55d435a2	51	struct thermal_state {
0199114c FY	52	struct _thermal_state core_throttle;
	53	struct _thermal_state core_power_limit;
	54	struct _thermal_state package_throttle;
	55	struct _thermal_state package_power_limit;
9e76a97e D	56	struct _thermal_state core_thresh0;
9e76a97e D	57	struct _thermal_state core_thresh1;
55d435a2 FY	58	};
55d435a2 FY	59
9e76a97e D	60	/* Callback to handle core threshold interrupts */
9e76a97e D	61	int (*platform_thermal_notify)(__u64 msr_val);
f21bbec9	62	EXPORT_SYMBOL(platform_thermal_notify);
9e76a97e	63
39676840 IM	64	static DEFINE_PER_CPU(struct thermal_state, thermal_state);
	65
	66	static atomic_t therm_throt_en = ATOMIC_INIT(0);
3222b36f	67
a2202aa2 YW	68	static u32 lvtthmr_init __read_mostly;
a2202aa2 YW	69
3222b36f	70	#ifdef CONFIG_SYSFS
cb6f3c15	71	#define define_therm_throt_sysdev_one_ro(_name) \
55d435a2 FY	72	static SYSDEV_ATTR(_name, 0444, \
	73	therm_throt_sysdev_show_##_name, \
	74	NULL) \
cb6f3c15	75
0199114c	76	#define define_therm_throt_sysdev_show_func(event, name) \
39676840	77	\
0199114c	78	static ssize_t therm_throt_sysdev_show_##event##_##name( \
39676840 IM	79	struct sys_device *dev, \
	80	struct sysdev_attribute *attr, \
	81	char *buf) \
cb6f3c15 IM	82	{ \
	83	unsigned int cpu = dev->id; \
	84	ssize_t ret; \
	85	\
	86	preempt_disable(); /* CPU hotplug */ \
55d435a2	87	if (cpu_online(cpu)) { \
cb6f3c15	88	ret = sprintf(buf, "%lu\n", \
0199114c	89	per_cpu(thermal_state, cpu).event.name); \
55d435a2	90	} else \
cb6f3c15 IM	91	ret = 0; \
	92	preempt_enable(); \
	93	\
	94	return ret; \
3222b36f DZ	95	}
3222b36f DZ	96
0199114c	97	define_therm_throt_sysdev_show_func(core_throttle, count);
55d435a2 FY	98	define_therm_throt_sysdev_one_ro(core_throttle_count);
55d435a2 FY	99
0199114c FY	100	define_therm_throt_sysdev_show_func(core_power_limit, count);
	101	define_therm_throt_sysdev_one_ro(core_power_limit_count);
	102
	103	define_therm_throt_sysdev_show_func(package_throttle, count);
55d435a2	104	define_therm_throt_sysdev_one_ro(package_throttle_count);
3222b36f	105
0199114c FY	106	define_therm_throt_sysdev_show_func(package_power_limit, count);
	107	define_therm_throt_sysdev_one_ro(package_power_limit_count);
	108
3222b36f	109	static struct attribute *thermal_throttle_attrs[] = {
55d435a2	110	&attr_core_throttle_count.attr,
3222b36f DZ	111	NULL
	112	};
	113
0199114c	114	static struct attribute_group thermal_attr_group = {
cb6f3c15 IM	115	.attrs = thermal_throttle_attrs,
cb6f3c15 IM	116	.name = "thermal_throttle"
3222b36f DZ	117	};
3222b36f DZ	118	#endif /* CONFIG_SYSFS */
15d5f839	119
0199114c FY	120	#define CORE_LEVEL 0
	121	#define PACKAGE_LEVEL 1
	122
15d5f839	123	/***
3222b36f	124	* therm_throt_process - Process thermal throttling event from interrupt
15d5f839 DZ	125	* @curr: Whether the condition is current or not (boolean), since the
	126	* thermal interrupt normally gets called both when the thermal
	127	* event begins and once the event has ended.
	128	*
3222b36f	129	* This function is called by the thermal interrupt after the
15d5f839 DZ	130	* IRQ has been acknowledged.
	131	*
	132	* It will take care of rate limiting and printing messages to the syslog.
	133	*
	134	* Returns: 0 : Event should NOT be further logged, i.e. still in
	135	* "timeout" from previous log message.
	136	* 1 : Event should be logged further, and a message has been
	137	* printed to the syslog.
	138	*/
0199114c	139	static int therm_throt_process(bool new_event, int event, int level)
15d5f839	140	{
55d435a2	141	struct _thermal_state *state;
0199114c FY	142	unsigned int this_cpu = smp_processor_id();
0199114c FY	143	bool old_event;
39676840	144	u64 now;
0199114c	145	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
39676840	146
39676840	147	now = get_jiffies_64();
0199114c FY	148	if (level == CORE_LEVEL) {
	149	if (event == THERMAL_THROTTLING_EVENT)
	150	state = &pstate->core_throttle;
	151	else if (event == POWER_LIMIT_EVENT)
	152	state = &pstate->core_power_limit;
	153	else
	154	return 0;
	155	} else if (level == PACKAGE_LEVEL) {
	156	if (event == THERMAL_THROTTLING_EVENT)
	157	state = &pstate->package_throttle;
	158	else if (event == POWER_LIMIT_EVENT)
	159	state = &pstate->package_power_limit;
	160	else
	161	return 0;
	162	} else
	163	return 0;
39676840	164
0199114c FY	165	old_event = state->new_event;
0199114c FY	166	state->new_event = new_event;
15d5f839	167
0199114c FY	168	if (new_event)
0199114c FY	169	state->count++;
3222b36f	170
b417c9fd	171	if (time_before64(now, state->next_check) &&
0199114c	172	state->count != state->last_count)
15d5f839 DZ	173	return 0;
15d5f839 DZ	174
39676840	175	state->next_check = now + CHECK_INTERVAL;
0199114c	176	state->last_count = state->count;
15d5f839 DZ	177
15d5f839 DZ	178	/* if we just entered the thermal event */
0199114c FY	179	if (new_event) {
	180	if (event == THERMAL_THROTTLING_EVENT)
	181	printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
	182	this_cpu,
	183	level == CORE_LEVEL ? "Core" : "Package",
	184	state->count);
	185	else
	186	printk(KERN_CRIT "CPU%d: %s power limit notification (total events = %lu)\n",
	187	this_cpu,
	188	level == CORE_LEVEL ? "Core" : "Package",
	189	state->count);
4e5c25d4 HD	190	return 1;
4e5c25d4 HD	191	}
0199114c FY	192	if (old_event) {
	193	if (event == THERMAL_THROTTLING_EVENT)
	194	printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
	195	this_cpu,
	196	level == CORE_LEVEL ? "Core" : "Package");
	197	else
	198	printk(KERN_INFO "CPU%d: %s power limit normal\n",
	199	this_cpu,
	200	level == CORE_LEVEL ? "Core" : "Package");
4e5c25d4	201	return 1;
15d5f839 DZ	202	}
15d5f839 DZ	203
4e5c25d4	204	return 0;
15d5f839	205	}
3222b36f	206
9e76a97e D	207	static int thresh_event_valid(int event)
	208	{
	209	struct _thermal_state *state;
	210	unsigned int this_cpu = smp_processor_id();
	211	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
	212	u64 now = get_jiffies_64();
	213
	214	state = (event == 0) ? &pstate->core_thresh0 : &pstate->core_thresh1;
	215
	216	if (time_before64(now, state->next_check))
	217	return 0;
	218
	219	state->next_check = now + CHECK_INTERVAL;
	220	return 1;
	221	}
	222
3222b36f	223	#ifdef CONFIG_SYSFS
cb6f3c15	224	/* Add/Remove thermal_throttle interface for CPU device: */
51e3c1b5 SS	225	static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev,
51e3c1b5 SS	226	unsigned int cpu)
3222b36f	227	{
55d435a2	228	int err;
51e3c1b5	229	struct cpuinfo_x86 *c = &cpu_data(cpu);
55d435a2	230
0199114c	231	err = sysfs_create_group(&sys_dev->kobj, &thermal_attr_group);
55d435a2 FY	232	if (err)
	233	return err;
	234
0199114c FY	235	if (cpu_has(c, X86_FEATURE_PLN))
	236	err = sysfs_add_file_to_group(&sys_dev->kobj,
	237	&attr_core_power_limit_count.attr,
	238	thermal_attr_group.name);
b62be8ea	239	if (cpu_has(c, X86_FEATURE_PTS)) {
55d435a2 FY	240	err = sysfs_add_file_to_group(&sys_dev->kobj,
55d435a2 FY	241	&attr_package_throttle_count.attr,
0199114c FY	242	thermal_attr_group.name);
	243	if (cpu_has(c, X86_FEATURE_PLN))
	244	err = sysfs_add_file_to_group(&sys_dev->kobj,
	245	&attr_package_power_limit_count.attr,
	246	thermal_attr_group.name);
b62be8ea	247	}
55d435a2 FY	248
55d435a2 FY	249	return err;
3222b36f DZ	250	}
3222b36f DZ	251
6569345a	252	static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
3222b36f	253	{
0199114c	254	sysfs_remove_group(&sys_dev->kobj, &thermal_attr_group);
3222b36f DZ	255	}
3222b36f DZ	256
cb6f3c15	257	/* Mutex protecting device creation against CPU hotplug: */
3222b36f DZ	258	static DEFINE_MUTEX(therm_cpu_lock);
	259
	260	/* Get notified when a cpu comes on/off. Be hotplug friendly. */
cb6f3c15 IM	261	static __cpuinit int
	262	thermal_throttle_cpu_callback(struct notifier_block *nfb,
	263	unsigned long action,
	264	void *hcpu)
3222b36f DZ	265	{
	266	unsigned int cpu = (unsigned long)hcpu;
	267	struct sys_device *sys_dev;
c7e38a9c	268	int err = 0;
3222b36f DZ	269
3222b36f DZ	270	sys_dev = get_cpu_sysdev(cpu);
cb6f3c15	271
3222b36f	272	switch (action) {
c7e38a9c AM	273	case CPU_UP_PREPARE:
c7e38a9c AM	274	case CPU_UP_PREPARE_FROZEN:
38ef6d19	275	mutex_lock(&therm_cpu_lock);
51e3c1b5	276	err = thermal_throttle_add_dev(sys_dev, cpu);
38ef6d19	277	mutex_unlock(&therm_cpu_lock);
6569345a	278	WARN_ON(err);
3222b36f	279	break;
c7e38a9c AM	280	case CPU_UP_CANCELED:
c7e38a9c AM	281	case CPU_UP_CANCELED_FROZEN:
3222b36f	282	case CPU_DEAD:
8bb78442	283	case CPU_DEAD_FROZEN:
38ef6d19	284	mutex_lock(&therm_cpu_lock);
3222b36f	285	thermal_throttle_remove_dev(sys_dev);
38ef6d19	286	mutex_unlock(&therm_cpu_lock);
3222b36f DZ	287	break;
3222b36f DZ	288	}
a94247e7	289	return notifier_from_errno(err);
3222b36f DZ	290	}
3222b36f DZ	291
25d1b516	292	static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
3222b36f DZ	293	{
	294	.notifier_call = thermal_throttle_cpu_callback,
	295	};
3222b36f DZ	296
	297	static __init int thermal_throttle_init_device(void)
	298	{
	299	unsigned int cpu = 0;
6569345a	300	int err;
3222b36f DZ	301
	302	if (!atomic_read(&therm_throt_en))
	303	return 0;
	304
	305	register_hotcpu_notifier(&thermal_throttle_cpu_notifier);
	306
	307	#ifdef CONFIG_HOTPLUG_CPU
	308	mutex_lock(&therm_cpu_lock);
	309	#endif
	310	/* connect live CPUs to sysfs */
6569345a	311	for_each_online_cpu(cpu) {
51e3c1b5	312	err = thermal_throttle_add_dev(get_cpu_sysdev(cpu), cpu);
6569345a SH	313	WARN_ON(err);
6569345a SH	314	}
3222b36f DZ	315	#ifdef CONFIG_HOTPLUG_CPU
	316	mutex_unlock(&therm_cpu_lock);
	317	#endif
	318
	319	return 0;
	320	}
3222b36f	321	device_initcall(thermal_throttle_init_device);
a65c88dd	322
3222b36f	323	#endif /* CONFIG_SYSFS */
a65c88dd	324
0199114c FY	325	/*
	326	* Set up the most two significant bit to notify mce log that this thermal
	327	* event type.
	328	* This is a temp solution. May be changed in the future with mce log
	329	* infrasture.
	330	*/
	331	#define CORE_THROTTLED (0)
	332	#define CORE_POWER_LIMIT ((__u64)1 << 62)
	333	#define PACKAGE_THROTTLED ((__u64)2 << 62)
	334	#define PACKAGE_POWER_LIMIT ((__u64)3 << 62)
	335
9e76a97e D	336	static void notify_thresholds(__u64 msr_val)
	337	{
	338	/* check whether the interrupt handler is defined;
	339	* otherwise simply return
	340	*/
	341	if (!platform_thermal_notify)
	342	return;
	343
	344	/* lower threshold reached */
	345	if ((msr_val & THERM_LOG_THRESHOLD0) && thresh_event_valid(0))
	346	platform_thermal_notify(msr_val);
	347	/* higher threshold reached */
	348	if ((msr_val & THERM_LOG_THRESHOLD1) && thresh_event_valid(1))
	349	platform_thermal_notify(msr_val);
	350	}
	351
a65c88dd	352	/* Thermal transition interrupt handler */
8363fc82	353	static void intel_thermal_interrupt(void)
a65c88dd HS	354	{
	355	__u64 msr_val;
	356
	357	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
0199114c	358
9e76a97e D	359	/* Check for violation of core thermal thresholds*/
	360	notify_thresholds(msr_val);
	361
55d435a2	362	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
0199114c	363	THERMAL_THROTTLING_EVENT,
55d435a2	364	CORE_LEVEL) != 0)
0199114c FY	365	mce_log_therm_throt_event(CORE_THROTTLED \| msr_val);
0199114c FY	366
fe504213	367	if (this_cpu_has(X86_FEATURE_PLN))
0199114c FY	368	if (therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
	369	POWER_LIMIT_EVENT,
	370	CORE_LEVEL) != 0)
	371	mce_log_therm_throt_event(CORE_POWER_LIMIT \| msr_val);
55d435a2	372
fe504213	373	if (this_cpu_has(X86_FEATURE_PTS)) {
55d435a2 FY	374	rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
55d435a2 FY	375	if (therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
0199114c	376	THERMAL_THROTTLING_EVENT,
55d435a2	377	PACKAGE_LEVEL) != 0)
0199114c	378	mce_log_therm_throt_event(PACKAGE_THROTTLED \| msr_val);
fe504213	379	if (this_cpu_has(X86_FEATURE_PLN))
0199114c FY	380	if (therm_throt_process(msr_val &
	381	PACKAGE_THERM_STATUS_POWER_LIMIT,
	382	POWER_LIMIT_EVENT,
	383	PACKAGE_LEVEL) != 0)
	384	mce_log_therm_throt_event(PACKAGE_POWER_LIMIT
	385	\| msr_val);
55d435a2	386	}
a65c88dd HS	387	}
	388
	389	static void unexpected_thermal_interrupt(void)
	390	{
592091c0	391	printk(KERN_ERR "CPU%d: Unexpected LVT thermal interrupt!\n",
a65c88dd	392	smp_processor_id());
a65c88dd HS	393	}
	394
	395	static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
	396
	397	asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
	398	{
	399	exit_idle();
	400	irq_enter();
	401	inc_irq_stat(irq_thermal_count);
	402	smp_thermal_vector();
	403	irq_exit();
	404	/* Ack only at the end to avoid potential reentry */
	405	ack_APIC_irq();
	406	}
	407
70fe4407 HS	408	/* Thermal monitoring depends on APIC, ACPI and clock modulation */
	409	static int intel_thermal_supported(struct cpuinfo_x86 *c)
	410	{
	411	if (!cpu_has_apic)
	412	return 0;
	413	if (!cpu_has(c, X86_FEATURE_ACPI) \|\| !cpu_has(c, X86_FEATURE_ACC))
	414	return 0;
	415	return 1;
	416	}
	417
ce6b5d76	418	void __init mcheck_intel_therm_init(void)
a2202aa2 YW	419	{
	420	/*
	421	* This function is only called on boot CPU. Save the init thermal
	422	* LVT value on BSP and use that value to restore APs' thermal LVT
	423	* entry BIOS programmed later
	424	*/
70fe4407	425	if (intel_thermal_supported(&boot_cpu_data))
a2202aa2 YW	426	lvtthmr_init = apic_read(APIC_LVTTHMR);
	427	}
	428
cffd377e	429	void intel_init_thermal(struct cpuinfo_x86 *c)
895287c0 HS	430	{
	431	unsigned int cpu = smp_processor_id();
	432	int tm2 = 0;
	433	u32 l, h;
	434
70fe4407	435	if (!intel_thermal_supported(c))
895287c0 HS	436	return;
	437
	438	/*
	439	* First check if its enabled already, in which case there might
	440	* be some SMM goo which handles it, so we can't even put a handler
	441	* since it might be delivered via SMI already:
	442	*/
	443	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
a2202aa2	444
e503f9e4	445	h = lvtthmr_init;
a2202aa2 YW	446	/*
	447	* The initial value of thermal LVT entries on all APs always reads
	448	* 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
	449	* sequence to them and LVT registers are reset to 0s except for
	450	* the mask bits which are set to 1s when APs receive INIT IPI.
e503f9e4 YS	451	* If BIOS takes over the thermal interrupt and sets its interrupt
	452	* delivery mode to SMI (not fixed), it restores the value that the
	453	* BIOS has programmed on AP based on BSP's info we saved since BIOS
	454	* is always setting the same value for all threads/cores.
a2202aa2	455	*/
e503f9e4 YS	456	if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
e503f9e4 YS	457	apic_write(APIC_LVTTHMR, lvtthmr_init);
a2202aa2	458
a2202aa2	459
895287c0 HS	460	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
	461	printk(KERN_DEBUG
	462	"CPU%d: Thermal monitoring handled by SMI\n", cpu);
	463	return;
	464	}
	465
895287c0 HS	466	/* Check whether a vector already exists */
	467	if (h & APIC_VECTOR_MASK) {
	468	printk(KERN_DEBUG
	469	"CPU%d: Thermal LVT vector (%#x) already installed\n",
	470	cpu, (h & APIC_VECTOR_MASK));
	471	return;
	472	}
	473
f3a0867b BZ	474	/* early Pentium M models use different method for enabling TM2 */
	475	if (cpu_has(c, X86_FEATURE_TM2)) {
	476	if (c->x86 == 6 && (c->x86_model == 9 \|\| c->x86_model == 13)) {
	477	rdmsr(MSR_THERM2_CTL, l, h);
	478	if (l & MSR_THERM2_CTL_TM_SELECT)
	479	tm2 = 1;
	480	} else if (l & MSR_IA32_MISC_ENABLE_TM2)
	481	tm2 = 1;
	482	}
	483
895287c0 HS	484	/* We'll mask the thermal vector in the lapic till we're ready: */
	485	h = THERMAL_APIC_VECTOR \| APIC_DM_FIXED \| APIC_LVT_MASKED;
	486	apic_write(APIC_LVTTHMR, h);
	487
	488	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
0199114c FY	489	if (cpu_has(c, X86_FEATURE_PLN))
	490	wrmsr(MSR_IA32_THERM_INTERRUPT,
	491	l \| (THERM_INT_LOW_ENABLE
	492	\| THERM_INT_HIGH_ENABLE \| THERM_INT_PLN_ENABLE), h);
	493	else
	494	wrmsr(MSR_IA32_THERM_INTERRUPT,
	495	l \| (THERM_INT_LOW_ENABLE \| THERM_INT_HIGH_ENABLE), h);
895287c0	496
55d435a2 FY	497	if (cpu_has(c, X86_FEATURE_PTS)) {
55d435a2 FY	498	rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
0199114c FY	499	if (cpu_has(c, X86_FEATURE_PLN))
	500	wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
	501	l \| (PACKAGE_THERM_INT_LOW_ENABLE
	502	\| PACKAGE_THERM_INT_HIGH_ENABLE
	503	\| PACKAGE_THERM_INT_PLN_ENABLE), h);
	504	else
	505	wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
	506	l \| (PACKAGE_THERM_INT_LOW_ENABLE
	507	\| PACKAGE_THERM_INT_HIGH_ENABLE), h);
55d435a2 FY	508	}
55d435a2 FY	509
8363fc82	510	smp_thermal_vector = intel_thermal_interrupt;
895287c0 HS	511
	512	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	513	wrmsr(MSR_IA32_MISC_ENABLE, l \| MSR_IA32_MISC_ENABLE_TM1, h);
	514
	515	/* Unmask the thermal vector: */
	516	l = apic_read(APIC_LVTTHMR);
	517	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
	518
2eaad1fd MT	519	printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
2eaad1fd MT	520	tm2 ? "TM2" : "TM1");
895287c0 HS	521
	522	/* enable thermal throttle processing */
	523	atomic_set(&therm_throt_en, 1);
	524	}