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ec400dde FY |
1 | /* |
2 | * Intel CPU microcode early update for Linux | |
3 | * | |
4 | * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> | |
5 | * H Peter Anvin" <hpa@zytor.com> | |
6 | * | |
7 | * This allows to early upgrade microcode on Intel processors | |
8 | * belonging to IA-32 family - PentiumPro, Pentium II, | |
9 | * Pentium III, Xeon, Pentium 4, etc. | |
10 | * | |
11 | * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture | |
12 | * Software Developer's Manual. | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or | |
15 | * modify it under the terms of the GNU General Public License | |
16 | * as published by the Free Software Foundation; either version | |
17 | * 2 of the License, or (at your option) any later version. | |
18 | */ | |
19 | #include <linux/module.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/earlycpio.h> | |
23 | #include <linux/initrd.h> | |
24 | #include <linux/cpu.h> | |
25 | #include <asm/msr.h> | |
26 | #include <asm/microcode_intel.h> | |
27 | #include <asm/processor.h> | |
28 | #include <asm/tlbflush.h> | |
29 | #include <asm/setup.h> | |
30 | ||
05a5f76d HMH |
31 | static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT]; |
32 | static struct mc_saved_data { | |
ec400dde FY |
33 | unsigned int mc_saved_count; |
34 | struct microcode_intel **mc_saved; | |
35 | } mc_saved_data; | |
36 | ||
148f9bb8 | 37 | static enum ucode_state |
ec400dde FY |
38 | generic_load_microcode_early(struct microcode_intel **mc_saved_p, |
39 | unsigned int mc_saved_count, | |
40 | struct ucode_cpu_info *uci) | |
41 | { | |
42 | struct microcode_intel *ucode_ptr, *new_mc = NULL; | |
43 | int new_rev = uci->cpu_sig.rev; | |
44 | enum ucode_state state = UCODE_OK; | |
45 | unsigned int mc_size; | |
46 | struct microcode_header_intel *mc_header; | |
47 | unsigned int csig = uci->cpu_sig.sig; | |
48 | unsigned int cpf = uci->cpu_sig.pf; | |
49 | int i; | |
50 | ||
51 | for (i = 0; i < mc_saved_count; i++) { | |
52 | ucode_ptr = mc_saved_p[i]; | |
53 | ||
54 | mc_header = (struct microcode_header_intel *)ucode_ptr; | |
55 | mc_size = get_totalsize(mc_header); | |
56 | if (get_matching_microcode(csig, cpf, ucode_ptr, new_rev)) { | |
57 | new_rev = mc_header->rev; | |
58 | new_mc = ucode_ptr; | |
59 | } | |
60 | } | |
61 | ||
62 | if (!new_mc) { | |
63 | state = UCODE_NFOUND; | |
64 | goto out; | |
65 | } | |
66 | ||
67 | uci->mc = (struct microcode_intel *)new_mc; | |
68 | out: | |
69 | return state; | |
70 | } | |
71 | ||
148f9bb8 | 72 | static void |
ec400dde FY |
73 | microcode_pointer(struct microcode_intel **mc_saved, |
74 | unsigned long *mc_saved_in_initrd, | |
75 | unsigned long initrd_start, int mc_saved_count) | |
76 | { | |
77 | int i; | |
78 | ||
79 | for (i = 0; i < mc_saved_count; i++) | |
80 | mc_saved[i] = (struct microcode_intel *) | |
81 | (mc_saved_in_initrd[i] + initrd_start); | |
82 | } | |
83 | ||
84 | #ifdef CONFIG_X86_32 | |
148f9bb8 | 85 | static void |
ec400dde FY |
86 | microcode_phys(struct microcode_intel **mc_saved_tmp, |
87 | struct mc_saved_data *mc_saved_data) | |
88 | { | |
89 | int i; | |
90 | struct microcode_intel ***mc_saved; | |
91 | ||
92 | mc_saved = (struct microcode_intel ***) | |
c83a9d5e | 93 | __pa_nodebug(&mc_saved_data->mc_saved); |
ec400dde FY |
94 | for (i = 0; i < mc_saved_data->mc_saved_count; i++) { |
95 | struct microcode_intel *p; | |
96 | ||
97 | p = *(struct microcode_intel **) | |
c83a9d5e FY |
98 | __pa_nodebug(mc_saved_data->mc_saved + i); |
99 | mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p); | |
ec400dde FY |
100 | } |
101 | } | |
102 | #endif | |
103 | ||
148f9bb8 | 104 | static enum ucode_state |
ec400dde FY |
105 | load_microcode(struct mc_saved_data *mc_saved_data, |
106 | unsigned long *mc_saved_in_initrd, | |
107 | unsigned long initrd_start, | |
108 | struct ucode_cpu_info *uci) | |
109 | { | |
110 | struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; | |
111 | unsigned int count = mc_saved_data->mc_saved_count; | |
112 | ||
113 | if (!mc_saved_data->mc_saved) { | |
114 | microcode_pointer(mc_saved_tmp, mc_saved_in_initrd, | |
115 | initrd_start, count); | |
116 | ||
117 | return generic_load_microcode_early(mc_saved_tmp, count, uci); | |
118 | } else { | |
119 | #ifdef CONFIG_X86_32 | |
120 | microcode_phys(mc_saved_tmp, mc_saved_data); | |
121 | return generic_load_microcode_early(mc_saved_tmp, count, uci); | |
122 | #else | |
123 | return generic_load_microcode_early(mc_saved_data->mc_saved, | |
124 | count, uci); | |
125 | #endif | |
126 | } | |
127 | } | |
128 | ||
129 | static u8 get_x86_family(unsigned long sig) | |
130 | { | |
131 | u8 x86; | |
132 | ||
133 | x86 = (sig >> 8) & 0xf; | |
134 | ||
135 | if (x86 == 0xf) | |
136 | x86 += (sig >> 20) & 0xff; | |
137 | ||
138 | return x86; | |
139 | } | |
140 | ||
141 | static u8 get_x86_model(unsigned long sig) | |
142 | { | |
143 | u8 x86, x86_model; | |
144 | ||
145 | x86 = get_x86_family(sig); | |
146 | x86_model = (sig >> 4) & 0xf; | |
147 | ||
148 | if (x86 == 0x6 || x86 == 0xf) | |
149 | x86_model += ((sig >> 16) & 0xf) << 4; | |
150 | ||
151 | return x86_model; | |
152 | } | |
153 | ||
154 | /* | |
155 | * Given CPU signature and a microcode patch, this function finds if the | |
156 | * microcode patch has matching family and model with the CPU. | |
157 | */ | |
158 | static enum ucode_state | |
159 | matching_model_microcode(struct microcode_header_intel *mc_header, | |
160 | unsigned long sig) | |
161 | { | |
162 | u8 x86, x86_model; | |
163 | u8 x86_ucode, x86_model_ucode; | |
164 | struct extended_sigtable *ext_header; | |
165 | unsigned long total_size = get_totalsize(mc_header); | |
166 | unsigned long data_size = get_datasize(mc_header); | |
167 | int ext_sigcount, i; | |
168 | struct extended_signature *ext_sig; | |
169 | ||
170 | x86 = get_x86_family(sig); | |
171 | x86_model = get_x86_model(sig); | |
172 | ||
173 | x86_ucode = get_x86_family(mc_header->sig); | |
174 | x86_model_ucode = get_x86_model(mc_header->sig); | |
175 | ||
176 | if (x86 == x86_ucode && x86_model == x86_model_ucode) | |
177 | return UCODE_OK; | |
178 | ||
179 | /* Look for ext. headers: */ | |
180 | if (total_size <= data_size + MC_HEADER_SIZE) | |
181 | return UCODE_NFOUND; | |
182 | ||
d496a002 | 183 | ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE; |
ec400dde FY |
184 | ext_sigcount = ext_header->count; |
185 | ext_sig = (void *)ext_header + EXT_HEADER_SIZE; | |
186 | ||
187 | for (i = 0; i < ext_sigcount; i++) { | |
188 | x86_ucode = get_x86_family(ext_sig->sig); | |
189 | x86_model_ucode = get_x86_model(ext_sig->sig); | |
190 | ||
191 | if (x86 == x86_ucode && x86_model == x86_model_ucode) | |
192 | return UCODE_OK; | |
193 | ||
194 | ext_sig++; | |
195 | } | |
196 | ||
197 | return UCODE_NFOUND; | |
198 | } | |
199 | ||
200 | static int | |
201 | save_microcode(struct mc_saved_data *mc_saved_data, | |
202 | struct microcode_intel **mc_saved_src, | |
203 | unsigned int mc_saved_count) | |
204 | { | |
205 | int i, j; | |
f9524e6f | 206 | struct microcode_intel **saved_ptr; |
ec400dde FY |
207 | int ret; |
208 | ||
209 | if (!mc_saved_count) | |
210 | return -EINVAL; | |
211 | ||
212 | /* | |
213 | * Copy new microcode data. | |
214 | */ | |
f9524e6f BP |
215 | saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL); |
216 | if (!saved_ptr) | |
ec400dde FY |
217 | return -ENOMEM; |
218 | ||
219 | for (i = 0; i < mc_saved_count; i++) { | |
f9524e6f BP |
220 | struct microcode_header_intel *mc_hdr; |
221 | struct microcode_intel *mc; | |
222 | unsigned long size; | |
223 | ||
ec400dde FY |
224 | if (!mc_saved_src[i]) { |
225 | ret = -EINVAL; | |
226 | goto err; | |
227 | } | |
f9524e6f BP |
228 | |
229 | mc = mc_saved_src[i]; | |
230 | mc_hdr = &mc->hdr; | |
231 | size = get_totalsize(mc_hdr); | |
232 | ||
233 | saved_ptr[i] = kmalloc(size, GFP_KERNEL); | |
234 | if (!saved_ptr[i]) { | |
235 | ret = -ENOMEM; | |
236 | goto err; | |
237 | } | |
238 | ||
239 | memcpy(saved_ptr[i], mc, size); | |
ec400dde FY |
240 | } |
241 | ||
242 | /* | |
243 | * Point to newly saved microcode. | |
244 | */ | |
f9524e6f | 245 | mc_saved_data->mc_saved = saved_ptr; |
ec400dde FY |
246 | mc_saved_data->mc_saved_count = mc_saved_count; |
247 | ||
248 | return 0; | |
249 | ||
250 | err: | |
251 | for (j = 0; j <= i; j++) | |
f9524e6f BP |
252 | kfree(saved_ptr[j]); |
253 | kfree(saved_ptr); | |
ec400dde FY |
254 | |
255 | return ret; | |
256 | } | |
257 | ||
258 | /* | |
259 | * A microcode patch in ucode_ptr is saved into mc_saved | |
260 | * - if it has matching signature and newer revision compared to an existing | |
261 | * patch mc_saved. | |
262 | * - or if it is a newly discovered microcode patch. | |
263 | * | |
264 | * The microcode patch should have matching model with CPU. | |
265 | */ | |
266 | static void _save_mc(struct microcode_intel **mc_saved, u8 *ucode_ptr, | |
267 | unsigned int *mc_saved_count_p) | |
268 | { | |
269 | int i; | |
270 | int found = 0; | |
271 | unsigned int mc_saved_count = *mc_saved_count_p; | |
272 | struct microcode_header_intel *mc_header; | |
273 | ||
274 | mc_header = (struct microcode_header_intel *)ucode_ptr; | |
275 | for (i = 0; i < mc_saved_count; i++) { | |
276 | unsigned int sig, pf; | |
277 | unsigned int new_rev; | |
278 | struct microcode_header_intel *mc_saved_header = | |
279 | (struct microcode_header_intel *)mc_saved[i]; | |
280 | sig = mc_saved_header->sig; | |
281 | pf = mc_saved_header->pf; | |
282 | new_rev = mc_header->rev; | |
283 | ||
284 | if (get_matching_sig(sig, pf, ucode_ptr, new_rev)) { | |
285 | found = 1; | |
286 | if (update_match_revision(mc_header, new_rev)) { | |
287 | /* | |
288 | * Found an older ucode saved before. | |
289 | * Replace the older one with this newer | |
290 | * one. | |
291 | */ | |
292 | mc_saved[i] = | |
293 | (struct microcode_intel *)ucode_ptr; | |
294 | break; | |
295 | } | |
296 | } | |
297 | } | |
298 | if (i >= mc_saved_count && !found) | |
299 | /* | |
300 | * This ucode is first time discovered in ucode file. | |
301 | * Save it to memory. | |
302 | */ | |
303 | mc_saved[mc_saved_count++] = | |
304 | (struct microcode_intel *)ucode_ptr; | |
305 | ||
306 | *mc_saved_count_p = mc_saved_count; | |
307 | } | |
308 | ||
309 | /* | |
310 | * Get microcode matching with BSP's model. Only CPUs with the same model as | |
311 | * BSP can stay in the platform. | |
312 | */ | |
313 | static enum ucode_state __init | |
314 | get_matching_model_microcode(int cpu, unsigned long start, | |
315 | void *data, size_t size, | |
316 | struct mc_saved_data *mc_saved_data, | |
317 | unsigned long *mc_saved_in_initrd, | |
318 | struct ucode_cpu_info *uci) | |
319 | { | |
320 | u8 *ucode_ptr = data; | |
321 | unsigned int leftover = size; | |
322 | enum ucode_state state = UCODE_OK; | |
323 | unsigned int mc_size; | |
324 | struct microcode_header_intel *mc_header; | |
325 | struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; | |
326 | unsigned int mc_saved_count = mc_saved_data->mc_saved_count; | |
327 | int i; | |
328 | ||
f84598bd | 329 | while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) { |
35a9ff4e QC |
330 | |
331 | if (leftover < sizeof(mc_header)) | |
332 | break; | |
333 | ||
ec400dde FY |
334 | mc_header = (struct microcode_header_intel *)ucode_ptr; |
335 | ||
336 | mc_size = get_totalsize(mc_header); | |
337 | if (!mc_size || mc_size > leftover || | |
338 | microcode_sanity_check(ucode_ptr, 0) < 0) | |
339 | break; | |
340 | ||
341 | leftover -= mc_size; | |
342 | ||
343 | /* | |
344 | * Since APs with same family and model as the BSP may boot in | |
345 | * the platform, we need to find and save microcode patches | |
346 | * with the same family and model as the BSP. | |
347 | */ | |
348 | if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != | |
349 | UCODE_OK) { | |
350 | ucode_ptr += mc_size; | |
351 | continue; | |
352 | } | |
353 | ||
354 | _save_mc(mc_saved_tmp, ucode_ptr, &mc_saved_count); | |
355 | ||
356 | ucode_ptr += mc_size; | |
357 | } | |
358 | ||
359 | if (leftover) { | |
360 | state = UCODE_ERROR; | |
361 | goto out; | |
362 | } | |
363 | ||
364 | if (mc_saved_count == 0) { | |
365 | state = UCODE_NFOUND; | |
366 | goto out; | |
367 | } | |
368 | ||
369 | for (i = 0; i < mc_saved_count; i++) | |
370 | mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start; | |
371 | ||
372 | mc_saved_data->mc_saved_count = mc_saved_count; | |
373 | out: | |
374 | return state; | |
375 | } | |
376 | ||
148f9bb8 | 377 | static int collect_cpu_info_early(struct ucode_cpu_info *uci) |
ec400dde FY |
378 | { |
379 | unsigned int val[2]; | |
380 | u8 x86, x86_model; | |
381 | struct cpu_signature csig; | |
382 | unsigned int eax, ebx, ecx, edx; | |
383 | ||
384 | csig.sig = 0; | |
385 | csig.pf = 0; | |
386 | csig.rev = 0; | |
387 | ||
388 | memset(uci, 0, sizeof(*uci)); | |
389 | ||
390 | eax = 0x00000001; | |
391 | ecx = 0; | |
392 | native_cpuid(&eax, &ebx, &ecx, &edx); | |
393 | csig.sig = eax; | |
394 | ||
395 | x86 = get_x86_family(csig.sig); | |
396 | x86_model = get_x86_model(csig.sig); | |
397 | ||
398 | if ((x86_model >= 5) || (x86 > 6)) { | |
399 | /* get processor flags from MSR 0x17 */ | |
400 | native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); | |
401 | csig.pf = 1 << ((val[1] >> 18) & 7); | |
402 | } | |
403 | native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
404 | ||
405 | /* As documented in the SDM: Do a CPUID 1 here */ | |
406 | sync_core(); | |
407 | ||
408 | /* get the current revision from MSR 0x8B */ | |
409 | native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); | |
410 | ||
411 | csig.rev = val[1]; | |
412 | ||
413 | uci->cpu_sig = csig; | |
414 | uci->valid = 1; | |
415 | ||
416 | return 0; | |
417 | } | |
418 | ||
419 | #ifdef DEBUG | |
420 | static void __ref show_saved_mc(void) | |
421 | { | |
422 | int i, j; | |
423 | unsigned int sig, pf, rev, total_size, data_size, date; | |
424 | struct ucode_cpu_info uci; | |
425 | ||
426 | if (mc_saved_data.mc_saved_count == 0) { | |
f99b45c3 | 427 | pr_debug("no microcode data saved.\n"); |
ec400dde FY |
428 | return; |
429 | } | |
430 | pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count); | |
431 | ||
432 | collect_cpu_info_early(&uci); | |
433 | ||
434 | sig = uci.cpu_sig.sig; | |
435 | pf = uci.cpu_sig.pf; | |
436 | rev = uci.cpu_sig.rev; | |
437 | pr_debug("CPU%d: sig=0x%x, pf=0x%x, rev=0x%x\n", | |
438 | smp_processor_id(), sig, pf, rev); | |
439 | ||
440 | for (i = 0; i < mc_saved_data.mc_saved_count; i++) { | |
441 | struct microcode_header_intel *mc_saved_header; | |
442 | struct extended_sigtable *ext_header; | |
443 | int ext_sigcount; | |
444 | struct extended_signature *ext_sig; | |
445 | ||
446 | mc_saved_header = (struct microcode_header_intel *) | |
447 | mc_saved_data.mc_saved[i]; | |
448 | sig = mc_saved_header->sig; | |
449 | pf = mc_saved_header->pf; | |
450 | rev = mc_saved_header->rev; | |
451 | total_size = get_totalsize(mc_saved_header); | |
452 | data_size = get_datasize(mc_saved_header); | |
453 | date = mc_saved_header->date; | |
454 | ||
455 | pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n", | |
456 | i, sig, pf, rev, total_size, | |
457 | date & 0xffff, | |
458 | date >> 24, | |
459 | (date >> 16) & 0xff); | |
460 | ||
461 | /* Look for ext. headers: */ | |
462 | if (total_size <= data_size + MC_HEADER_SIZE) | |
463 | continue; | |
464 | ||
d496a002 | 465 | ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE; |
ec400dde FY |
466 | ext_sigcount = ext_header->count; |
467 | ext_sig = (void *)ext_header + EXT_HEADER_SIZE; | |
468 | ||
469 | for (j = 0; j < ext_sigcount; j++) { | |
470 | sig = ext_sig->sig; | |
471 | pf = ext_sig->pf; | |
472 | ||
473 | pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n", | |
474 | j, sig, pf); | |
475 | ||
476 | ext_sig++; | |
477 | } | |
478 | ||
479 | } | |
480 | } | |
481 | #else | |
482 | static inline void show_saved_mc(void) | |
483 | { | |
484 | } | |
485 | #endif | |
486 | ||
487 | #if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU) | |
074d72ff | 488 | static DEFINE_MUTEX(x86_cpu_microcode_mutex); |
ec400dde FY |
489 | /* |
490 | * Save this mc into mc_saved_data. So it will be loaded early when a CPU is | |
491 | * hot added or resumes. | |
492 | * | |
493 | * Please make sure this mc should be a valid microcode patch before calling | |
494 | * this function. | |
495 | */ | |
496 | int save_mc_for_early(u8 *mc) | |
497 | { | |
498 | struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; | |
499 | unsigned int mc_saved_count_init; | |
500 | unsigned int mc_saved_count; | |
501 | struct microcode_intel **mc_saved; | |
502 | int ret = 0; | |
503 | int i; | |
504 | ||
505 | /* | |
506 | * Hold hotplug lock so mc_saved_data is not accessed by a CPU in | |
507 | * hotplug. | |
508 | */ | |
074d72ff | 509 | mutex_lock(&x86_cpu_microcode_mutex); |
ec400dde FY |
510 | |
511 | mc_saved_count_init = mc_saved_data.mc_saved_count; | |
512 | mc_saved_count = mc_saved_data.mc_saved_count; | |
513 | mc_saved = mc_saved_data.mc_saved; | |
514 | ||
515 | if (mc_saved && mc_saved_count) | |
516 | memcpy(mc_saved_tmp, mc_saved, | |
f99b45c3 | 517 | mc_saved_count * sizeof(struct microcode_intel *)); |
ec400dde FY |
518 | /* |
519 | * Save the microcode patch mc in mc_save_tmp structure if it's a newer | |
520 | * version. | |
521 | */ | |
522 | ||
523 | _save_mc(mc_saved_tmp, mc, &mc_saved_count); | |
524 | ||
525 | /* | |
526 | * Save the mc_save_tmp in global mc_saved_data. | |
527 | */ | |
528 | ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count); | |
529 | if (ret) { | |
83b325f1 | 530 | pr_err("Cannot save microcode patch.\n"); |
ec400dde FY |
531 | goto out; |
532 | } | |
533 | ||
534 | show_saved_mc(); | |
535 | ||
536 | /* | |
f99b45c3 | 537 | * Free old saved microcode data. |
ec400dde FY |
538 | */ |
539 | if (mc_saved) { | |
540 | for (i = 0; i < mc_saved_count_init; i++) | |
541 | kfree(mc_saved[i]); | |
542 | kfree(mc_saved); | |
543 | } | |
544 | ||
545 | out: | |
074d72ff | 546 | mutex_unlock(&x86_cpu_microcode_mutex); |
ec400dde FY |
547 | |
548 | return ret; | |
549 | } | |
550 | EXPORT_SYMBOL_GPL(save_mc_for_early); | |
551 | #endif | |
552 | ||
553 | static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin"; | |
554 | static __init enum ucode_state | |
555 | scan_microcode(unsigned long start, unsigned long end, | |
556 | struct mc_saved_data *mc_saved_data, | |
557 | unsigned long *mc_saved_in_initrd, | |
558 | struct ucode_cpu_info *uci) | |
559 | { | |
560 | unsigned int size = end - start + 1; | |
561 | struct cpio_data cd; | |
562 | long offset = 0; | |
563 | #ifdef CONFIG_X86_32 | |
c83a9d5e | 564 | char *p = (char *)__pa_nodebug(ucode_name); |
ec400dde FY |
565 | #else |
566 | char *p = ucode_name; | |
567 | #endif | |
568 | ||
569 | cd.data = NULL; | |
570 | cd.size = 0; | |
571 | ||
572 | cd = find_cpio_data(p, (void *)start, size, &offset); | |
573 | if (!cd.data) | |
574 | return UCODE_ERROR; | |
575 | ||
576 | ||
577 | return get_matching_model_microcode(0, start, cd.data, cd.size, | |
578 | mc_saved_data, mc_saved_in_initrd, | |
579 | uci); | |
580 | } | |
581 | ||
582 | /* | |
583 | * Print ucode update info. | |
584 | */ | |
148f9bb8 | 585 | static void |
ec400dde FY |
586 | print_ucode_info(struct ucode_cpu_info *uci, unsigned int date) |
587 | { | |
588 | int cpu = smp_processor_id(); | |
589 | ||
590 | pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n", | |
591 | cpu, | |
592 | uci->cpu_sig.rev, | |
593 | date & 0xffff, | |
594 | date >> 24, | |
595 | (date >> 16) & 0xff); | |
596 | } | |
597 | ||
598 | #ifdef CONFIG_X86_32 | |
599 | ||
600 | static int delay_ucode_info; | |
601 | static int current_mc_date; | |
602 | ||
603 | /* | |
604 | * Print early updated ucode info after printk works. This is delayed info dump. | |
605 | */ | |
148f9bb8 | 606 | void show_ucode_info_early(void) |
ec400dde FY |
607 | { |
608 | struct ucode_cpu_info uci; | |
609 | ||
610 | if (delay_ucode_info) { | |
611 | collect_cpu_info_early(&uci); | |
612 | print_ucode_info(&uci, current_mc_date); | |
613 | delay_ucode_info = 0; | |
614 | } | |
615 | } | |
616 | ||
617 | /* | |
618 | * At this point, we can not call printk() yet. Keep microcode patch number in | |
619 | * mc_saved_data.mc_saved and delay printing microcode info in | |
620 | * show_ucode_info_early() until printk() works. | |
621 | */ | |
148f9bb8 | 622 | static void print_ucode(struct ucode_cpu_info *uci) |
ec400dde FY |
623 | { |
624 | struct microcode_intel *mc_intel; | |
625 | int *delay_ucode_info_p; | |
626 | int *current_mc_date_p; | |
627 | ||
628 | mc_intel = uci->mc; | |
629 | if (mc_intel == NULL) | |
630 | return; | |
631 | ||
c83a9d5e FY |
632 | delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info); |
633 | current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date); | |
ec400dde FY |
634 | |
635 | *delay_ucode_info_p = 1; | |
636 | *current_mc_date_p = mc_intel->hdr.date; | |
637 | } | |
638 | #else | |
639 | ||
640 | /* | |
641 | * Flush global tlb. We only do this in x86_64 where paging has been enabled | |
642 | * already and PGE should be enabled as well. | |
643 | */ | |
148f9bb8 | 644 | static inline void flush_tlb_early(void) |
ec400dde FY |
645 | { |
646 | __native_flush_tlb_global_irq_disabled(); | |
647 | } | |
648 | ||
148f9bb8 | 649 | static inline void print_ucode(struct ucode_cpu_info *uci) |
ec400dde FY |
650 | { |
651 | struct microcode_intel *mc_intel; | |
652 | ||
653 | mc_intel = uci->mc; | |
654 | if (mc_intel == NULL) | |
655 | return; | |
656 | ||
657 | print_ucode_info(uci, mc_intel->hdr.date); | |
658 | } | |
659 | #endif | |
660 | ||
fbae4ba8 | 661 | static int apply_microcode_early(struct ucode_cpu_info *uci, bool early) |
ec400dde FY |
662 | { |
663 | struct microcode_intel *mc_intel; | |
664 | unsigned int val[2]; | |
665 | ||
666 | mc_intel = uci->mc; | |
667 | if (mc_intel == NULL) | |
668 | return 0; | |
669 | ||
670 | /* write microcode via MSR 0x79 */ | |
671 | native_wrmsr(MSR_IA32_UCODE_WRITE, | |
672 | (unsigned long) mc_intel->bits, | |
673 | (unsigned long) mc_intel->bits >> 16 >> 16); | |
674 | native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
675 | ||
676 | /* As documented in the SDM: Do a CPUID 1 here */ | |
677 | sync_core(); | |
678 | ||
679 | /* get the current revision from MSR 0x8B */ | |
680 | native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); | |
681 | if (val[1] != mc_intel->hdr.rev) | |
682 | return -1; | |
683 | ||
684 | #ifdef CONFIG_X86_64 | |
685 | /* Flush global tlb. This is precaution. */ | |
686 | flush_tlb_early(); | |
687 | #endif | |
688 | uci->cpu_sig.rev = val[1]; | |
689 | ||
fbae4ba8 BP |
690 | if (early) |
691 | print_ucode(uci); | |
692 | else | |
693 | print_ucode_info(uci, mc_intel->hdr.date); | |
ec400dde FY |
694 | |
695 | return 0; | |
696 | } | |
697 | ||
698 | /* | |
699 | * This function converts microcode patch offsets previously stored in | |
700 | * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data. | |
701 | */ | |
f2b3ee82 | 702 | int __init save_microcode_in_initrd_intel(void) |
ec400dde FY |
703 | { |
704 | unsigned int count = mc_saved_data.mc_saved_count; | |
705 | struct microcode_intel *mc_saved[MAX_UCODE_COUNT]; | |
706 | int ret = 0; | |
707 | ||
708 | if (count == 0) | |
709 | return ret; | |
710 | ||
711 | microcode_pointer(mc_saved, mc_saved_in_initrd, initrd_start, count); | |
712 | ret = save_microcode(&mc_saved_data, mc_saved, count); | |
713 | if (ret) | |
83b325f1 | 714 | pr_err("Cannot save microcode patches from initrd.\n"); |
ec400dde FY |
715 | |
716 | show_saved_mc(); | |
717 | ||
718 | return ret; | |
719 | } | |
720 | ||
721 | static void __init | |
722 | _load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data, | |
723 | unsigned long *mc_saved_in_initrd, | |
724 | unsigned long initrd_start_early, | |
2d48bb9b | 725 | unsigned long initrd_end_early) |
ec400dde | 726 | { |
2d48bb9b | 727 | struct ucode_cpu_info uci; |
fbae4ba8 BP |
728 | enum ucode_state ret; |
729 | ||
2d48bb9b | 730 | collect_cpu_info_early(&uci); |
ec400dde | 731 | scan_microcode(initrd_start_early, initrd_end_early, mc_saved_data, |
2d48bb9b | 732 | mc_saved_in_initrd, &uci); |
fbae4ba8 BP |
733 | |
734 | ret = load_microcode(mc_saved_data, mc_saved_in_initrd, | |
2d48bb9b | 735 | initrd_start_early, &uci); |
776d3cdc BP |
736 | if (ret != UCODE_OK) |
737 | return; | |
fbae4ba8 | 738 | |
2d48bb9b | 739 | apply_microcode_early(&uci, true); |
ec400dde FY |
740 | } |
741 | ||
742 | void __init | |
743 | load_ucode_intel_bsp(void) | |
744 | { | |
745 | u64 ramdisk_image, ramdisk_size; | |
746 | unsigned long initrd_start_early, initrd_end_early; | |
ec400dde FY |
747 | #ifdef CONFIG_X86_32 |
748 | struct boot_params *boot_params_p; | |
749 | ||
c83a9d5e | 750 | boot_params_p = (struct boot_params *)__pa_nodebug(&boot_params); |
ec400dde FY |
751 | ramdisk_image = boot_params_p->hdr.ramdisk_image; |
752 | ramdisk_size = boot_params_p->hdr.ramdisk_size; | |
753 | initrd_start_early = ramdisk_image; | |
754 | initrd_end_early = initrd_start_early + ramdisk_size; | |
755 | ||
756 | _load_ucode_intel_bsp( | |
c83a9d5e FY |
757 | (struct mc_saved_data *)__pa_nodebug(&mc_saved_data), |
758 | (unsigned long *)__pa_nodebug(&mc_saved_in_initrd), | |
2d48bb9b | 759 | initrd_start_early, initrd_end_early); |
ec400dde FY |
760 | #else |
761 | ramdisk_image = boot_params.hdr.ramdisk_image; | |
762 | ramdisk_size = boot_params.hdr.ramdisk_size; | |
763 | initrd_start_early = ramdisk_image + PAGE_OFFSET; | |
764 | initrd_end_early = initrd_start_early + ramdisk_size; | |
765 | ||
766 | _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, | |
2d48bb9b | 767 | initrd_start_early, initrd_end_early); |
ec400dde FY |
768 | #endif |
769 | } | |
770 | ||
148f9bb8 | 771 | void load_ucode_intel_ap(void) |
ec400dde FY |
772 | { |
773 | struct mc_saved_data *mc_saved_data_p; | |
774 | struct ucode_cpu_info uci; | |
775 | unsigned long *mc_saved_in_initrd_p; | |
776 | unsigned long initrd_start_addr; | |
776d3cdc | 777 | enum ucode_state ret; |
ec400dde FY |
778 | #ifdef CONFIG_X86_32 |
779 | unsigned long *initrd_start_p; | |
780 | ||
781 | mc_saved_in_initrd_p = | |
c83a9d5e FY |
782 | (unsigned long *)__pa_nodebug(mc_saved_in_initrd); |
783 | mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data); | |
784 | initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start); | |
785 | initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p); | |
ec400dde FY |
786 | #else |
787 | mc_saved_data_p = &mc_saved_data; | |
788 | mc_saved_in_initrd_p = mc_saved_in_initrd; | |
789 | initrd_start_addr = initrd_start; | |
790 | #endif | |
791 | ||
792 | /* | |
793 | * If there is no valid ucode previously saved in memory, no need to | |
794 | * update ucode on this AP. | |
795 | */ | |
796 | if (mc_saved_data_p->mc_saved_count == 0) | |
797 | return; | |
798 | ||
799 | collect_cpu_info_early(&uci); | |
776d3cdc BP |
800 | ret = load_microcode(mc_saved_data_p, mc_saved_in_initrd_p, |
801 | initrd_start_addr, &uci); | |
802 | ||
803 | if (ret != UCODE_OK) | |
804 | return; | |
805 | ||
fbae4ba8 BP |
806 | apply_microcode_early(&uci, true); |
807 | } | |
808 | ||
809 | void reload_ucode_intel(void) | |
810 | { | |
811 | struct ucode_cpu_info uci; | |
25cdb9c8 | 812 | enum ucode_state ret; |
fbae4ba8 | 813 | |
25cdb9c8 | 814 | if (!mc_saved_data.mc_saved_count) |
fbae4ba8 BP |
815 | return; |
816 | ||
25cdb9c8 BP |
817 | collect_cpu_info_early(&uci); |
818 | ||
819 | ret = generic_load_microcode_early(mc_saved_data.mc_saved, | |
820 | mc_saved_data.mc_saved_count, &uci); | |
821 | if (ret != UCODE_OK) | |
822 | return; | |
fbae4ba8 BP |
823 | |
824 | apply_microcode_early(&uci, false); | |
ec400dde | 825 | } |