x86/microcode: Unmodularize the microcode driver
[deliverable/linux.git] / arch / x86 / kernel / cpu / microcode / intel_early.c
CommitLineData
ec400dde
FY
1/*
2 * Intel CPU microcode early update for Linux
3 *
4 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
5 * H Peter Anvin" <hpa@zytor.com>
6 *
7 * This allows to early upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
11 * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture
12 * Software Developer's Manual.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
18 */
a858b5e5
BP
19
20/*
21 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
22 * printk calls into no_printk().
23 *
24 *#define DEBUG
25 */
26
ec400dde
FY
27#include <linux/module.h>
28#include <linux/mm.h>
29#include <linux/slab.h>
30#include <linux/earlycpio.h>
31#include <linux/initrd.h>
32#include <linux/cpu.h>
33#include <asm/msr.h>
34#include <asm/microcode_intel.h>
35#include <asm/processor.h>
36#include <asm/tlbflush.h>
37#include <asm/setup.h>
38
a858b5e5
BP
39#undef pr_fmt
40#define pr_fmt(fmt) "microcode: " fmt
41
05a5f76d
HMH
42static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
43static struct mc_saved_data {
ec400dde
FY
44 unsigned int mc_saved_count;
45 struct microcode_intel **mc_saved;
46} mc_saved_data;
47
148f9bb8 48static enum ucode_state
9e02bb46
BP
49load_microcode_early(struct microcode_intel **saved,
50 unsigned int num_saved, struct ucode_cpu_info *uci)
ec400dde
FY
51{
52 struct microcode_intel *ucode_ptr, *new_mc = NULL;
9e02bb46
BP
53 struct microcode_header_intel *mc_hdr;
54 int new_rev, ret, i;
ec400dde 55
9e02bb46 56 new_rev = uci->cpu_sig.rev;
ec400dde 57
9e02bb46
BP
58 for (i = 0; i < num_saved; i++) {
59 ucode_ptr = saved[i];
60 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
61
8de3eafc
BP
62 ret = has_newer_microcode(ucode_ptr,
63 uci->cpu_sig.sig,
64 uci->cpu_sig.pf,
65 new_rev);
9e02bb46
BP
66 if (!ret)
67 continue;
ec400dde 68
9e02bb46
BP
69 new_rev = mc_hdr->rev;
70 new_mc = ucode_ptr;
ec400dde
FY
71 }
72
9e02bb46
BP
73 if (!new_mc)
74 return UCODE_NFOUND;
75
ec400dde 76 uci->mc = (struct microcode_intel *)new_mc;
9e02bb46 77 return UCODE_OK;
ec400dde
FY
78}
79
140f74fc
BP
80static inline void
81copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd,
82 unsigned long off, int num_saved)
ec400dde
FY
83{
84 int i;
85
140f74fc
BP
86 for (i = 0; i < num_saved; i++)
87 mc_saved[i] = (struct microcode_intel *)(initrd[i] + off);
ec400dde
FY
88}
89
90#ifdef CONFIG_X86_32
148f9bb8 91static void
ec400dde
FY
92microcode_phys(struct microcode_intel **mc_saved_tmp,
93 struct mc_saved_data *mc_saved_data)
94{
95 int i;
96 struct microcode_intel ***mc_saved;
97
98 mc_saved = (struct microcode_intel ***)
c83a9d5e 99 __pa_nodebug(&mc_saved_data->mc_saved);
ec400dde
FY
100 for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
101 struct microcode_intel *p;
102
103 p = *(struct microcode_intel **)
c83a9d5e
FY
104 __pa_nodebug(mc_saved_data->mc_saved + i);
105 mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
ec400dde
FY
106 }
107}
108#endif
109
148f9bb8 110static enum ucode_state
140f74fc
BP
111load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
112 unsigned long initrd_start, struct ucode_cpu_info *uci)
ec400dde
FY
113{
114 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
115 unsigned int count = mc_saved_data->mc_saved_count;
116
117 if (!mc_saved_data->mc_saved) {
140f74fc 118 copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
ec400dde 119
9e02bb46 120 return load_microcode_early(mc_saved_tmp, count, uci);
ec400dde
FY
121 } else {
122#ifdef CONFIG_X86_32
123 microcode_phys(mc_saved_tmp, mc_saved_data);
9e02bb46 124 return load_microcode_early(mc_saved_tmp, count, uci);
ec400dde 125#else
9e02bb46 126 return load_microcode_early(mc_saved_data->mc_saved,
ec400dde
FY
127 count, uci);
128#endif
129 }
130}
131
ec400dde
FY
132/*
133 * Given CPU signature and a microcode patch, this function finds if the
134 * microcode patch has matching family and model with the CPU.
135 */
136static enum ucode_state
137matching_model_microcode(struct microcode_header_intel *mc_header,
138 unsigned long sig)
139{
58ce8d6d
BP
140 unsigned int fam, model;
141 unsigned int fam_ucode, model_ucode;
ec400dde
FY
142 struct extended_sigtable *ext_header;
143 unsigned long total_size = get_totalsize(mc_header);
144 unsigned long data_size = get_datasize(mc_header);
145 int ext_sigcount, i;
146 struct extended_signature *ext_sig;
147
58ce8d6d
BP
148 fam = __x86_family(sig);
149 model = x86_model(sig);
ec400dde 150
58ce8d6d
BP
151 fam_ucode = __x86_family(mc_header->sig);
152 model_ucode = x86_model(mc_header->sig);
ec400dde 153
58ce8d6d 154 if (fam == fam_ucode && model == model_ucode)
ec400dde
FY
155 return UCODE_OK;
156
157 /* Look for ext. headers: */
158 if (total_size <= data_size + MC_HEADER_SIZE)
159 return UCODE_NFOUND;
160
58ce8d6d
BP
161 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
162 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
ec400dde 163 ext_sigcount = ext_header->count;
ec400dde
FY
164
165 for (i = 0; i < ext_sigcount; i++) {
58ce8d6d
BP
166 fam_ucode = __x86_family(ext_sig->sig);
167 model_ucode = x86_model(ext_sig->sig);
ec400dde 168
58ce8d6d 169 if (fam == fam_ucode && model == model_ucode)
ec400dde
FY
170 return UCODE_OK;
171
172 ext_sig++;
173 }
ec400dde
FY
174 return UCODE_NFOUND;
175}
176
177static int
178save_microcode(struct mc_saved_data *mc_saved_data,
179 struct microcode_intel **mc_saved_src,
180 unsigned int mc_saved_count)
181{
182 int i, j;
f9524e6f 183 struct microcode_intel **saved_ptr;
ec400dde
FY
184 int ret;
185
186 if (!mc_saved_count)
187 return -EINVAL;
188
189 /*
190 * Copy new microcode data.
191 */
f9524e6f
BP
192 saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL);
193 if (!saved_ptr)
ec400dde
FY
194 return -ENOMEM;
195
196 for (i = 0; i < mc_saved_count; i++) {
f9524e6f
BP
197 struct microcode_header_intel *mc_hdr;
198 struct microcode_intel *mc;
199 unsigned long size;
200
ec400dde
FY
201 if (!mc_saved_src[i]) {
202 ret = -EINVAL;
203 goto err;
204 }
f9524e6f
BP
205
206 mc = mc_saved_src[i];
207 mc_hdr = &mc->hdr;
208 size = get_totalsize(mc_hdr);
209
210 saved_ptr[i] = kmalloc(size, GFP_KERNEL);
211 if (!saved_ptr[i]) {
212 ret = -ENOMEM;
213 goto err;
214 }
215
216 memcpy(saved_ptr[i], mc, size);
ec400dde
FY
217 }
218
219 /*
220 * Point to newly saved microcode.
221 */
f9524e6f 222 mc_saved_data->mc_saved = saved_ptr;
ec400dde
FY
223 mc_saved_data->mc_saved_count = mc_saved_count;
224
225 return 0;
226
227err:
228 for (j = 0; j <= i; j++)
f9524e6f
BP
229 kfree(saved_ptr[j]);
230 kfree(saved_ptr);
ec400dde
FY
231
232 return ret;
233}
234
235/*
236 * A microcode patch in ucode_ptr is saved into mc_saved
237 * - if it has matching signature and newer revision compared to an existing
238 * patch mc_saved.
239 * - or if it is a newly discovered microcode patch.
240 *
241 * The microcode patch should have matching model with CPU.
a5de5e24
BP
242 *
243 * Returns: The updated number @num_saved of saved microcode patches.
ec400dde 244 */
a5de5e24
BP
245static unsigned int _save_mc(struct microcode_intel **mc_saved,
246 u8 *ucode_ptr, unsigned int num_saved)
ec400dde 247{
c868570e 248 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
da9b5076 249 unsigned int sig, pf;
a5de5e24 250 int found = 0, i;
ec400dde 251
c868570e 252 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
a5de5e24
BP
253
254 for (i = 0; i < num_saved; i++) {
c868570e
BP
255 mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
256 sig = mc_saved_hdr->sig;
257 pf = mc_saved_hdr->pf;
c868570e 258
e774eaa9 259 if (!find_matching_signature(ucode_ptr, sig, pf))
c868570e
BP
260 continue;
261
262 found = 1;
263
a1a32d29 264 if (mc_hdr->rev <= mc_saved_hdr->rev)
c868570e 265 continue;
a5de5e24 266
ec400dde 267 /*
c868570e
BP
268 * Found an older ucode saved earlier. Replace it with
269 * this newer one.
ec400dde 270 */
c868570e
BP
271 mc_saved[i] = (struct microcode_intel *)ucode_ptr;
272 break;
273 }
274
275 /* Newly detected microcode, save it to memory. */
276 if (i >= num_saved && !found)
a5de5e24 277 mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
ec400dde 278
a5de5e24 279 return num_saved;
ec400dde
FY
280}
281
282/*
283 * Get microcode matching with BSP's model. Only CPUs with the same model as
284 * BSP can stay in the platform.
285 */
286static enum ucode_state __init
287get_matching_model_microcode(int cpu, unsigned long start,
288 void *data, size_t size,
289 struct mc_saved_data *mc_saved_data,
290 unsigned long *mc_saved_in_initrd,
291 struct ucode_cpu_info *uci)
292{
293 u8 *ucode_ptr = data;
294 unsigned int leftover = size;
295 enum ucode_state state = UCODE_OK;
296 unsigned int mc_size;
297 struct microcode_header_intel *mc_header;
298 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
299 unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
300 int i;
301
f84598bd 302 while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) {
35a9ff4e
QC
303
304 if (leftover < sizeof(mc_header))
305 break;
306
ec400dde
FY
307 mc_header = (struct microcode_header_intel *)ucode_ptr;
308
309 mc_size = get_totalsize(mc_header);
310 if (!mc_size || mc_size > leftover ||
311 microcode_sanity_check(ucode_ptr, 0) < 0)
312 break;
313
314 leftover -= mc_size;
315
316 /*
317 * Since APs with same family and model as the BSP may boot in
318 * the platform, we need to find and save microcode patches
319 * with the same family and model as the BSP.
320 */
321 if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
322 UCODE_OK) {
323 ucode_ptr += mc_size;
324 continue;
325 }
326
a5de5e24 327 mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr, mc_saved_count);
ec400dde
FY
328
329 ucode_ptr += mc_size;
330 }
331
332 if (leftover) {
333 state = UCODE_ERROR;
334 goto out;
335 }
336
337 if (mc_saved_count == 0) {
338 state = UCODE_NFOUND;
339 goto out;
340 }
341
342 for (i = 0; i < mc_saved_count; i++)
343 mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
344
345 mc_saved_data->mc_saved_count = mc_saved_count;
346out:
347 return state;
348}
349
148f9bb8 350static int collect_cpu_info_early(struct ucode_cpu_info *uci)
ec400dde
FY
351{
352 unsigned int val[2];
58ce8d6d 353 unsigned int family, model;
ec400dde
FY
354 struct cpu_signature csig;
355 unsigned int eax, ebx, ecx, edx;
356
357 csig.sig = 0;
358 csig.pf = 0;
359 csig.rev = 0;
360
361 memset(uci, 0, sizeof(*uci));
362
363 eax = 0x00000001;
364 ecx = 0;
365 native_cpuid(&eax, &ebx, &ecx, &edx);
366 csig.sig = eax;
367
58ce8d6d
BP
368 family = __x86_family(csig.sig);
369 model = x86_model(csig.sig);
ec400dde 370
58ce8d6d 371 if ((model >= 5) || (family > 6)) {
ec400dde
FY
372 /* get processor flags from MSR 0x17 */
373 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
374 csig.pf = 1 << ((val[1] >> 18) & 7);
375 }
376 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
377
378 /* As documented in the SDM: Do a CPUID 1 here */
379 sync_core();
380
381 /* get the current revision from MSR 0x8B */
382 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
383
384 csig.rev = val[1];
385
386 uci->cpu_sig = csig;
387 uci->valid = 1;
388
389 return 0;
390}
391
392#ifdef DEBUG
4daa832d 393static void show_saved_mc(void)
ec400dde
FY
394{
395 int i, j;
396 unsigned int sig, pf, rev, total_size, data_size, date;
397 struct ucode_cpu_info uci;
398
399 if (mc_saved_data.mc_saved_count == 0) {
f99b45c3 400 pr_debug("no microcode data saved.\n");
ec400dde
FY
401 return;
402 }
403 pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count);
404
405 collect_cpu_info_early(&uci);
406
407 sig = uci.cpu_sig.sig;
408 pf = uci.cpu_sig.pf;
409 rev = uci.cpu_sig.rev;
a858b5e5 410 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
ec400dde
FY
411
412 for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
413 struct microcode_header_intel *mc_saved_header;
414 struct extended_sigtable *ext_header;
415 int ext_sigcount;
416 struct extended_signature *ext_sig;
417
418 mc_saved_header = (struct microcode_header_intel *)
419 mc_saved_data.mc_saved[i];
420 sig = mc_saved_header->sig;
421 pf = mc_saved_header->pf;
422 rev = mc_saved_header->rev;
423 total_size = get_totalsize(mc_saved_header);
424 data_size = get_datasize(mc_saved_header);
425 date = mc_saved_header->date;
426
427 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
428 i, sig, pf, rev, total_size,
429 date & 0xffff,
430 date >> 24,
431 (date >> 16) & 0xff);
432
433 /* Look for ext. headers: */
434 if (total_size <= data_size + MC_HEADER_SIZE)
435 continue;
436
d496a002 437 ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
ec400dde
FY
438 ext_sigcount = ext_header->count;
439 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
440
441 for (j = 0; j < ext_sigcount; j++) {
442 sig = ext_sig->sig;
443 pf = ext_sig->pf;
444
445 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
446 j, sig, pf);
447
448 ext_sig++;
449 }
450
451 }
452}
453#else
454static inline void show_saved_mc(void)
455{
456}
457#endif
458
459#if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU)
074d72ff 460static DEFINE_MUTEX(x86_cpu_microcode_mutex);
ec400dde
FY
461/*
462 * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
463 * hot added or resumes.
464 *
465 * Please make sure this mc should be a valid microcode patch before calling
466 * this function.
467 */
468int save_mc_for_early(u8 *mc)
469{
470 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
471 unsigned int mc_saved_count_init;
472 unsigned int mc_saved_count;
473 struct microcode_intel **mc_saved;
474 int ret = 0;
475 int i;
476
477 /*
478 * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
479 * hotplug.
480 */
074d72ff 481 mutex_lock(&x86_cpu_microcode_mutex);
ec400dde
FY
482
483 mc_saved_count_init = mc_saved_data.mc_saved_count;
484 mc_saved_count = mc_saved_data.mc_saved_count;
485 mc_saved = mc_saved_data.mc_saved;
486
487 if (mc_saved && mc_saved_count)
488 memcpy(mc_saved_tmp, mc_saved,
f99b45c3 489 mc_saved_count * sizeof(struct microcode_intel *));
ec400dde
FY
490 /*
491 * Save the microcode patch mc in mc_save_tmp structure if it's a newer
492 * version.
493 */
a5de5e24 494 mc_saved_count = _save_mc(mc_saved_tmp, mc, mc_saved_count);
ec400dde
FY
495
496 /*
497 * Save the mc_save_tmp in global mc_saved_data.
498 */
499 ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count);
500 if (ret) {
83b325f1 501 pr_err("Cannot save microcode patch.\n");
ec400dde
FY
502 goto out;
503 }
504
505 show_saved_mc();
506
507 /*
f99b45c3 508 * Free old saved microcode data.
ec400dde
FY
509 */
510 if (mc_saved) {
511 for (i = 0; i < mc_saved_count_init; i++)
512 kfree(mc_saved[i]);
513 kfree(mc_saved);
514 }
515
516out:
074d72ff 517 mutex_unlock(&x86_cpu_microcode_mutex);
ec400dde
FY
518
519 return ret;
520}
521EXPORT_SYMBOL_GPL(save_mc_for_early);
522#endif
523
760d765b
BP
524static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
525{
ee38a907 526#ifdef CONFIG_X86_64
7b179b8f
AS
527 unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
528 unsigned int family, model, stepping;
760d765b
BP
529 char name[30];
530
531 native_cpuid(&eax, &ebx, &ecx, &edx);
532
533 family = __x86_family(eax);
534 model = x86_model(eax);
535 stepping = eax & 0xf;
536
537 sprintf(name, "intel-ucode/%02x-%02x-%02x", family, model, stepping);
538
539 return get_builtin_firmware(cp, name);
ee38a907
BP
540#else
541 return false;
542#endif
760d765b
BP
543}
544
ec400dde
FY
545static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
546static __init enum ucode_state
4f1f605c
BP
547scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
548 unsigned long start, unsigned long size,
549 struct ucode_cpu_info *uci)
ec400dde 550{
ec400dde
FY
551 struct cpio_data cd;
552 long offset = 0;
553#ifdef CONFIG_X86_32
c83a9d5e 554 char *p = (char *)__pa_nodebug(ucode_name);
ec400dde
FY
555#else
556 char *p = ucode_name;
557#endif
558
559 cd.data = NULL;
560 cd.size = 0;
561
562 cd = find_cpio_data(p, (void *)start, size, &offset);
760d765b
BP
563 if (!cd.data) {
564 if (!load_builtin_intel_microcode(&cd))
565 return UCODE_ERROR;
566 }
ec400dde 567
ec400dde 568 return get_matching_model_microcode(0, start, cd.data, cd.size,
4f1f605c 569 mc_saved_data, initrd, uci);
ec400dde
FY
570}
571
572/*
573 * Print ucode update info.
574 */
148f9bb8 575static void
ec400dde
FY
576print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
577{
578 int cpu = smp_processor_id();
579
580 pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
581 cpu,
582 uci->cpu_sig.rev,
583 date & 0xffff,
584 date >> 24,
585 (date >> 16) & 0xff);
586}
587
588#ifdef CONFIG_X86_32
589
590static int delay_ucode_info;
591static int current_mc_date;
592
593/*
594 * Print early updated ucode info after printk works. This is delayed info dump.
595 */
148f9bb8 596void show_ucode_info_early(void)
ec400dde
FY
597{
598 struct ucode_cpu_info uci;
599
600 if (delay_ucode_info) {
601 collect_cpu_info_early(&uci);
602 print_ucode_info(&uci, current_mc_date);
603 delay_ucode_info = 0;
604 }
605}
606
607/*
608 * At this point, we can not call printk() yet. Keep microcode patch number in
609 * mc_saved_data.mc_saved and delay printing microcode info in
610 * show_ucode_info_early() until printk() works.
611 */
148f9bb8 612static void print_ucode(struct ucode_cpu_info *uci)
ec400dde
FY
613{
614 struct microcode_intel *mc_intel;
615 int *delay_ucode_info_p;
616 int *current_mc_date_p;
617
618 mc_intel = uci->mc;
619 if (mc_intel == NULL)
620 return;
621
c83a9d5e
FY
622 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
623 current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
ec400dde
FY
624
625 *delay_ucode_info_p = 1;
626 *current_mc_date_p = mc_intel->hdr.date;
627}
628#else
629
630/*
631 * Flush global tlb. We only do this in x86_64 where paging has been enabled
632 * already and PGE should be enabled as well.
633 */
148f9bb8 634static inline void flush_tlb_early(void)
ec400dde
FY
635{
636 __native_flush_tlb_global_irq_disabled();
637}
638
148f9bb8 639static inline void print_ucode(struct ucode_cpu_info *uci)
ec400dde
FY
640{
641 struct microcode_intel *mc_intel;
642
643 mc_intel = uci->mc;
644 if (mc_intel == NULL)
645 return;
646
647 print_ucode_info(uci, mc_intel->hdr.date);
648}
649#endif
650
fbae4ba8 651static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
ec400dde
FY
652{
653 struct microcode_intel *mc_intel;
654 unsigned int val[2];
655
656 mc_intel = uci->mc;
657 if (mc_intel == NULL)
658 return 0;
659
660 /* write microcode via MSR 0x79 */
661 native_wrmsr(MSR_IA32_UCODE_WRITE,
662 (unsigned long) mc_intel->bits,
663 (unsigned long) mc_intel->bits >> 16 >> 16);
664 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
665
666 /* As documented in the SDM: Do a CPUID 1 here */
667 sync_core();
668
669 /* get the current revision from MSR 0x8B */
670 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
671 if (val[1] != mc_intel->hdr.rev)
672 return -1;
673
674#ifdef CONFIG_X86_64
675 /* Flush global tlb. This is precaution. */
676 flush_tlb_early();
677#endif
678 uci->cpu_sig.rev = val[1];
679
fbae4ba8
BP
680 if (early)
681 print_ucode(uci);
682 else
683 print_ucode_info(uci, mc_intel->hdr.date);
ec400dde
FY
684
685 return 0;
686}
687
688/*
689 * This function converts microcode patch offsets previously stored in
690 * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
691 */
f2b3ee82 692int __init save_microcode_in_initrd_intel(void)
ec400dde
FY
693{
694 unsigned int count = mc_saved_data.mc_saved_count;
695 struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
696 int ret = 0;
697
698 if (count == 0)
699 return ret;
700
140f74fc 701 copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, initrd_start, count);
ec400dde
FY
702 ret = save_microcode(&mc_saved_data, mc_saved, count);
703 if (ret)
83b325f1 704 pr_err("Cannot save microcode patches from initrd.\n");
ec400dde
FY
705
706 show_saved_mc();
707
708 return ret;
709}
710
711static void __init
712_load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
4f1f605c 713 unsigned long *initrd,
02f35177 714 unsigned long start, unsigned long size)
ec400dde 715{
2d48bb9b 716 struct ucode_cpu_info uci;
fbae4ba8
BP
717 enum ucode_state ret;
718
2d48bb9b 719 collect_cpu_info_early(&uci);
fbae4ba8 720
4f1f605c
BP
721 ret = scan_microcode(mc_saved_data, initrd, start, size, &uci);
722 if (ret != UCODE_OK)
723 return;
724
725 ret = load_microcode(mc_saved_data, initrd, start, &uci);
776d3cdc
BP
726 if (ret != UCODE_OK)
727 return;
fbae4ba8 728
2d48bb9b 729 apply_microcode_early(&uci, true);
ec400dde
FY
730}
731
02f35177 732void __init load_ucode_intel_bsp(void)
ec400dde 733{
02f35177 734 u64 start, size;
ec400dde 735#ifdef CONFIG_X86_32
02f35177 736 struct boot_params *p;
ec400dde 737
02f35177
BP
738 p = (struct boot_params *)__pa_nodebug(&boot_params);
739 start = p->hdr.ramdisk_image;
740 size = p->hdr.ramdisk_size;
ec400dde
FY
741
742 _load_ucode_intel_bsp(
02f35177
BP
743 (struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
744 (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
745 start, size);
ec400dde 746#else
02f35177
BP
747 start = boot_params.hdr.ramdisk_image + PAGE_OFFSET;
748 size = boot_params.hdr.ramdisk_size;
ec400dde 749
02f35177 750 _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size);
ec400dde
FY
751#endif
752}
753
148f9bb8 754void load_ucode_intel_ap(void)
ec400dde
FY
755{
756 struct mc_saved_data *mc_saved_data_p;
757 struct ucode_cpu_info uci;
758 unsigned long *mc_saved_in_initrd_p;
759 unsigned long initrd_start_addr;
776d3cdc 760 enum ucode_state ret;
ec400dde
FY
761#ifdef CONFIG_X86_32
762 unsigned long *initrd_start_p;
763
764 mc_saved_in_initrd_p =
c83a9d5e
FY
765 (unsigned long *)__pa_nodebug(mc_saved_in_initrd);
766 mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
767 initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start);
768 initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p);
ec400dde
FY
769#else
770 mc_saved_data_p = &mc_saved_data;
771 mc_saved_in_initrd_p = mc_saved_in_initrd;
772 initrd_start_addr = initrd_start;
773#endif
774
775 /*
776 * If there is no valid ucode previously saved in memory, no need to
777 * update ucode on this AP.
778 */
779 if (mc_saved_data_p->mc_saved_count == 0)
780 return;
781
782 collect_cpu_info_early(&uci);
776d3cdc
BP
783 ret = load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
784 initrd_start_addr, &uci);
785
786 if (ret != UCODE_OK)
787 return;
788
fbae4ba8
BP
789 apply_microcode_early(&uci, true);
790}
791
792void reload_ucode_intel(void)
793{
794 struct ucode_cpu_info uci;
25cdb9c8 795 enum ucode_state ret;
fbae4ba8 796
25cdb9c8 797 if (!mc_saved_data.mc_saved_count)
fbae4ba8
BP
798 return;
799
25cdb9c8
BP
800 collect_cpu_info_early(&uci);
801
9e02bb46
BP
802 ret = load_microcode_early(mc_saved_data.mc_saved,
803 mc_saved_data.mc_saved_count, &uci);
25cdb9c8
BP
804 if (ret != UCODE_OK)
805 return;
fbae4ba8
BP
806
807 apply_microcode_early(&uci, false);
ec400dde 808}
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