[deliverable/linux.git] / arch / x86 / kernel / cpu / mtrr / mtrr.h

/*
 * local mtrr defines.
 */

#include <linux/types.h>
#include <linux/stddef.h>

#define MTRRcap_MSR     0x0fe
#define MTRRdefType_MSR 0x2ff

#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)

#define NUM_FIXED_RANGES 88
#define MAX_VAR_RANGES 256
#define MTRRfix64K_00000_MSR 0x250
#define MTRRfix16K_80000_MSR 0x258
#define MTRRfix16K_A0000_MSR 0x259
#define MTRRfix4K_C0000_MSR 0x268
#define MTRRfix4K_C8000_MSR 0x269
#define MTRRfix4K_D0000_MSR 0x26a
#define MTRRfix4K_D8000_MSR 0x26b
#define MTRRfix4K_E0000_MSR 0x26c
#define MTRRfix4K_E8000_MSR 0x26d
#define MTRRfix4K_F0000_MSR 0x26e
#define MTRRfix4K_F8000_MSR 0x26f

#define MTRR_CHANGE_MASK_FIXED     0x01
#define MTRR_CHANGE_MASK_VARIABLE  0x02
#define MTRR_CHANGE_MASK_DEFTYPE   0x04

/* In the Intel processor's MTRR interface, the MTRR type is always held in
   an 8 bit field: */
typedef u8 mtrr_type;

extern unsigned int mtrr_usage_table[MAX_VAR_RANGES];

struct mtrr_ops {
	u32	vendor;
	u32	use_intel_if;
//	void	(*init)(void);
	void	(*set)(unsigned int reg, unsigned long base,
		       unsigned long size, mtrr_type type);
	void	(*set_all)(void);

	void	(*get)(unsigned int reg, unsigned long *base,
		       unsigned long *size, mtrr_type * type);
	int	(*get_free_region)(unsigned long base, unsigned long size,
				   int replace_reg);
	int	(*validate_add_page)(unsigned long base, unsigned long size,
				     unsigned int type);
	int	(*have_wrcomb)(void);
};

extern int generic_get_free_region(unsigned long base, unsigned long size,
				   int replace_reg);
extern int generic_validate_add_page(unsigned long base, unsigned long size,
				     unsigned int type);

extern struct mtrr_ops generic_mtrr_ops;

extern int positive_have_wrcomb(void);

/* library functions for processor-specific routines */
struct set_mtrr_context {
	unsigned long flags;
	unsigned long cr4val;
	u32 deftype_lo;
	u32 deftype_hi;
	u32 ccr3;
};

struct mtrr_var_range {
	u32 base_lo;
	u32 base_hi;
	u32 mask_lo;
	u32 mask_hi;
};

void set_mtrr_done(struct set_mtrr_context *ctxt);
void set_mtrr_cache_disable(struct set_mtrr_context *ctxt);
void set_mtrr_prepare_save(struct set_mtrr_context *ctxt);

void fill_mtrr_var_range(unsigned int index,
		u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi);
void get_mtrr_state(void);

extern void set_mtrr_ops(struct mtrr_ops * ops);

extern u64 size_or_mask, size_and_mask;
extern struct mtrr_ops * mtrr_if;

#define is_cpu(vnd)	(mtrr_if && mtrr_if->vendor == X86_VENDOR_##vnd)
#define use_intel()	(mtrr_if && mtrr_if->use_intel_if == 1)

extern unsigned int num_var_ranges;
extern u64 mtrr_tom2;

void mtrr_state_warn(void);
const char *mtrr_attrib_to_str(int x);
void mtrr_wrmsr(unsigned, unsigned, unsigned);

/* CPU specific mtrr init functions */
int amd_init_mtrr(void);
int cyrix_init_mtrr(void);
int centaur_init_mtrr(void);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* local mtrr defines.
	3	*/
	4
2d2ee8de PJ	5	#include <linux/types.h>
2d2ee8de PJ	6	#include <linux/stddef.h>
1da177e4 LT	7
	8	#define MTRRcap_MSR 0x0fe
	9	#define MTRRdefType_MSR 0x2ff
	10
	11	#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
	12	#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
	13
	14	#define NUM_FIXED_RANGES 88
99fc8d42	15	#define MAX_VAR_RANGES 256
1da177e4 LT	16	#define MTRRfix64K_00000_MSR 0x250
	17	#define MTRRfix16K_80000_MSR 0x258
	18	#define MTRRfix16K_A0000_MSR 0x259
	19	#define MTRRfix4K_C0000_MSR 0x268
	20	#define MTRRfix4K_C8000_MSR 0x269
	21	#define MTRRfix4K_D0000_MSR 0x26a
	22	#define MTRRfix4K_D8000_MSR 0x26b
	23	#define MTRRfix4K_E0000_MSR 0x26c
	24	#define MTRRfix4K_E8000_MSR 0x26d
	25	#define MTRRfix4K_F0000_MSR 0x26e
	26	#define MTRRfix4K_F8000_MSR 0x26f
	27
	28	#define MTRR_CHANGE_MASK_FIXED 0x01
	29	#define MTRR_CHANGE_MASK_VARIABLE 0x02
	30	#define MTRR_CHANGE_MASK_DEFTYPE 0x04
	31
	32	/* In the Intel processor's MTRR interface, the MTRR type is always held in
	33	an 8 bit field: */
	34	typedef u8 mtrr_type;
	35
99fc8d42 JB	36	extern unsigned int mtrr_usage_table[MAX_VAR_RANGES];
99fc8d42 JB	37
1da177e4 LT	38	struct mtrr_ops {
	39	u32 vendor;
	40	u32 use_intel_if;
	41	// void (*init)(void);
	42	void (*set)(unsigned int reg, unsigned long base,
	43	unsigned long size, mtrr_type type);
	44	void (*set_all)(void);
	45
	46	void (get)(unsigned int reg, unsigned long base,
365bff80 JB	47	unsigned long size, mtrr_type type);
	48	int (*get_free_region)(unsigned long base, unsigned long size,
	49	int replace_reg);
1da177e4 LT	50	int (*validate_add_page)(unsigned long base, unsigned long size,
	51	unsigned int type);
	52	int (*have_wrcomb)(void);
	53	};
	54
365bff80 JB	55	extern int generic_get_free_region(unsigned long base, unsigned long size,
365bff80 JB	56	int replace_reg);
1da177e4 LT	57	extern int generic_validate_add_page(unsigned long base, unsigned long size,
	58	unsigned int type);
	59
	60	extern struct mtrr_ops generic_mtrr_ops;
	61
	62	extern int positive_have_wrcomb(void);
	63
	64	/* library functions for processor-specific routines */
	65	struct set_mtrr_context {
	66	unsigned long flags;
1da177e4	67	unsigned long cr4val;
365bff80 JB	68	u32 deftype_lo;
	69	u32 deftype_hi;
	70	u32 ccr3;
1da177e4 LT	71	};
	72
	73	struct mtrr_var_range {
365bff80 JB	74	u32 base_lo;
	75	u32 base_hi;
	76	u32 mask_lo;
	77	u32 mask_hi;
1da177e4 LT	78	};
	79
	80	void set_mtrr_done(struct set_mtrr_context *ctxt);
	81	void set_mtrr_cache_disable(struct set_mtrr_context *ctxt);
	82	void set_mtrr_prepare_save(struct set_mtrr_context *ctxt);
	83
95ffa243 YL	84	void fill_mtrr_var_range(unsigned int index,
95ffa243 YL	85	u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi);
1da177e4 LT	86	void get_mtrr_state(void);
	87
	88	extern void set_mtrr_ops(struct mtrr_ops * ops);
	89
6c5806ca	90	extern u64 size_or_mask, size_and_mask;
1da177e4 LT	91	extern struct mtrr_ops * mtrr_if;
	92
	93	#define is_cpu(vnd) (mtrr_if && mtrr_if->vendor == X86_VENDOR_##vnd)
	94	#define use_intel() (mtrr_if && mtrr_if->use_intel_if == 1)
	95
	96	extern unsigned int num_var_ranges;
95ffa243	97	extern u64 mtrr_tom2;
1da177e4	98
1da177e4	99	void mtrr_state_warn(void);
365bff80	100	const char *mtrr_attrib_to_str(int x);
1da177e4 LT	101	void mtrr_wrmsr(unsigned, unsigned, unsigned);
1da177e4 LT	102
16c02ed7 HH	103	/* CPU specific mtrr init functions */
	104	int amd_init_mtrr(void);
	105	int cyrix_init_mtrr(void);
	106	int centaur_init_mtrr(void);